CA1312651C - Method and apparatus for identifying a faulted phase - Google Patents
Method and apparatus for identifying a faulted phaseInfo
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- CA1312651C CA1312651C CA000592383A CA592383A CA1312651C CA 1312651 C CA1312651 C CA 1312651C CA 000592383 A CA000592383 A CA 000592383A CA 592383 A CA592383 A CA 592383A CA 1312651 C CA1312651 C CA 1312651C
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- 238000000034 method Methods 0.000 title claims description 17
- 238000001514 detection method Methods 0.000 claims description 7
- 238000012544 monitoring process Methods 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 230000001681 protective effect Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 238000004422 calculation algorithm Methods 0.000 description 6
- 238000012300 Sequence Analysis Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S10/00—Systems supporting electrical power generation, transmission or distribution
- Y04S10/50—Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
- Y04S10/52—Outage or fault management, e.g. fault detection or location
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Abstract
WE54,176 Abstract of the Disclosure Faults in a three-phase power transmission line are identified by vectorially subtracting from the postfault current for each phase, the zero sequence current and the prefault current. The resultant currents which are the vectorial sums of the postfault positive and negative sequence currents are then compared. If the magnitude of the resultant current in one phase exceeds that in each of the other two phases by a preselected factor, that one phase is identified as the phase to ground faulted phase. If the magnitudes of the resultant currents of two phases exceed that of the third, those two phases are involved in either a phase to phase or a phase to phase to ground fault with the distinction being made by the presence of zero sequence current in the later case.
Description
WE54,176 MET~OD AND APPARATUS FOR
IDENTIFYING A FAULTED PHASE
Back~round of Invention Field of the Invention This invention relates to a method and apparatus for identifying a faulted phase or phases in a polyphase power line. More particularly, it relates to a method o identifying faults in a three-phase electric power system by vectorially subtracting the zero sequence current and prefault current from the postfault current to determine the fault type and phases involved.
Backqround Information One of the functions of protective relaying systems used to isolate faults in electric power transmission lines is to identify the type of fault. Fault type identification includes determining if the fault is between phases or between one or more phases and ground and also determining the specific phase or phases involved in the fault~ Proper faulted phase identification is required ~2$~
IDENTIFYING A FAULTED PHASE
Back~round of Invention Field of the Invention This invention relates to a method and apparatus for identifying a faulted phase or phases in a polyphase power line. More particularly, it relates to a method o identifying faults in a three-phase electric power system by vectorially subtracting the zero sequence current and prefault current from the postfault current to determine the fault type and phases involved.
Backqround Information One of the functions of protective relaying systems used to isolate faults in electric power transmission lines is to identify the type of fault. Fault type identification includes determining if the fault is between phases or between one or more phases and ground and also determining the specific phase or phases involved in the fault~ Proper faulted phase identification is required ~2$~
WE5~,175 to avoid ground distance relay overreach on double line to ground faults which include ground fault resistance, for implementation of single-pole tripping for single line to ground faults, and for providing ~ault location in~ormation. The distance to the fault is computed ~rom the fault impedance which is based on the voltages and currents of the faulted phases.
Current technology uses comparisons of different combinations of currents and voltages to determine fault type through mostly analog techniques. For example, previous phase selectors have selected the faulted phase based on phase comparison of zero sequence current and negative sequence current or voltage. These selectors identify as faulted the unfaulted phases during double line to ground faults. The selector utilizing zero and negative sequence currents may select two phases during a single line to ground fault if it is at a line terminal with substantial load but relatively small negative sequence current contribution to line faults.
One prior art phase selector based on phase comparison of zero sequence current, negative sequence voltage, and phase to phase voltage was intended to overcome the foregoing problems. However, it has been determined that, if ground fault resistance is involved, this phase selector may select the leading phase involved in a double line to ground fault and this is the situation where ground distance relay overreach may also occur.
Current technology uses comparisons of different combinations of currents and voltages to determine fault type through mostly analog techniques. For example, previous phase selectors have selected the faulted phase based on phase comparison of zero sequence current and negative sequence current or voltage. These selectors identify as faulted the unfaulted phases during double line to ground faults. The selector utilizing zero and negative sequence currents may select two phases during a single line to ground fault if it is at a line terminal with substantial load but relatively small negative sequence current contribution to line faults.
One prior art phase selector based on phase comparison of zero sequence current, negative sequence voltage, and phase to phase voltage was intended to overcome the foregoing problems. However, it has been determined that, if ground fault resistance is involved, this phase selector may select the leading phase involved in a double line to ground fault and this is the situation where ground distance relay overreach may also occur.
3 ~
WE54,176 The primary object of the present invention is to accurately identify the type of fault in a polyphase electric power line.
It is another important object of the invention to accurately identify the specific phase or phases involved in a fault.
It is also an object of the invention to achieve the previous objects regardless of fault resistance or load conditions.
Summary of Invention These and other objects are realized by the invention in which the type of fault in a three-phase electric power line is identified by monitoring the power line currents, generating phasor representations of the monitored currents, and continually retaining the most recent phasor representations prior to a fault as prefault current phasor representations. Upon detection of the presence of a fault, resultant current phasor representations are generated from the prefault current phasor representations and from postfault current phasor representations generated after detection of the fault. The magnitudes of the resultant phasor representations are compared and the comparisons are used to determine the type of fault.
More particularly, phasor representations are generated and stored for each of the phase currents and for the ~ero sequence current. The resultant current phasor ~ 3 ~
WE5~,176 representations are generated by subtracting from the postfault phase current phasor representations the postfault zero sequence current phasor representation and the prefault current phasor representations. If the magnitude of the resultant current phasor representation of one phase exceeds that of both of the other phases by a preselected amount which is preferably a factor of at least about 1.4~ then that phase is designated as the phase of a single phase to ground fault. Reliable indication of a single phase to ground fault only requires that a breaker pole in the faulted phase be opened.
If the magnitude of the resultant current phasor representation for two of the phases each exceed that of the third phase by a preselected amount, such as a factor of at least about 1.4, those two phases are designated as phases of either a phase to phase or a phase to phase to ground ~ault. In the exemplary system, it is not necessary to distinguish between the phase to phase and phase to phase to ground type faults since in either case breakers in all three phases of the power line will be opened. However, the distinction can be easily made by checking the postfault zero sequence current. When this current is essentially zero, it is a phase to phase fault. On the other hand, the presence of a postfault zero sequence current indicates that it is a phase to phase to ground faultO
The present invention, which encompasses both a method and apparatus, provides a reliable easily derived ` ``` ~ 3 ~
WE54,176 indication of the type of fault which has occurred in a three-phase power line regardless of the location of the fault, fault resistance, or load condition.
Brief Description of the Drawings A full understanding of the invention can be gained from the following description of the preferred embodiments when read in conjunction with the accompanying drawings in which:
Figure 1 is a schematic representation of a power system to which the invention is applied~
Figure 2a is a simplified circuit diagram of the power system of Figure 1 and Figures 2 b, c, and d are positive, negative, and zero sequence diagrams respectively of the system of Figure 2a.
Figure 3 illustrates the connection between the sequence networks of Figure 2 for a phase A to ground fault.
Figure 4a is a phasor diagram of the currents for a phase A to ground fault, Figure 4b illustrates the resultant phasor diagram under such fault conditions, and Figure 4c illustrates the vectorial sums of the positive and negative sequence currents for each of the phases for the phase A to ground fault.
Figure 5 illustrates the connection of the sequence circuits for a phase B to phase C fault.
Figure 6 illustra~es the phasor diagram for the phase B to phase C fault.
~3~2~
WE54,176 Figure 7 illustrates the connection of the sequence diagrams for a phase B to phase C to ground fault.
Figure 8 illustrates the phasor diagram for the phase B to phase C to ground fault.
Figure 9 depicts the loci of the sums of the positive and negative sequence currents for a range of values of the ~ero and negative sequence reactive components of line impedance and for a range of ground resistances from zero to infinity for a phase B to phase C to ground faultO
Figure lO illustrates the correction of the impedances in the sequence network for the fault depicted in Figure 9.
Figure ll is a plot of the ratio of the sum of the positive and negative sequence currents for the two phases of a phase to phase to ground fault as a function of the ratio of the zero sequence to negative sequence reactive impedance.
Figure 12 is a block diagra~ of the program used by the invention to identify faults in the system of Figure l.
Descri~tlon_of the Preferred Embodiment Figure l illustrates a power system to which the invention is applied. This system includes a power line 1 fed by a generator 2. All components are three-phase, but only a single phase is shown for clarity. The power line is protected by a protective relay system 3 which includes as :~3 ~ 2~ ~
_7 WES4,176 protective relays, two microprocessor based distance relays 4 and S.
These protective relays 4 and 5 monitor the three-phase curren~s through current transformers 6 and the three phase to ground voltages through potential transformers 7.
The distance relays 4 and 5 derive from the phase currents inputs the zero sequence current.
The exemplary protective relays 4 and 5 are digital systems which sample the instantaneous analog magnitudes of the power line voltages and currents several times per second for input to a microprocessor which generates phasor or vector representations of these parameters using a conventional waveform analysis routine such as for example, a Fourier algorithm.
lS The ~icroprocessors of the protection relays 4 and 5 perform a number of relaying computations with the vector representations of the power line currents and voltages including detection of an instantaneous overcurrent condition using known techniques. More par~icularly, a distance algorithm determines the presence of a fault within a zone of protection. In the system of Figure 1, protective relay 4 looks to the right in zone 1 and relay 5 looks ~o the left in the same zone. These relays detect the presence of an internal fault 8 within the zone 1 by determining the impedance from the current and voltage phasors. The protective relay 4, can also detect the presence of an external fault 9 by a zone 2 distance algorithm. The ~5~
WE5A,176 faulted phasor identification Eeature of the present invention determines which phase or phase~ are involved in a fault regardless of the location or the direction of the fault. The protective relays 4 and 5 are connected to breakers BRK to protect against faults in the power line 1.
The present invention utilizes sequence analysis to identify the type of fault. Sequence analysis is a well known technique for analyzing unbalanced polyphase circuits. With this analysis, the currents and voltages are resolved into three sets of phasors with all phasors in each set being of equal magnitude. The positive sequence set of phasors appear in the sequence of phase rotation of the line currents and voltages, the negative sequence phasors appear in the opposite sequence, and the zero sequence phasors are all in phase.
Figure 2a depicts a simplified electric circuit for the system of Figure l. This circuit includes two generators, voltages EG and E~, with impedances ZGL and ZH
respectively connected by line ZL- Under normal no fault conditions, a load current IL flows from G to H. Figures 2b, c and d illustrate positive, negative and zero sequence diagrams for the system of Figure 2a. As noted in these figures, the subscripts l, 2 and 0 denote the positive, negative and zero sequence components respectively of each parameter.
In Figures 2c, each negative sequence impedance can be considered, for all practical purposes, to be equal WE54,176 to the corresponding positive sequence impedance of Figure 2b. Similarly, the fault current distribution factors, Dl and D2 can be considered equal. It is this equality of negative and positive sequence impedances and current distribution factors which is the key to the success of the present invention.
Figure 3 illustrates the connection between the sequence networks of Figures 2b, c and d (shown symbolically for clarity), for a phase A to ground fault involving fault resistance RG. As indicated by Figure 4a, IlAI I2A and, IoA, the phase A sequence currents at the fault for the phase A to ground fault are all equal and in phase. The sum of these phase A sequence currents yields the faulted phase current in the fault, IAF, shown in Figure 4b. RG will influence the magnitude of IA~, but does not alter the equality of Il, I2, and Io~ Similarly, because RG is outside the sequence networks, it has no influence on the current distribution factors Dl~ D2 and Do.
As can be seen from Figure 4b, the positive and negative sequence currents for the unfaulted phases, B and C, are not in phase. While not shown in this Figure, Io for phase B and C are equal to, and in phase with the zero sequence current for phase A~ Figure 4c illustrates that the sum o~ the positive and negative sequence currents at the fault for phase A, IlA + I2A, is twice the magnitude of both IlB + I2B~ and IlC f I2c. This magnitude comparison ~L 3 ~ 2 6 ~r~ ~
~10--WE54,176 can be used then to identify the phase involved in a single line to ground fault.
In Figure 5, the sequence networks are connected for a phase B to phase C fault. The connection of the phase A sequence networks is shown since, by convention, phase A
is the reference phase, however, the networks for phases B
and C are similar. Figure 6 is the phasor diagram for this phase to phase fault. It should be noted that at the fault the sum IBF of the positive and negative sequence currents, lQ IlB + I2~, is the same magnitude as IlC + I2C =ICF, while IlA + I2~ equals zero.
Figure 7 illustrates the connection of the sequence networks for the reference phase, A, for a B to C
to ground fault in which the network impedances are assumed equal and reactive in order to derive the phasor diagram of Figure 8. In this latter figure, the phasors for the positive and zero sequence currents extend from the origin to the point on the associated locus representative of the particular ground resistance. Thus, it can be seen from Figure 8 that ground fault resistance, RG, influences the magnitude and phase of the positive and, zero sequence currents, Il and Io~ of each phase relative to the associated I2.
This effect of the ground fault resistance on the magnitude and phase relation of the phasors is one reason earlier phase selectors made erroneous selections during double line to ground faults. On the other hand, it will be noticed that in all cases t the magnitudes of the sums of the ~1 ~ 3'-~J~
WE54,176 positive and negative sequence currents of the two-phases faulted to ground are equal and are much larger than that of the unfaulted phase.
In Figure 9, possible loci for IlA ~ I2A, IlB +
I2B and I1C + I2C are shown for a practical range of the ratio of the reactive component of the zero sequence impedance, X0, to that of the negative sequence impedance, X2, from 0.5 to 2, and for ground fault resistance, 3RG, ranging from zero to infinity for a phase B to C to ground fault. The connection of these impedances in the sequence network is shown in Figure 10.
Figure 11 is a plot of the ratio (IlB t I2B)/(IlC
+I2C) for X0/X2 from 0 to 7 and for RG/Xo from 0 to 3 where:
¦IlB + I2B¦ =13 ~ MK + 1/2 + j ~ (K+l)¦
¦I1C ~ I2Cl ¦3 ~ MR - 1/2 + j ~ (K+l)¦
and K X0/Xl - As can be seen from Figure 11, the ratio remains between 1 and 1.35.
An examination of Figures 4c, 6 and 11, shows that only in the case of a single line to ground fault (Figure 4c) will the sum of the positive and negative sequence currents at the fault be twice as large for one phase as for the other two phases. Thus, a means exists to identify that \
-12- ~ 6~ r3~
WE5~,176 a fault is a single line to ground faul~ and to identify the faulted phase. A practical ratio to look for is 1.5, which is comfortably within the limits of 1.3S and 2. These figures also show that for phase to phase and phase to phase to ground faults the sum of the positive and negative sequence currents at the fault for the two faulted phases will be within a factor 1 to 1.35 of each other for practical values of line impedances and all values of ground resistance, so that such faults can be reliably identified when the sums of the positive and sequence components at the fault for two phases are both more than 1.35 times larger than that for the third phase.
The relationships established for currents at the fault can be deduced from currents available from the current transformers 6 in Figure 1 when it is recognized that:
1. Before the fault~ the available current is the load curren~.
2~ After the fault, the available current is the load and fault current.
3. The derivation of Il + I~ fault components is a relatively simple matter of subtracting the zero sequence current and prefault current from the fault current.
The advantage of deducing fault components Il + I2 at the line terminals becomes apparent. Because Zl=z2 and Dl=D2, the ratio of Il ~ I2 from phase to phase will be substantially the same at the actual current transformer location as at the fault.
In implementing the invention, the microprocessor WE54,176 based protective relays 4 and 5 of Figure 1 receive seven analog inputs including three phase to ground voltages VAG, VBG and VCG, the three phase currents I~, IB and IC and the zero sequence current 3Io. Each of the analog inputs is sampled in the exemplary system 8 times per cycle and converted to rectangular coordinates or phasors using, for example, the known Ful-l Cycle Fourier Algorithm. Only the current phasors IA, IB, IC and Io are utilized in the fault identification algorithm run by the microprocessors in the protective relays 4 and 5. The most recent phasors are retained on a continual basis. When a fault occurs, the retained most recent phasors represent the prefault currents, while the phasors then calculated represent the postfault currents, In the implementation of the invention, the inputs are:
IAL, IgL, ICL Measured prefault load currents 3 I0M IAM, IgM~ ICM Measured postfault currents The fault currents are determined by re~oving the zero sequence current from the postfault current and subtracting the prefault current in accordance with the calculations:
Io = 3IoM/3 (the zero sequence currents are all equal~
-14- ~3~
WE54, 176 .
IA = IAM - Io - IAL
a IB = IBM - Io - IBL
~ IC = ICM - Io - ICL
I 2A = [real (~ IA)]2 ~ [imag (~IA)]2 I2B = [real (~IB)]2 + [imag (~IB)]2 I2C = [real (~IC)]2 + [imag ( IC)]2 The magnitudes of the resultant fault currents are then compared. To avoid takiny square roots, the squares of the magnitudes are compared. To simplify and speed up the mathematics, a factor of 2 is used to compare the ratio of currents since this only requires a shift of the binary representation of the magnitude within the microprocessor.
Thus:
(1.5) = 2.~5,~,2 J~= 1.4 Using 2 for comparing the ratios of the square of the currents results in a reference value of 1.~ instead of the 1.5 referred to above. This value is still above the 1.35 value identified from Figure 11.
Figure 12 is a flow diagram illustrating the manner in which the comparisons are made for identifying a fault type. IA2 is compared with IB2 at 10. If IA~ is more -15- ~3~
WE54,176 than twice IB2 and is also more than twice Ic2 as determined at 11, the fault is identified at 12 as a single line to ground fault in phase Ao If IA2 and IC2 are both more than twice IB , as determined by the sequence 10, 11, 13 in Figure 12, then a phase A and C line to line, or line to line to ground fault is identified at 14. It is not necessary for the routine to distinguish between a phase to phase fault and a two phase to ground fault because in either case the desired response is to trip all three-phases. However, the determination can be easily madeby checking the zero sequence current. For a two-phase to ground fault there will be a sizable zero sequence current, while for a phase to phase fault there will be no zero sequence current.
Similarly, if IB2 is more than twice IC2 15, and I 2, at 16, a single phase to ground fault in phase B is identified at 17. On the other hand, if IB2, 15, and IA2 at 18, both exceed IC by a factor of 2, the fault is a phase A
to phase B line to line, or two line to ground fault at 19.
Likewise, if IC2 exceeds both IA2 at 20, and I~2 at 21, by a factor of two, a phase C to ground fault is indicated at at 22. In addition, when IC2 at 20 and IB2 at 23 are both at least twice as large as IA2, a phase B to C, phase to phase or two phase to realign last part of line ground fault is identified at 24. All other combinations of the magnitudes of the values IA2, IB2 and IC2 are considered balanced conditions at 25. A determination of whether such ~ 3 ~ 2 ~ r~ 1 WE54,176 a balanced condition is a three-phase fault is made through o~her functions of the protective relay which rely on measures of impedances within ~ones of protection as is known in the art.
The results of the algorithm can be su~marized by the following table:
Table Faulted Phase Selection Fault Typ~
_ , ., _ ... _., _ _ _ _ _ AG 8G CG A~ ~5~ CP~ ABG BCG CA~;
__ _ _ .~ . _ _ _ _ , _ _ ¦~!/ ¦ > I ~xl ~l ¦x x x ~_ _ __.__ __ lAl~ ~.5Xl lcl X X X _ _ ~_ _ _ _ __ _ __ I~ I > 1.5XI~ l X X X
~ _ _ ~ _ _ . . __ ~18l > ~-5XI~lcl x x . x ~ ~ __ __ _ __ _ lalcl> I.5XI~/~l X X X
~ .... _ _ _ _ _ _ , I'~cl > l.~xl~l~gl X X X
.... _ . ........ _ _. _ _ _ _ _ A~ discussed previously, a factor of 1.5 provides a preferred margin between resultant phase current magnitudes, but a factor of about 1.4 produced by using a factor of 2 in comparing the squares of the resultant currrents lends itself to easier implementation in the code of the microprocessor based protective relays.
As can be appreciated Erom the above, the present invention provides a reliable easily implemented method and -17- ,~ 6~
WE54,176 apparatus for correctly identifying single line to ground faults regardless of fault resistance and load conditions, and for correctly identifing line to line faults.
While specific embodiments of the invention have been described in detail, it will be appreciated by those skilled in the art that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure. Accordingly, the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the invention which is to be given the full breadth of the appended claims and any and all equivalents thereof.
WE54,176 The primary object of the present invention is to accurately identify the type of fault in a polyphase electric power line.
It is another important object of the invention to accurately identify the specific phase or phases involved in a fault.
It is also an object of the invention to achieve the previous objects regardless of fault resistance or load conditions.
Summary of Invention These and other objects are realized by the invention in which the type of fault in a three-phase electric power line is identified by monitoring the power line currents, generating phasor representations of the monitored currents, and continually retaining the most recent phasor representations prior to a fault as prefault current phasor representations. Upon detection of the presence of a fault, resultant current phasor representations are generated from the prefault current phasor representations and from postfault current phasor representations generated after detection of the fault. The magnitudes of the resultant phasor representations are compared and the comparisons are used to determine the type of fault.
More particularly, phasor representations are generated and stored for each of the phase currents and for the ~ero sequence current. The resultant current phasor ~ 3 ~
WE5~,176 representations are generated by subtracting from the postfault phase current phasor representations the postfault zero sequence current phasor representation and the prefault current phasor representations. If the magnitude of the resultant current phasor representation of one phase exceeds that of both of the other phases by a preselected amount which is preferably a factor of at least about 1.4~ then that phase is designated as the phase of a single phase to ground fault. Reliable indication of a single phase to ground fault only requires that a breaker pole in the faulted phase be opened.
If the magnitude of the resultant current phasor representation for two of the phases each exceed that of the third phase by a preselected amount, such as a factor of at least about 1.4, those two phases are designated as phases of either a phase to phase or a phase to phase to ground ~ault. In the exemplary system, it is not necessary to distinguish between the phase to phase and phase to phase to ground type faults since in either case breakers in all three phases of the power line will be opened. However, the distinction can be easily made by checking the postfault zero sequence current. When this current is essentially zero, it is a phase to phase fault. On the other hand, the presence of a postfault zero sequence current indicates that it is a phase to phase to ground faultO
The present invention, which encompasses both a method and apparatus, provides a reliable easily derived ` ``` ~ 3 ~
WE54,176 indication of the type of fault which has occurred in a three-phase power line regardless of the location of the fault, fault resistance, or load condition.
Brief Description of the Drawings A full understanding of the invention can be gained from the following description of the preferred embodiments when read in conjunction with the accompanying drawings in which:
Figure 1 is a schematic representation of a power system to which the invention is applied~
Figure 2a is a simplified circuit diagram of the power system of Figure 1 and Figures 2 b, c, and d are positive, negative, and zero sequence diagrams respectively of the system of Figure 2a.
Figure 3 illustrates the connection between the sequence networks of Figure 2 for a phase A to ground fault.
Figure 4a is a phasor diagram of the currents for a phase A to ground fault, Figure 4b illustrates the resultant phasor diagram under such fault conditions, and Figure 4c illustrates the vectorial sums of the positive and negative sequence currents for each of the phases for the phase A to ground fault.
Figure 5 illustrates the connection of the sequence circuits for a phase B to phase C fault.
Figure 6 illustra~es the phasor diagram for the phase B to phase C fault.
~3~2~
WE54,176 Figure 7 illustrates the connection of the sequence diagrams for a phase B to phase C to ground fault.
Figure 8 illustrates the phasor diagram for the phase B to phase C to ground fault.
Figure 9 depicts the loci of the sums of the positive and negative sequence currents for a range of values of the ~ero and negative sequence reactive components of line impedance and for a range of ground resistances from zero to infinity for a phase B to phase C to ground faultO
Figure lO illustrates the correction of the impedances in the sequence network for the fault depicted in Figure 9.
Figure ll is a plot of the ratio of the sum of the positive and negative sequence currents for the two phases of a phase to phase to ground fault as a function of the ratio of the zero sequence to negative sequence reactive impedance.
Figure 12 is a block diagra~ of the program used by the invention to identify faults in the system of Figure l.
Descri~tlon_of the Preferred Embodiment Figure l illustrates a power system to which the invention is applied. This system includes a power line 1 fed by a generator 2. All components are three-phase, but only a single phase is shown for clarity. The power line is protected by a protective relay system 3 which includes as :~3 ~ 2~ ~
_7 WES4,176 protective relays, two microprocessor based distance relays 4 and S.
These protective relays 4 and 5 monitor the three-phase curren~s through current transformers 6 and the three phase to ground voltages through potential transformers 7.
The distance relays 4 and 5 derive from the phase currents inputs the zero sequence current.
The exemplary protective relays 4 and 5 are digital systems which sample the instantaneous analog magnitudes of the power line voltages and currents several times per second for input to a microprocessor which generates phasor or vector representations of these parameters using a conventional waveform analysis routine such as for example, a Fourier algorithm.
lS The ~icroprocessors of the protection relays 4 and 5 perform a number of relaying computations with the vector representations of the power line currents and voltages including detection of an instantaneous overcurrent condition using known techniques. More par~icularly, a distance algorithm determines the presence of a fault within a zone of protection. In the system of Figure 1, protective relay 4 looks to the right in zone 1 and relay 5 looks ~o the left in the same zone. These relays detect the presence of an internal fault 8 within the zone 1 by determining the impedance from the current and voltage phasors. The protective relay 4, can also detect the presence of an external fault 9 by a zone 2 distance algorithm. The ~5~
WE5A,176 faulted phasor identification Eeature of the present invention determines which phase or phase~ are involved in a fault regardless of the location or the direction of the fault. The protective relays 4 and 5 are connected to breakers BRK to protect against faults in the power line 1.
The present invention utilizes sequence analysis to identify the type of fault. Sequence analysis is a well known technique for analyzing unbalanced polyphase circuits. With this analysis, the currents and voltages are resolved into three sets of phasors with all phasors in each set being of equal magnitude. The positive sequence set of phasors appear in the sequence of phase rotation of the line currents and voltages, the negative sequence phasors appear in the opposite sequence, and the zero sequence phasors are all in phase.
Figure 2a depicts a simplified electric circuit for the system of Figure l. This circuit includes two generators, voltages EG and E~, with impedances ZGL and ZH
respectively connected by line ZL- Under normal no fault conditions, a load current IL flows from G to H. Figures 2b, c and d illustrate positive, negative and zero sequence diagrams for the system of Figure 2a. As noted in these figures, the subscripts l, 2 and 0 denote the positive, negative and zero sequence components respectively of each parameter.
In Figures 2c, each negative sequence impedance can be considered, for all practical purposes, to be equal WE54,176 to the corresponding positive sequence impedance of Figure 2b. Similarly, the fault current distribution factors, Dl and D2 can be considered equal. It is this equality of negative and positive sequence impedances and current distribution factors which is the key to the success of the present invention.
Figure 3 illustrates the connection between the sequence networks of Figures 2b, c and d (shown symbolically for clarity), for a phase A to ground fault involving fault resistance RG. As indicated by Figure 4a, IlAI I2A and, IoA, the phase A sequence currents at the fault for the phase A to ground fault are all equal and in phase. The sum of these phase A sequence currents yields the faulted phase current in the fault, IAF, shown in Figure 4b. RG will influence the magnitude of IA~, but does not alter the equality of Il, I2, and Io~ Similarly, because RG is outside the sequence networks, it has no influence on the current distribution factors Dl~ D2 and Do.
As can be seen from Figure 4b, the positive and negative sequence currents for the unfaulted phases, B and C, are not in phase. While not shown in this Figure, Io for phase B and C are equal to, and in phase with the zero sequence current for phase A~ Figure 4c illustrates that the sum o~ the positive and negative sequence currents at the fault for phase A, IlA + I2A, is twice the magnitude of both IlB + I2B~ and IlC f I2c. This magnitude comparison ~L 3 ~ 2 6 ~r~ ~
~10--WE54,176 can be used then to identify the phase involved in a single line to ground fault.
In Figure 5, the sequence networks are connected for a phase B to phase C fault. The connection of the phase A sequence networks is shown since, by convention, phase A
is the reference phase, however, the networks for phases B
and C are similar. Figure 6 is the phasor diagram for this phase to phase fault. It should be noted that at the fault the sum IBF of the positive and negative sequence currents, lQ IlB + I2~, is the same magnitude as IlC + I2C =ICF, while IlA + I2~ equals zero.
Figure 7 illustrates the connection of the sequence networks for the reference phase, A, for a B to C
to ground fault in which the network impedances are assumed equal and reactive in order to derive the phasor diagram of Figure 8. In this latter figure, the phasors for the positive and zero sequence currents extend from the origin to the point on the associated locus representative of the particular ground resistance. Thus, it can be seen from Figure 8 that ground fault resistance, RG, influences the magnitude and phase of the positive and, zero sequence currents, Il and Io~ of each phase relative to the associated I2.
This effect of the ground fault resistance on the magnitude and phase relation of the phasors is one reason earlier phase selectors made erroneous selections during double line to ground faults. On the other hand, it will be noticed that in all cases t the magnitudes of the sums of the ~1 ~ 3'-~J~
WE54,176 positive and negative sequence currents of the two-phases faulted to ground are equal and are much larger than that of the unfaulted phase.
In Figure 9, possible loci for IlA ~ I2A, IlB +
I2B and I1C + I2C are shown for a practical range of the ratio of the reactive component of the zero sequence impedance, X0, to that of the negative sequence impedance, X2, from 0.5 to 2, and for ground fault resistance, 3RG, ranging from zero to infinity for a phase B to C to ground fault. The connection of these impedances in the sequence network is shown in Figure 10.
Figure 11 is a plot of the ratio (IlB t I2B)/(IlC
+I2C) for X0/X2 from 0 to 7 and for RG/Xo from 0 to 3 where:
¦IlB + I2B¦ =13 ~ MK + 1/2 + j ~ (K+l)¦
¦I1C ~ I2Cl ¦3 ~ MR - 1/2 + j ~ (K+l)¦
and K X0/Xl - As can be seen from Figure 11, the ratio remains between 1 and 1.35.
An examination of Figures 4c, 6 and 11, shows that only in the case of a single line to ground fault (Figure 4c) will the sum of the positive and negative sequence currents at the fault be twice as large for one phase as for the other two phases. Thus, a means exists to identify that \
-12- ~ 6~ r3~
WE5~,176 a fault is a single line to ground faul~ and to identify the faulted phase. A practical ratio to look for is 1.5, which is comfortably within the limits of 1.3S and 2. These figures also show that for phase to phase and phase to phase to ground faults the sum of the positive and negative sequence currents at the fault for the two faulted phases will be within a factor 1 to 1.35 of each other for practical values of line impedances and all values of ground resistance, so that such faults can be reliably identified when the sums of the positive and sequence components at the fault for two phases are both more than 1.35 times larger than that for the third phase.
The relationships established for currents at the fault can be deduced from currents available from the current transformers 6 in Figure 1 when it is recognized that:
1. Before the fault~ the available current is the load curren~.
2~ After the fault, the available current is the load and fault current.
3. The derivation of Il + I~ fault components is a relatively simple matter of subtracting the zero sequence current and prefault current from the fault current.
The advantage of deducing fault components Il + I2 at the line terminals becomes apparent. Because Zl=z2 and Dl=D2, the ratio of Il ~ I2 from phase to phase will be substantially the same at the actual current transformer location as at the fault.
In implementing the invention, the microprocessor WE54,176 based protective relays 4 and 5 of Figure 1 receive seven analog inputs including three phase to ground voltages VAG, VBG and VCG, the three phase currents I~, IB and IC and the zero sequence current 3Io. Each of the analog inputs is sampled in the exemplary system 8 times per cycle and converted to rectangular coordinates or phasors using, for example, the known Ful-l Cycle Fourier Algorithm. Only the current phasors IA, IB, IC and Io are utilized in the fault identification algorithm run by the microprocessors in the protective relays 4 and 5. The most recent phasors are retained on a continual basis. When a fault occurs, the retained most recent phasors represent the prefault currents, while the phasors then calculated represent the postfault currents, In the implementation of the invention, the inputs are:
IAL, IgL, ICL Measured prefault load currents 3 I0M IAM, IgM~ ICM Measured postfault currents The fault currents are determined by re~oving the zero sequence current from the postfault current and subtracting the prefault current in accordance with the calculations:
Io = 3IoM/3 (the zero sequence currents are all equal~
-14- ~3~
WE54, 176 .
IA = IAM - Io - IAL
a IB = IBM - Io - IBL
~ IC = ICM - Io - ICL
I 2A = [real (~ IA)]2 ~ [imag (~IA)]2 I2B = [real (~IB)]2 + [imag (~IB)]2 I2C = [real (~IC)]2 + [imag ( IC)]2 The magnitudes of the resultant fault currents are then compared. To avoid takiny square roots, the squares of the magnitudes are compared. To simplify and speed up the mathematics, a factor of 2 is used to compare the ratio of currents since this only requires a shift of the binary representation of the magnitude within the microprocessor.
Thus:
(1.5) = 2.~5,~,2 J~= 1.4 Using 2 for comparing the ratios of the square of the currents results in a reference value of 1.~ instead of the 1.5 referred to above. This value is still above the 1.35 value identified from Figure 11.
Figure 12 is a flow diagram illustrating the manner in which the comparisons are made for identifying a fault type. IA2 is compared with IB2 at 10. If IA~ is more -15- ~3~
WE54,176 than twice IB2 and is also more than twice Ic2 as determined at 11, the fault is identified at 12 as a single line to ground fault in phase Ao If IA2 and IC2 are both more than twice IB , as determined by the sequence 10, 11, 13 in Figure 12, then a phase A and C line to line, or line to line to ground fault is identified at 14. It is not necessary for the routine to distinguish between a phase to phase fault and a two phase to ground fault because in either case the desired response is to trip all three-phases. However, the determination can be easily madeby checking the zero sequence current. For a two-phase to ground fault there will be a sizable zero sequence current, while for a phase to phase fault there will be no zero sequence current.
Similarly, if IB2 is more than twice IC2 15, and I 2, at 16, a single phase to ground fault in phase B is identified at 17. On the other hand, if IB2, 15, and IA2 at 18, both exceed IC by a factor of 2, the fault is a phase A
to phase B line to line, or two line to ground fault at 19.
Likewise, if IC2 exceeds both IA2 at 20, and I~2 at 21, by a factor of two, a phase C to ground fault is indicated at at 22. In addition, when IC2 at 20 and IB2 at 23 are both at least twice as large as IA2, a phase B to C, phase to phase or two phase to realign last part of line ground fault is identified at 24. All other combinations of the magnitudes of the values IA2, IB2 and IC2 are considered balanced conditions at 25. A determination of whether such ~ 3 ~ 2 ~ r~ 1 WE54,176 a balanced condition is a three-phase fault is made through o~her functions of the protective relay which rely on measures of impedances within ~ones of protection as is known in the art.
The results of the algorithm can be su~marized by the following table:
Table Faulted Phase Selection Fault Typ~
_ , ., _ ... _., _ _ _ _ _ AG 8G CG A~ ~5~ CP~ ABG BCG CA~;
__ _ _ .~ . _ _ _ _ , _ _ ¦~!/ ¦ > I ~xl ~l ¦x x x ~_ _ __.__ __ lAl~ ~.5Xl lcl X X X _ _ ~_ _ _ _ __ _ __ I~ I > 1.5XI~ l X X X
~ _ _ ~ _ _ . . __ ~18l > ~-5XI~lcl x x . x ~ ~ __ __ _ __ _ lalcl> I.5XI~/~l X X X
~ .... _ _ _ _ _ _ , I'~cl > l.~xl~l~gl X X X
.... _ . ........ _ _. _ _ _ _ _ A~ discussed previously, a factor of 1.5 provides a preferred margin between resultant phase current magnitudes, but a factor of about 1.4 produced by using a factor of 2 in comparing the squares of the resultant currrents lends itself to easier implementation in the code of the microprocessor based protective relays.
As can be appreciated Erom the above, the present invention provides a reliable easily implemented method and -17- ,~ 6~
WE54,176 apparatus for correctly identifying single line to ground faults regardless of fault resistance and load conditions, and for correctly identifing line to line faults.
While specific embodiments of the invention have been described in detail, it will be appreciated by those skilled in the art that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure. Accordingly, the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the invention which is to be given the full breadth of the appended claims and any and all equivalents thereof.
Claims (13)
1. A method of identifying the type of fault in a three-phase electric power line comprising the steps of:
monitoring the power line currents, generating phasor representations of said monitored currents, continually retaining the most recent phasor representations prior to a fault as prefault current phasor representations, detecting the presence of a fault, and upon detection of a fault, generating resultant current phasor representations from said prefault current phasor representations and from postfault current phasor representations generated after detection of said fault, comparing magnitudes of said resultant current phasor representations, and identifying the type of fault as a function of the comparisons.
monitoring the power line currents, generating phasor representations of said monitored currents, continually retaining the most recent phasor representations prior to a fault as prefault current phasor representations, detecting the presence of a fault, and upon detection of a fault, generating resultant current phasor representations from said prefault current phasor representations and from postfault current phasor representations generated after detection of said fault, comparing magnitudes of said resultant current phasor representations, and identifying the type of fault as a function of the comparisons.
2. The method of claim 1 wherein monitoring the power line currents includes determining each phase current and a zero sequence current for the power line, wherein generating phasor representations includes generating phasor representations of each phase current and the zero sequence current, and wherein generating said resultant currents comprises subtracting from the postfault phasor representation for each phase current t the postfault zero WE54,176 sequence current phasor representation and the prefault phase current phasor representation for that phase.
3. The method of claim 2 wherein the step of identifying includes designating as a single phase to ground faulted phase, a phase for which said comparing step indicates that the magnitude of the resultant current phasor representation for that phase exceeds the magnitude of the resultant current phasor representations for each of the other two phases by a preselected amount.
4. The method of claim 3 wherein said preselected amount by which the magnitude of the relevant current phasor representation for the designated phase exceeds that of the other phases is a factor of at least about 1.4.
5. The method of claim 4 wherein said factor is about 2.
6. The method of claim 2 wherein the step of identifying includes designating as phases of a type of fault including phase to phase and phase to phase to ground faults, those phases for which the comparing step indicates that the magnitude of the resultant current phasor representations for those phases both exceed the resultant current phasor representation for the remaining phase by a preselected amount.
7. The method of claim 6 wherein said preselected amount by which the magnitude of the resultant current phasor representations for the designated phases exceed that of the other phase is a factor of at least about 1.4.
WE54,176
WE54,176
8. The method of claim 6 including, when two phases are designated as phases of a type of fault including phase to phase and phase to phase to ground faults, checking the magnitude of the postfault zero sequence current phasor representation and identifying said designated phases as the phases of a phase to phase fault when the magnitude of the postfault zero sequence current phasor representation is essentially zero, and identifying said designated phases as the phases of a phase to phase to ground fault when the magnitude of the postfault zero sequence current phasor representation is not essentially zero.
9. The method of claim 6 wherein said step of indentifying includes designating as a single phase to ground faulted phase, a phase for which said comparing step indicates that the magnitude of the resultant current phasor representation for that phase exceeds the magnitude of the resultant current phasor representation for each of the other two phases by a preselected amount.
10. A system for identifying the type of fault in a three-phase electric power line comprising:
means for generating signals representative of the currents and voltages in said power line;
micro-processor based relay means including:
means to periodically sample said current and voltage signals and to generate therefrom current and voltage phasor representations;
means to store the most recent phasor WE54,176 representations as prefault current and voltage phasor representations;
means to detect the presence of a fault;
means responsive to the detection of a fault to generate resultant current phasor representations from said prefault current phasor representations and from postfault current phasor representations generated after detection of said fault; means to compare magnitudes of said resultant current phasor representations; and means identifying the type of fault as a function of the comparisons; and means responsive to the type of fault identified for opening appropriate phases of the power line.
means for generating signals representative of the currents and voltages in said power line;
micro-processor based relay means including:
means to periodically sample said current and voltage signals and to generate therefrom current and voltage phasor representations;
means to store the most recent phasor WE54,176 representations as prefault current and voltage phasor representations;
means to detect the presence of a fault;
means responsive to the detection of a fault to generate resultant current phasor representations from said prefault current phasor representations and from postfault current phasor representations generated after detection of said fault; means to compare magnitudes of said resultant current phasor representations; and means identifying the type of fault as a function of the comparisons; and means responsive to the type of fault identified for opening appropriate phases of the power line.
11. The system of claim 10 wherein the means for generating signals representative of the currents in said power line include means for generating signals representative of the currents in each phase of the power line and of the zero sequence current; wherein the means generating phasor representations includes means generating phasor representations of each phase current and the zero sequence current, and wherein the means generating said resultant currents comprise means subtracting from the postfault phasor representation for each phase current, the postfault zero sequence current phasor representation and the prefault current phasor representation for that phase.
12. The system of claim 11 wherein said means for identifying the type of fault includes means designating as WE54,176 a single phase to ground faulted phase, a phase for which said comparing means indicates that the magnitude of the resultant current phasor representation for that phase exceeds the magnitude of the resultant current phasor representation for each of the other two phases by a preselected amount and designating as phases of a type of fault including phase to phase and phase to ground faults, those phases for which the comparing means indicates that the magnitude of the resultant current representations for those phases both exceed the resultant current phasor representation for the remaining phase by a preselected amount.
13. The system of claim 12 wherein the means for designating phases includes means for setting said preselected amount at at least a factor of 1.4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CA000592383A CA1312651C (en) | 1989-02-27 | 1989-02-27 | Method and apparatus for identifying a faulted phase |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA000592383A CA1312651C (en) | 1989-02-27 | 1989-02-27 | Method and apparatus for identifying a faulted phase |
Publications (1)
Publication Number | Publication Date |
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CA1312651C true CA1312651C (en) | 1993-01-12 |
Family
ID=4139710
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Application Number | Title | Priority Date | Filing Date |
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CA000592383A Expired - Fee Related CA1312651C (en) | 1989-02-27 | 1989-02-27 | Method and apparatus for identifying a faulted phase |
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CA (1) | CA1312651C (en) |
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1989
- 1989-02-27 CA CA000592383A patent/CA1312651C/en not_active Expired - Fee Related
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