CA1286736C - Voltage controlled oscillator with high speed current switching - Google Patents
Voltage controlled oscillator with high speed current switchingInfo
- Publication number
- CA1286736C CA1286736C CA000531986A CA531986A CA1286736C CA 1286736 C CA1286736 C CA 1286736C CA 000531986 A CA000531986 A CA 000531986A CA 531986 A CA531986 A CA 531986A CA 1286736 C CA1286736 C CA 1286736C
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- 239000003990 capacitor Substances 0.000 claims abstract description 58
- 230000005540 biological transmission Effects 0.000 claims abstract description 26
- 238000007599 discharging Methods 0.000 claims description 10
- 230000000295 complement effect Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
- 241000331231 Amorphocerini gen. n. 1 DAD-2008 Species 0.000 description 1
- NLZUEZXRPGMBCV-UHFFFAOYSA-N Butylhydroxytoluene Chemical compound CC1=CC(C(C)(C)C)=C(O)C(C(C)(C)C)=C1 NLZUEZXRPGMBCV-UHFFFAOYSA-N 0.000 description 1
- CHBRHODLKOZEPZ-UHFFFAOYSA-N Clotiazepam Chemical compound S1C(CC)=CC2=C1N(C)C(=O)CN=C2C1=CC=CC=C1Cl CHBRHODLKOZEPZ-UHFFFAOYSA-N 0.000 description 1
- 241001481828 Glyptocephalus cynoglossus Species 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002226 simultaneous effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Dc-Dc Converters (AREA)
- Dram (AREA)
- Electronic Switches (AREA)
Abstract
VOLTAGE CONTROLLED OSCILLATOR WITH HIGH
SPEED CURRENT SWITCHING
ABSTRACT OF THE DISCLOSURE
A CMOS voltage controlled oscillator includes a reference capacitor which is charged and discharged by current source and sink output transistors. The output transistors are connected to control transistors in a current mirror fashion with current through the control transistors being maintained at a level proportional to the value of a control input voltage. The control transistors are selectively connected to the output transistors in a current mirror configuration to provide either current source or sink operation. Transmission gates are connected between the gates of the output and control transistors and selectively closed to render the proper output transistor conductive to achieve source or sink operation. MOS capacitors are connected to the control transistors to facilitate rapid switching of the output transistors to enable high frequency operation of the voltage controlled oscillator.
SPEED CURRENT SWITCHING
ABSTRACT OF THE DISCLOSURE
A CMOS voltage controlled oscillator includes a reference capacitor which is charged and discharged by current source and sink output transistors. The output transistors are connected to control transistors in a current mirror fashion with current through the control transistors being maintained at a level proportional to the value of a control input voltage. The control transistors are selectively connected to the output transistors in a current mirror configuration to provide either current source or sink operation. Transmission gates are connected between the gates of the output and control transistors and selectively closed to render the proper output transistor conductive to achieve source or sink operation. MOS capacitors are connected to the control transistors to facilitate rapid switching of the output transistors to enable high frequency operation of the voltage controlled oscillator.
Description
~ 3 VOL~AGE CONTROLLED OSCILLATOR WIT~ HIG~
SPEED CURRENT SWITCHïNG
BACKGROUND OF T~E INVENTION
1. Field of the Invention The pre ent invention rela~es to voltage controlled oscillators ~VCO's), and more particularly to voltage controlled oscillators incorporating complementary metal oxide ~ilicon field effect transistor ~CMOS) circuitry. Voltage controlled oscillators are widely used in phase-locked loop (PLL) circuits.
A voltage controlled oQcillator operates to provide an output ~requency which is linearly related to a control input voltage. Typically~ this is achieved by providing a capacitor which iæ charged and discharged at a rate proportional to the control voltage. A
compara~or is provided to switch between charging and discharging when the voltage on the capacitor goes above or below first and second reference voltages, respectively.
SPEED CURRENT SWITCHïNG
BACKGROUND OF T~E INVENTION
1. Field of the Invention The pre ent invention rela~es to voltage controlled oscillators ~VCO's), and more particularly to voltage controlled oscillators incorporating complementary metal oxide ~ilicon field effect transistor ~CMOS) circuitry. Voltage controlled oscillators are widely used in phase-locked loop (PLL) circuits.
A voltage controlled oQcillator operates to provide an output ~requency which is linearly related to a control input voltage. Typically~ this is achieved by providing a capacitor which iæ charged and discharged at a rate proportional to the control voltage. A
compara~or is provided to switch between charging and discharging when the voltage on the capacitor goes above or below first and second reference voltages, respectively.
2. Descrip~ion of ~he Prior Art Voltage controlled oscillators including current source and current sinks for charging and discharging a capacitor are ~hown ln V.S. Patent Nos. 3,886,408 to 25 Takahashi, 3,904,988 to Hsiao, 4,263,567 to Astle and 4,321,561 to Payne et al. In both the Payne and Hsiao patents, current switching is provided by switching transistors which are located in the output curren~
path. Although generally acceptable, such circuits are 30 limited in that the incluæion of æwitching in the output ~LZ136~6 current pa~h introduces parasitic resistance and capacitance, thu8 slowing the swi~ching time. In order for the VCO to operate properly, it is desirable to have the current sink or source switched as rapidly as possible so that a uniform charging rate is achieved for the capaci~or. It i8 no~ pos~ible to achieve such rapid switching wi~h prior art circuits which include switching in the output current path.
~ 73 SUMMARy OF ~HE INV_NTION
The present invention i8 directed to a voltage controlled oscillator having a high switching speed.
The voltage controlled oscillator of the invention is capable of running at 10 M~z or above and is thus suitable for use in the phase-locked loop of a hard disk data separator. The circuit includes a reference capacitor which is charged and discharged by means of output transistor~ operatin~ as a current source or current sink. The output transistors are connected to control transistors in a current mirror configuration by means of transmission gates which are switched to control operatlon as a current source or current sink.
FET capacitor6 are connected to the gates of the current 15 mirror transistor~ so that the ou~put transistors can be rapidly switched. This assurPs a uniform charging and discharging rate for the capacitor which in turn assures precise oscillator operation.
~Z~73~
. BRIEF ~ S
The invention will be described with reference to the accompanying drawings, wherein:
Figure 1 is a schematic diagram of the voltage controlled oscillator of the present invention; and Figures 2A-2G are timing diagrams associated with the present invention.
~2~3~7~
DESCRIPTION OF THE PREEERRED EMBODIMENT
The following deæcription is of the best presently contemplated mode of carrying out the inven~ion. Thi~ descript~on is made for th~ purpose of illustrating the general principles of the invention and is not to be taken in a limiting sense~ The scope of the invention i8 best determined by re~erence to the appended claims.
Referring to Figure 1, the present invention is directed to an oscillator which provides a periodic output signal VC0 whose frequency is controlled by the value of an input control voltage Vc. A reference capacitor 10 is charged and discharged between two reference voltages under control of charging circuitry 12. The reference voltages are provided by means of a voltage divider network 14v the output of which is provided to a compara~or 16 which compareq the reference voltage to the voltage across the reference capacitor 10 .
The charging and discharging rate of the circuit is controlled by means of the control input voltage Vc.
This input volta~ge is converted to a control current by means of a voltage-to-current converter 18. The voltage-to-current converter includes an input resistor 20, an operational amplifier 22, a feedback resistor 24, an output resistor 26 and a bias resistor 28. The operating point of the oscillator is determined by means of an external resistor 30 which iB chosen to provide a desired control current level Ic corresponding to a given input voltage.
The control current Ic supplies and drlves a reference N-type FET transis~or 32. ~he value of the reference current flowing through the transistor 32 is thus dependent on the value of the control input voltage. The ~ranæistor 32 is connected in a current mirror configuration to an N-type transistor 34. Due to the common connection of ~he gates and sources of the transistors, the current through the transistor 34 will mirror the current through the transistor 32. The .. .. . .. . .
7~
current flowing through the transis~or 34 will also flow through a P-type transistor 36 whose drain and gate are connected to the drain o the transistor 34 and whose source is connected to a power supply Vcc. Thus, a current will flow through the transistor 34 and 36 and will have a value which i8 ~e~ermined by the value of the reference current ~lowing through the transistor 32.
The gates of the transistors 34 and 36 are coupled to the gates of output transistors 38 and 40, respectively, via transmission ga~es 42 and 44. The source of the transistor 38 is connected to ground and the source of the $ransistor 40 i~ connected to the power supply, whereas the drains of the transistors are interconnected and connected to one terminal of the referewe capacitor 10. The transistor 3~ is thus coupled to the transistor 34 in a current mirror configuration, and the transistor 40 is coupled to the transistor 36 in a current mirror configuration.
The transistors 38 and 40 are alternately switched on and off to control the charging and discharging of the reference capacitor 10. In order to charge the capacitor 10, the transmission gate 44 is closed to couple the transistor 36 to the transistor 40.
This will turn on the transistor 40 and cause current to flow through it and charge the reference capacitor 10.
When charging is complete, the transmission gate 44 is opened and a transmission gate 46 is closed to turn off the transifitor 40.
In order to ensure precise and rapid switching of the transistor 40, an FET capacitor 48 is connected to the gate of the transistor 36. This capaci~or stores a charge and provides ~ufficient instantaneous current to quickly switch the transistor 40 to the conductive state. In the present embodiment of the inventiont the capacitor 4~ has a value of approximately 30 picofarads and is biased at 3.5 volts gate-to-source voltage. The transistor 40 has a size approximately ten times that of the transis~or 36, and the current through it will be proportional to the current through the transistor 36 and in direct relation to the relative sizes of the transistors.
Thus, a current proportional to the control input voltage will flow ~hrough the transistor 36 and the transistor 40 will rapidly switch to a conductive state upon the closing of the transmission gate 44. Current through the transis~or 40 will thus change in a step fashion to a level which is propor~ional to the control input voltage. This current level will determine the lo charging rate of the capacitor 10.
Whereas ~he transistor 40 operates as a current source, the transistor 38 operates as a current sink to discharge the reference capacitor 10. It is rendered conductive by closing the transmission ga~e 42 to interconnect the gate of the transistor 38 with that of the transistor 34. The size of the transistor 38 is approximately ten times the Rize of the transistor 34, and the current through it will be proportional to the current through the transistor 34. Again, an MOS
capacitor 50 is provided so that sufficient instantaneous curren~ is available ~o rapidly switch the transistor 38 to ~he conductive state. One terminal of the capacitor 50 is connected ~o the supply vol~age to bias the capaci~or 50 to achieve proper MOS capacitor operation. The value of the capacitor 50 i8 the same as that of the capacitor 48, i.e., approximately 30 pico-farads in the present embodiment of the invention. An additional tran~misslon gate 52 is provided to connect the gate of the ~ransistor 38 to ground to witch off the transistor.
High and low reference vol~ages (three volts and two volts in the presen~ embodiment of ~he invention) are provided by means of a vol~age divider including five interconnected transistors 54, 56, 58, 60 and 62.
One of the two reference voltages is provided to the inverting input of the comparator 16 by appropriately controlling two transmission gates 64 and 66. The transmission gates are alterna~ely switched, and MOS
capacitors 68 and 70 are proqided to facilitate rapid ~2~
changing of the value of ~he re~erence voltage applied to the comparator 16.
The operation of the voltage controlled oscillator of Figure 1 will be explained with reference to the timing diagrams of Figure 2~ Initially, the transmission gate 64 i8 closed and the transmission gate 66 is opened and the reference volta~e applied ~o the inverting input of the comparator 16 iR thereore three volts as indicated in Figure 2A. The tran~istor ~0 is 10 turned on and the current through it is a positive value whose magnitude is determined by the value of the input control voltage. The capacitor 10 will thus charge up at a constant rate determined by the magnitude of the current through the transistor 40, as indicated in Figure 2D.
When the vol~age on the capacitor 10 reaches three volts, the output of the comparator 16 will change states (Figure 2E). Thi~ output i8 applied to a first inverter 72 to provide the VC0 output. The complement of this output i~ provided by an inverter 74. These outputs are provided to the transmission gates 42, 44, 46, 52, 64 and 66.~ The switching of the output causes the transmission gate 4~ to open and the ~ransmission gate 46 to close, thereby switching off the transistor 40. Simultaneou~ly, the transmi~sion gate 42 will close and transmission gate 52 open to render the transistor 38 conductive. The capacitor 10 thus begins dîscharging through the transi~tor 38~ In addition, the transmission gate 66 is closed and the trans~is~ion gate 64 opened to change the reference voltage applied to the comparator from the three volt level to the two volt level as indicated in Figure 2~. The step change ln the current through the transis~or 38 as indicated in Figure 2C causes the capacitor to discharge at a constant rate as shown in Figure 2D. This di~charging ~ontinues until the two volt level is reached, at which the output of the comparato~ 16 will again change as shown in Figure 2E, thus changing the states of the output signal~ VC0 and VC0 as shown in Figures 2F and 2G.
2~3~j The provi~ion of ~he capacitors 48 and 50 enables the step change and current through the transistors 40 and 38 as shown in Fi~ures 2b and 2c to be achieved. In addition, the capacitors 6~ and 70 enable a step change 5 in the reference voltage between the three volt and two volt levels to be achieved. As a result, charging and discharging rates can be very precisely controlled. Accurate oscillator oFera~ion can be achieved at extremely high frequencies necessary for various applications such as 10 use in phase-locked loop data separators in disk drives.
The reference capacltors will charge and discharge between two reference voltages~ with the rate of charging being precisely controlled due to the rapid switching of the transistors 38 and 40.
path. Although generally acceptable, such circuits are 30 limited in that the incluæion of æwitching in the output ~LZ136~6 current pa~h introduces parasitic resistance and capacitance, thu8 slowing the swi~ching time. In order for the VCO to operate properly, it is desirable to have the current sink or source switched as rapidly as possible so that a uniform charging rate is achieved for the capaci~or. It i8 no~ pos~ible to achieve such rapid switching wi~h prior art circuits which include switching in the output current path.
~ 73 SUMMARy OF ~HE INV_NTION
The present invention i8 directed to a voltage controlled oscillator having a high switching speed.
The voltage controlled oscillator of the invention is capable of running at 10 M~z or above and is thus suitable for use in the phase-locked loop of a hard disk data separator. The circuit includes a reference capacitor which is charged and discharged by means of output transistor~ operatin~ as a current source or current sink. The output transistors are connected to control transistors in a current mirror configuration by means of transmission gates which are switched to control operatlon as a current source or current sink.
FET capacitor6 are connected to the gates of the current 15 mirror transistor~ so that the ou~put transistors can be rapidly switched. This assurPs a uniform charging and discharging rate for the capacitor which in turn assures precise oscillator operation.
~Z~73~
. BRIEF ~ S
The invention will be described with reference to the accompanying drawings, wherein:
Figure 1 is a schematic diagram of the voltage controlled oscillator of the present invention; and Figures 2A-2G are timing diagrams associated with the present invention.
~2~3~7~
DESCRIPTION OF THE PREEERRED EMBODIMENT
The following deæcription is of the best presently contemplated mode of carrying out the inven~ion. Thi~ descript~on is made for th~ purpose of illustrating the general principles of the invention and is not to be taken in a limiting sense~ The scope of the invention i8 best determined by re~erence to the appended claims.
Referring to Figure 1, the present invention is directed to an oscillator which provides a periodic output signal VC0 whose frequency is controlled by the value of an input control voltage Vc. A reference capacitor 10 is charged and discharged between two reference voltages under control of charging circuitry 12. The reference voltages are provided by means of a voltage divider network 14v the output of which is provided to a compara~or 16 which compareq the reference voltage to the voltage across the reference capacitor 10 .
The charging and discharging rate of the circuit is controlled by means of the control input voltage Vc.
This input volta~ge is converted to a control current by means of a voltage-to-current converter 18. The voltage-to-current converter includes an input resistor 20, an operational amplifier 22, a feedback resistor 24, an output resistor 26 and a bias resistor 28. The operating point of the oscillator is determined by means of an external resistor 30 which iB chosen to provide a desired control current level Ic corresponding to a given input voltage.
The control current Ic supplies and drlves a reference N-type FET transis~or 32. ~he value of the reference current flowing through the transistor 32 is thus dependent on the value of the control input voltage. The ~ranæistor 32 is connected in a current mirror configuration to an N-type transistor 34. Due to the common connection of ~he gates and sources of the transistors, the current through the transistor 34 will mirror the current through the transistor 32. The .. .. . .. . .
7~
current flowing through the transis~or 34 will also flow through a P-type transistor 36 whose drain and gate are connected to the drain o the transistor 34 and whose source is connected to a power supply Vcc. Thus, a current will flow through the transistor 34 and 36 and will have a value which i8 ~e~ermined by the value of the reference current ~lowing through the transistor 32.
The gates of the transistors 34 and 36 are coupled to the gates of output transistors 38 and 40, respectively, via transmission ga~es 42 and 44. The source of the transistor 38 is connected to ground and the source of the $ransistor 40 i~ connected to the power supply, whereas the drains of the transistors are interconnected and connected to one terminal of the referewe capacitor 10. The transistor 3~ is thus coupled to the transistor 34 in a current mirror configuration, and the transistor 40 is coupled to the transistor 36 in a current mirror configuration.
The transistors 38 and 40 are alternately switched on and off to control the charging and discharging of the reference capacitor 10. In order to charge the capacitor 10, the transmission gate 44 is closed to couple the transistor 36 to the transistor 40.
This will turn on the transistor 40 and cause current to flow through it and charge the reference capacitor 10.
When charging is complete, the transmission gate 44 is opened and a transmission gate 46 is closed to turn off the transifitor 40.
In order to ensure precise and rapid switching of the transistor 40, an FET capacitor 48 is connected to the gate of the transistor 36. This capaci~or stores a charge and provides ~ufficient instantaneous current to quickly switch the transistor 40 to the conductive state. In the present embodiment of the inventiont the capacitor 4~ has a value of approximately 30 picofarads and is biased at 3.5 volts gate-to-source voltage. The transistor 40 has a size approximately ten times that of the transis~or 36, and the current through it will be proportional to the current through the transistor 36 and in direct relation to the relative sizes of the transistors.
Thus, a current proportional to the control input voltage will flow ~hrough the transistor 36 and the transistor 40 will rapidly switch to a conductive state upon the closing of the transmission gate 44. Current through the transis~or 40 will thus change in a step fashion to a level which is propor~ional to the control input voltage. This current level will determine the lo charging rate of the capacitor 10.
Whereas ~he transistor 40 operates as a current source, the transistor 38 operates as a current sink to discharge the reference capacitor 10. It is rendered conductive by closing the transmission ga~e 42 to interconnect the gate of the transistor 38 with that of the transistor 34. The size of the transistor 38 is approximately ten times the Rize of the transistor 34, and the current through it will be proportional to the current through the transistor 34. Again, an MOS
capacitor 50 is provided so that sufficient instantaneous curren~ is available ~o rapidly switch the transistor 38 to ~he conductive state. One terminal of the capacitor 50 is connected ~o the supply vol~age to bias the capaci~or 50 to achieve proper MOS capacitor operation. The value of the capacitor 50 i8 the same as that of the capacitor 48, i.e., approximately 30 pico-farads in the present embodiment of the invention. An additional tran~misslon gate 52 is provided to connect the gate of the ~ransistor 38 to ground to witch off the transistor.
High and low reference vol~ages (three volts and two volts in the presen~ embodiment of ~he invention) are provided by means of a vol~age divider including five interconnected transistors 54, 56, 58, 60 and 62.
One of the two reference voltages is provided to the inverting input of the comparator 16 by appropriately controlling two transmission gates 64 and 66. The transmission gates are alterna~ely switched, and MOS
capacitors 68 and 70 are proqided to facilitate rapid ~2~
changing of the value of ~he re~erence voltage applied to the comparator 16.
The operation of the voltage controlled oscillator of Figure 1 will be explained with reference to the timing diagrams of Figure 2~ Initially, the transmission gate 64 i8 closed and the transmission gate 66 is opened and the reference volta~e applied ~o the inverting input of the comparator 16 iR thereore three volts as indicated in Figure 2A. The tran~istor ~0 is 10 turned on and the current through it is a positive value whose magnitude is determined by the value of the input control voltage. The capacitor 10 will thus charge up at a constant rate determined by the magnitude of the current through the transistor 40, as indicated in Figure 2D.
When the vol~age on the capacitor 10 reaches three volts, the output of the comparator 16 will change states (Figure 2E). Thi~ output i8 applied to a first inverter 72 to provide the VC0 output. The complement of this output i~ provided by an inverter 74. These outputs are provided to the transmission gates 42, 44, 46, 52, 64 and 66.~ The switching of the output causes the transmission gate 4~ to open and the ~ransmission gate 46 to close, thereby switching off the transistor 40. Simultaneou~ly, the transmi~sion gate 42 will close and transmission gate 52 open to render the transistor 38 conductive. The capacitor 10 thus begins dîscharging through the transi~tor 38~ In addition, the transmission gate 66 is closed and the trans~is~ion gate 64 opened to change the reference voltage applied to the comparator from the three volt level to the two volt level as indicated in Figure 2~. The step change ln the current through the transis~or 38 as indicated in Figure 2C causes the capacitor to discharge at a constant rate as shown in Figure 2D. This di~charging ~ontinues until the two volt level is reached, at which the output of the comparato~ 16 will again change as shown in Figure 2E, thus changing the states of the output signal~ VC0 and VC0 as shown in Figures 2F and 2G.
2~3~j The provi~ion of ~he capacitors 48 and 50 enables the step change and current through the transistors 40 and 38 as shown in Fi~ures 2b and 2c to be achieved. In addition, the capacitors 6~ and 70 enable a step change 5 in the reference voltage between the three volt and two volt levels to be achieved. As a result, charging and discharging rates can be very precisely controlled. Accurate oscillator oFera~ion can be achieved at extremely high frequencies necessary for various applications such as 10 use in phase-locked loop data separators in disk drives.
The reference capacltors will charge and discharge between two reference voltages~ with the rate of charging being precisely controlled due to the rapid switching of the transistors 38 and 40.
Claims (14)
1. A voltage controlled oscillator, comprising:
a reference capacitor which is periodically charged and discharged;
comparison means for comparing the voltage on the refer-ence capacitor to a first reference voltage when the capacitor is charging and a second reference voltage when the capacitor is discharging, wherein the output of the comparison means is the output of the oscillator and switches from a first level to a second level when the voltage on the capacitor equals the first reference voltage and from the second level to the first level when the voltage on the capacitor equals the second ref-erence voltage; and, pump means for periodically charging and discharging the reference capacitor at a rate determined by the value of an input voltage, said pump means including a first MOS tran-sistor for discharging the reference capacitor and a second complementary MOS transistor for charging the reference capa-citor, third and fourth complementary MOS transistors having a current flowing through them corresponding to the value of the input voltage, switching means for alternately connecting to-gether the gates of the first and third transistors to turn on the first transistor and the gates of the second and fourth transistors to turn on the second transistor, and first and second capacitors connected to the gates of the third and fourth transistors, respectively, said capacitors storing a charge to facilitate rapid turn-on of the first and second transistor.
a reference capacitor which is periodically charged and discharged;
comparison means for comparing the voltage on the refer-ence capacitor to a first reference voltage when the capacitor is charging and a second reference voltage when the capacitor is discharging, wherein the output of the comparison means is the output of the oscillator and switches from a first level to a second level when the voltage on the capacitor equals the first reference voltage and from the second level to the first level when the voltage on the capacitor equals the second ref-erence voltage; and, pump means for periodically charging and discharging the reference capacitor at a rate determined by the value of an input voltage, said pump means including a first MOS tran-sistor for discharging the reference capacitor and a second complementary MOS transistor for charging the reference capa-citor, third and fourth complementary MOS transistors having a current flowing through them corresponding to the value of the input voltage, switching means for alternately connecting to-gether the gates of the first and third transistors to turn on the first transistor and the gates of the second and fourth transistors to turn on the second transistor, and first and second capacitors connected to the gates of the third and fourth transistors, respectively, said capacitors storing a charge to facilitate rapid turn-on of the first and second transistor.
2. A voltage controlled oscillator as in claim 1 where-in the pump means includes input means for receiving the input voltage and providing a corresponding control current, said control current controlling the amount of current through the third and fourth transistors.
3. A voltage controlled oscillator as in claim 2 wherein the input means includes:
a voltage-to-current converter which receives the input voltage and converts it to an output current;
a bias resistor connected between a power supply and the output of the converter; and a MOS control transistor having a first electrode and gate electrode connected to the output of the converter, wherein the current through the control transistor is equal to the sum of the current through the bias resistor and the output current, and wherein the gate electrode of the control transistor is connected to the gate electrode of he third transistor to provide a current mirror configuration whereby the current through the third and fourth transistors corresponds to the current through the control transistor.
a voltage-to-current converter which receives the input voltage and converts it to an output current;
a bias resistor connected between a power supply and the output of the converter; and a MOS control transistor having a first electrode and gate electrode connected to the output of the converter, wherein the current through the control transistor is equal to the sum of the current through the bias resistor and the output current, and wherein the gate electrode of the control transistor is connected to the gate electrode of he third transistor to provide a current mirror configuration whereby the current through the third and fourth transistors corresponds to the current through the control transistor.
4. A voltage controlled oscillator as in claim 1 wherein the switching means includes a first transmission gate connected between the gates of the first and third transistors and a second transmission gate connected between the gates of the second and fourth transistors, wherein the transmission gates are alternately closed and opened to alternately turn the first and second transistors on and off.
5. A voltage controlled oscillator as in claim 4 including a third transmission gate connected between the gate of the first transistor and ground and being closed when the first transmission gate is opened, and a fourth transmission gate connected between the gate of the second transistor and a power supply, said fourth transmission gate being closed when the second transmission gate is opened, said third and fourth transmission gates facilitating rapid turn-off of the first and second transistors.
6. A voltage controlled oscillator as in claim 1 where-in the first and second capacitors are MOS capacitors.
7. A voltage controlled oscillator as in claim 6 where-in the first capacitor has a terminal connected to the gate of the third transistor and a terminal connected to a power sup-ply and wherein the second transistor has a terminal connected to the gate of the fourth transistor and a terminal connected to ground.
8. A voltage controlled oscillator as in claim 1 where-in the comparison means includes:
voltage switching means for connecting the first or second reference voltages to a reference terminal; and a comparator, wherein the reference capacitor is con-nected to one input thereof and the reference terminal is connected to the other input thereof, wherein the comparator output changes states at a frequency determined by the input voltage and wherein the switching means and voltage switching means are switched in response to the changing of the output of the comparator.
voltage switching means for connecting the first or second reference voltages to a reference terminal; and a comparator, wherein the reference capacitor is con-nected to one input thereof and the reference terminal is connected to the other input thereof, wherein the comparator output changes states at a frequency determined by the input voltage and wherein the switching means and voltage switching means are switched in response to the changing of the output of the comparator.
9. A voltage controlled oscillator as in claim 8 in-cluding a plurality of MOS transistors connected in a series diode configuration between a power supply and ground, wherein the first reference voltage is obtained at an output terminal of one of the transistors and the second reference voltage is obtained at an output terminal of another transistor.
10. A voltage controlled oscillator as in claim 9 in-cluding a third capacitor connected to the output terminal of said one transistor and a fourth capacitor connected to the output terminal of said another transistor, said third and fourth capacitors facilitating rapid switching at the refer-ence terminal between the first reference voltage and the second reference voltage.
11. A voltage controlled oscillator comprising:
a power supply;
input means for providing a control current corresponding to an input voltage;
fast switching current pump means for providing a current sink or source in which the value of current at an output terminal is a function of the control current, said pump means including:
a first MOS transistor of first conductivity type having a first electrode connected to the power supply, a second electrode connected to the output terminal, and a control electrode;
a second MOS transistor of second conductivity type having a first electrode connected to ground, a second electrode connected to the output terminal and a control electrode;
a third MOS transistor of first conductivity type having a first electrode connected to the power supply, a second electrode and a control electrode connected to the second electrode;
a fourth MOS transistor having a first electrode connected to ground, a second electrode connected to the second electrode of the third transistor and a control electrode driven by the input means, wherein equal currents pass through the third and fourth transistors at a level determined by the control current;
a first capacitor having a terminal connected to the control terminal of the third transistor and storing a charge;
a second capacitor having a terminal connected to the control terminal of the fourth transistor and storing a charge; and first switching means for alternately connecting (a) the control terminal of the first transistor to the control terminal of the third transistor to cause current proportional to the control current to flow through the first transistor to the output terminal, and (b) the control terminal of the second transistor to the control terminal of the fourth transistor to cause current proportional to the control current to flow through the second transistor from the output terminal;
a reference capacitor having one terminal connected to the output terminal and another terminal connected to ground, wherein the reference capacitor is alternately charged by the first transistor and discharged by the second transistor;
reference voltage means for providing a first reference voltage and a second reference voltage smaller than the first reference voltage;
comparison means having a first input connected to the output terminal and a second input connected to the reference voltage means; and second switching means for connecting the first or second reference voltage to the comparison means, wherein said first and second switching means are controlled by the output of the comparison means so that the reference capacitor is sequentially charged up to the first reference voltage and then discharged to the second reference voltage wherein the rate of charging and discharging is controlled by the control current, wherein the output of the comparison means is the output of the oscillator.
a power supply;
input means for providing a control current corresponding to an input voltage;
fast switching current pump means for providing a current sink or source in which the value of current at an output terminal is a function of the control current, said pump means including:
a first MOS transistor of first conductivity type having a first electrode connected to the power supply, a second electrode connected to the output terminal, and a control electrode;
a second MOS transistor of second conductivity type having a first electrode connected to ground, a second electrode connected to the output terminal and a control electrode;
a third MOS transistor of first conductivity type having a first electrode connected to the power supply, a second electrode and a control electrode connected to the second electrode;
a fourth MOS transistor having a first electrode connected to ground, a second electrode connected to the second electrode of the third transistor and a control electrode driven by the input means, wherein equal currents pass through the third and fourth transistors at a level determined by the control current;
a first capacitor having a terminal connected to the control terminal of the third transistor and storing a charge;
a second capacitor having a terminal connected to the control terminal of the fourth transistor and storing a charge; and first switching means for alternately connecting (a) the control terminal of the first transistor to the control terminal of the third transistor to cause current proportional to the control current to flow through the first transistor to the output terminal, and (b) the control terminal of the second transistor to the control terminal of the fourth transistor to cause current proportional to the control current to flow through the second transistor from the output terminal;
a reference capacitor having one terminal connected to the output terminal and another terminal connected to ground, wherein the reference capacitor is alternately charged by the first transistor and discharged by the second transistor;
reference voltage means for providing a first reference voltage and a second reference voltage smaller than the first reference voltage;
comparison means having a first input connected to the output terminal and a second input connected to the reference voltage means; and second switching means for connecting the first or second reference voltage to the comparison means, wherein said first and second switching means are controlled by the output of the comparison means so that the reference capacitor is sequentially charged up to the first reference voltage and then discharged to the second reference voltage wherein the rate of charging and discharging is controlled by the control current, wherein the output of the comparison means is the output of the oscillator.
12. A voltage controlled oscillator, comprising:
a power supply;
a voltage-to-current converter for receiving a control voltage and converting it to a corresponding control current at a first node;
a bias resistor connected between the power supply and the first node, wherein a bias current flows through the bias resistor and is summed with the control current to provide a reference current at the first node;
a reference N-type MOS transistor having its drain connected to the first node, its source connected to ground and its gate and drain interconnected, wherein the reference current flows through the reference transistor;
an N-type MOS second transistor having its source connected to ground and its gate connected to the gate of the reference transistor, wherein a current proportional to the reference current will flow through the second transistor;
a P-type MOS third transistor having its source connected to the power supply, its drain connected to the drain of the second transistor and its gate and drain interconnected, wherein current flowing through the third transistor will equal the current flowing through the second transistor;
a first MOS capacitor having a first terminal connected to the gate of the second transistor and a second terminal connected to one of the power supply and ground;
a second MOS capacitor having a first terminal connected to the gate of the third transistor and a second terminal connected to one of the power supply and ground;
a first MOS switch means having a first terminal connected to the gate of the second transitor and having a second terminal;
a second MOS switch means having a first terminal connected to the gate of the third transistor and having a second terminal;
an N-type MOS fourth transistor having its source connected to ground and its gate connected to the second terminal of the first switch means;
a third MOS switch means having a first terminal connected to the gate of the fourth transistor and a second terminal connected to ground;
a P-type MOS fifth transistor having its source connected to the power supply and its gate connected to the second terminal of the second switch means, wherein the drain of the fifth transistor is connected to the drain of the fourth transistor at a pump node;
a fourth MOS switch means having one terminal connected to the gate of the fifth transistor and a second terminal connected to the power supply;
a reference capacitor having one terminal connected to ground and another terminal connected to the pump node;
a comparator having a first input connected to the pump node and a second input;
reference voltage means for providing a first reference voltage and a second reference voltage which is lower than the first reference voltage;
a fifth MOS switch means for selectively applying the first reference voltage to the second input of the comparator a sixth MOS switch means for selectively applying the second reference voltage to the second input of the comparator;
wherein said switch means are controlled in accordance with the output state of the comparator wherein during a first time period the first, fourth and sixth switch means are open and the second, third and fifth switch means are closed, whereby the fifth transistor is rapidly turned on to a current level proportional to the current through the third transistor thereby charging the reference capacitor until the voltage across it is equal to the first reference voltage, and wherein during a second time period each of the switch means is switched to turn off the fifth transistor and turn on the fourth transistor to a current level proportional to the current through the second transistor to discharge the reference capacitor until the voltage across it equals the second reference voltage, at which point the switches are again switched, wherein the output of the comparator changes states at a frequency corresponding to the value of the control voltage.
a power supply;
a voltage-to-current converter for receiving a control voltage and converting it to a corresponding control current at a first node;
a bias resistor connected between the power supply and the first node, wherein a bias current flows through the bias resistor and is summed with the control current to provide a reference current at the first node;
a reference N-type MOS transistor having its drain connected to the first node, its source connected to ground and its gate and drain interconnected, wherein the reference current flows through the reference transistor;
an N-type MOS second transistor having its source connected to ground and its gate connected to the gate of the reference transistor, wherein a current proportional to the reference current will flow through the second transistor;
a P-type MOS third transistor having its source connected to the power supply, its drain connected to the drain of the second transistor and its gate and drain interconnected, wherein current flowing through the third transistor will equal the current flowing through the second transistor;
a first MOS capacitor having a first terminal connected to the gate of the second transistor and a second terminal connected to one of the power supply and ground;
a second MOS capacitor having a first terminal connected to the gate of the third transistor and a second terminal connected to one of the power supply and ground;
a first MOS switch means having a first terminal connected to the gate of the second transitor and having a second terminal;
a second MOS switch means having a first terminal connected to the gate of the third transistor and having a second terminal;
an N-type MOS fourth transistor having its source connected to ground and its gate connected to the second terminal of the first switch means;
a third MOS switch means having a first terminal connected to the gate of the fourth transistor and a second terminal connected to ground;
a P-type MOS fifth transistor having its source connected to the power supply and its gate connected to the second terminal of the second switch means, wherein the drain of the fifth transistor is connected to the drain of the fourth transistor at a pump node;
a fourth MOS switch means having one terminal connected to the gate of the fifth transistor and a second terminal connected to the power supply;
a reference capacitor having one terminal connected to ground and another terminal connected to the pump node;
a comparator having a first input connected to the pump node and a second input;
reference voltage means for providing a first reference voltage and a second reference voltage which is lower than the first reference voltage;
a fifth MOS switch means for selectively applying the first reference voltage to the second input of the comparator a sixth MOS switch means for selectively applying the second reference voltage to the second input of the comparator;
wherein said switch means are controlled in accordance with the output state of the comparator wherein during a first time period the first, fourth and sixth switch means are open and the second, third and fifth switch means are closed, whereby the fifth transistor is rapidly turned on to a current level proportional to the current through the third transistor thereby charging the reference capacitor until the voltage across it is equal to the first reference voltage, and wherein during a second time period each of the switch means is switched to turn off the fifth transistor and turn on the fourth transistor to a current level proportional to the current through the second transistor to discharge the reference capacitor until the voltage across it equals the second reference voltage, at which point the switches are again switched, wherein the output of the comparator changes states at a frequency corresponding to the value of the control voltage.
13. A voltage controlled oscillator as in claim 12 wherein the bias resistor and reference capacitor are external components and the remaining components are on a monolithic integrated circuit.
14. A voltage controlled oscillator as in claim 12 wherein the switch means are transmission gates.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US83950486A | 1986-03-14 | 1986-03-14 | |
| US839,504 | 1986-03-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1286736C true CA1286736C (en) | 1991-07-23 |
Family
ID=25279909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000531986A Expired - Fee Related CA1286736C (en) | 1986-03-14 | 1987-03-13 | Voltage controlled oscillator with high speed current switching |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS62242408A (en) |
| KR (1) | KR900004198B1 (en) |
| CA (1) | CA1286736C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112491397A (en) * | 2020-12-07 | 2021-03-12 | 成都锐成芯微科技股份有限公司 | Multi-frequency-point RC oscillator |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5763930A (en) * | 1980-09-24 | 1982-04-17 | Tektronix Inc | Signal generator |
-
1987
- 1987-03-12 JP JP62057894A patent/JPS62242408A/en active Pending
- 1987-03-13 KR KR1019870002271A patent/KR900004198B1/en not_active IP Right Cessation
- 1987-03-13 CA CA000531986A patent/CA1286736C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112491397A (en) * | 2020-12-07 | 2021-03-12 | 成都锐成芯微科技股份有限公司 | Multi-frequency-point RC oscillator |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62242408A (en) | 1987-10-23 |
| KR900004198B1 (en) | 1990-06-18 |
| KR870009557A (en) | 1987-10-27 |
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