CA1211844A - Digital voice compression having a digitally controlled agc circuit and means for including the true gain in the compressed data - Google Patents
Digital voice compression having a digitally controlled agc circuit and means for including the true gain in the compressed dataInfo
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- CA1211844A CA1211844A CA000448666A CA448666A CA1211844A CA 1211844 A CA1211844 A CA 1211844A CA 000448666 A CA000448666 A CA 000448666A CA 448666 A CA448666 A CA 448666A CA 1211844 A CA1211844 A CA 1211844A
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Abstract
ABSTRACT OF THE DISCLOSURE
Digital communication apparatus for use with telephone lines, and having a digitally controlled Automatic Gain Control (AGC) circuit and means for including the true gain in the compressed data is described. At a transmitting end of a telephone link, a linear prediction coding analyser is inter-faced with a digital-to-analog AGC and which controls the AGC to maintain the linear prediction coding analyser within a range of gain settings to ensure that a linear pre-dicting encoding algorithm is properly utilised. The gain information transmitted each frame is also adjusted by the same amount to reflect the actual gain of the digitised voice signal for proper synthesis at the receiver end. Echo suppression is also described.
Digital communication apparatus for use with telephone lines, and having a digitally controlled Automatic Gain Control (AGC) circuit and means for including the true gain in the compressed data is described. At a transmitting end of a telephone link, a linear prediction coding analyser is inter-faced with a digital-to-analog AGC and which controls the AGC to maintain the linear prediction coding analyser within a range of gain settings to ensure that a linear pre-dicting encoding algorithm is properly utilised. The gain information transmitted each frame is also adjusted by the same amount to reflect the actual gain of the digitised voice signal for proper synthesis at the receiver end. Echo suppression is also described.
Description
12118`~4 DIGITAL VOICE COMPRESSION HAVI~G A DIGITALLY
6 THE TRUE GAIN IN THE CO~lPRESSED D~TA
9 1. Field of the Invention The present invention relates to digital voice 11 transmission over telephone lines in which a digitized 12 voice signal of, e.g., 64,000 bits per second (bps) is 13 compressed t~, e.g., 2,400 bps for transmission over the 14 telephone bandwidth and an automatic gain control cir~uit is employed to facilitate the operation of the 16 digitized voice compression circuits, along with echo 17 suppression being used to improve system operation.
19 2. Background and Summarv of the Invention It is well ~nown in the prior art to digitize 21 the znalog signal output of, e.g., a t le~hone micro-22 phone, representing a voice signal, in order to transmit 23 the digital data over a telephone line. The digitized 24 signal, which may be converted back to an analog re~re-sentation of the digital data for the purpose of trans-26 mission over the telephone lines, as is also well known 27 in the art, is less susceptible to noise on the tele-28 phone line, is capable of multiplexed channel operation 29 in the telephone bandwidth, reduces crosstalk and enables relatively easy digital encryption for secure 31 transmission.
32 The digitized voice signal, which typically is 33 at, e.g., 64,000 bps, cannot be readily sent within the 34 available approximately 3,000 Hz bandwidth of the tele-phone lines or be readily sent multichannel at that bit . " ' ~. .
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! 11 lZ11844 `
rate within the available telephone line bandwidth. To
6 THE TRUE GAIN IN THE CO~lPRESSED D~TA
9 1. Field of the Invention The present invention relates to digital voice 11 transmission over telephone lines in which a digitized 12 voice signal of, e.g., 64,000 bits per second (bps) is 13 compressed t~, e.g., 2,400 bps for transmission over the 14 telephone bandwidth and an automatic gain control cir~uit is employed to facilitate the operation of the 16 digitized voice compression circuits, along with echo 17 suppression being used to improve system operation.
19 2. Background and Summarv of the Invention It is well ~nown in the prior art to digitize 21 the znalog signal output of, e.g., a t le~hone micro-22 phone, representing a voice signal, in order to transmit 23 the digital data over a telephone line. The digitized 24 signal, which may be converted back to an analog re~re-sentation of the digital data for the purpose of trans-26 mission over the telephone lines, as is also well known 27 in the art, is less susceptible to noise on the tele-28 phone line, is capable of multiplexed channel operation 29 in the telephone bandwidth, reduces crosstalk and enables relatively easy digital encryption for secure 31 transmission.
32 The digitized voice signal, which typically is 33 at, e.g., 64,000 bps, cannot be readily sent within the 34 available approximately 3,000 Hz bandwidth of the tele-phone lines or be readily sent multichannel at that bit . " ' ~. .
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! 11 lZ11844 `
rate within the available telephone line bandwidth. To
2 enable more conven-ent transmission and/or multiplexed
3 transmission, compression of the 64,000 bps digitized
4 voice signal is employed, as is known in the art. One method of compressing the 64,000 bps to, e.g., 2,400 bps 6 is to use a linear predictive coding technique known in 7 the art, a discussion of which is found, for example, in 8 Markel; Gray, Jr. & Wakita, ~L~near Prediction of Speech Theory and Practice,~ Speech Communication Research ~aboratory, Inc. Monograph No. 10 (1978~ With 11 compression to 2,400 bps, four simultaneous channels of 12 2,400 DpS each can be multi~le~ed via a modem onto a 13 9,600 bps data stream transmitted over the bandwidth of 14 the analog telephone lines.
The linear predictive coding technique employs 16 digital filtering of the 64,000 bps digitized voice in 17 digital resonating filters. Only digits repre~entative 18 of fundamental frequencies within the analog voice 19 signal are selected in the compression to 2,400 bps.
Speech is made up of pitch (voiced and unvoiced) and 21 amplitude components, with the pitch being derived from 22 the action of the human vocal cords. Pitch ranges va~y 23 from adult males, 50 150 Hz, adult females, 90-450 Hz 24 and children, 125-575 Hz. Thus, much of the fundamental frequencies in the voice of a telephone tal~er is 26 eliminated from the approximately 300-3000 Hz telephone 27 bandwidth. However, fundamental pitch frequencies can 28 be determined from, e.g., second or third harmonics.
29 Thus, e.g., 360 Hz is the second harmonic of 180 Hz and the third harmonic of 120 Hz. It is thus possible in 31 the linear predictive compression technique to transmit 32 a compressed form of digitized s?eech representing the 33 fundamental pitch frequencies, the voiced speech 12~183 44 1 component, and the' unvoiced speech component'to synthe-2 size these at the receiver end to simulate actual ' 3 speech, as is all well known in the art. In syntheslz-4 ing speech at the receiver end, the unvoiced components are represented by white noise, i.e., random binary.
6 bits, which, when synthesized with the voiced components 7 in the proper proportion, result in simulating actual 8 speech; when the resulting synthesized digital signals 9 at the receiver end, now expanded to 64,000 bps, are passed through a digital-to-analog converter, as is also 11 known in the art. The linear predictive coding tech-~2 nique uses a linear prediction algorithm, e.g., LPC-10. .
13 Fùndamentally what the linear predictive 14 coding does is to generate a set of, e.g., 10 numbers ~envelope prediction factors ? per frame at the trans-16 m~tter, based upon the actual data taken from the analog-17 to-digital conversion of the analog speech signal, at 18 64,000 bps. ~hese 10 numbers enable the receiver end to 19 generate by use of the linear predictive algorithm a full set of; e.g., 180 points per frame, e.g., '21 64,000 bps digit'ized voice. The 10 numbers per frame, 22 plus six bit~ representing pitch, six bits representing 23 RMS gain and a sync bit are transmitted every frame, 24 which amounts to 2400 bps. A frame in the example of the present invention is 22.5 milliseconds. The 10 . 26 numbers are generated in the transmitter from an analy-27 sis of the envelope of the digitized voice signal in the 28 frequency domain, and enable the reconstruction of the 29 envelope at the receiver end.
One problem with a technique like linear 31 prediction coding is that the amplitude of the speech 32 must be with'in certain limits for the prediction coding 33 algorithm to properly analyze the digital representa-34 tions of the analog speech signal to result in an accurate generation of the envelope prediction factors.
.' . . ..
lZ~1844 1 Digitally controlled AGC circuits, including those in 2 which the signals used for setting the gain of the AGC
3 are maintained in a stored memory, are known, in the 4 art, as shown, e.g., in United States Patent Nos. 4,213,097 to Chiu et al. (assigned to the assignee 6 of the present application); 4,016,557 to Zitelli et 7 al.; 3,464,022 to E. W. Locheed, Jr., et al.; 3,699,325 8 to Mon~gomery, Jr., et al.; 3,813,609 to Wilkes, et al.;
9 3,562,503 to Harris. The actual gain value sent to the receiver at the end of the transmission link may not be 11 accurate if gain has been adjusted at the transmitter 12 end in order to keep the gain within the linear predic-13 tion coding analyzer's limits. The prior art has not 14 adequately solved these problems. United States Patent No. 4,230,406 to Davis describes an AGC circ~it for 16 stabilizing speech waveforms for pitch. The unction 17 described is pitch detection and the stabilization is to 18 provide a uniform input in pitch, i.e., uniform amp~i-19 tude for the purpose of period detection, not for envelope detection.
21 There are presently in use both two-wire and 22 four-wire telephone transmission links. In the two-wire 23 system, analog speech or data signals are transmitted in 24 both directions with two wires. In the four-wire system there are two wires, each with an associated ground 26 wire, e.g., one for transmitting and one for receiving.
27 Because of processing delays inherent in the 28 compression/expansion of digitized voice, echo suppres-29 sion is of crucial importance. The prior art has not adequately solved this problem.
31 The present invention relates to employing at 32 the transmitter end a linear prediction coding analyzer 33 which is interfaced with a digital-to-analog automatic 34 gain control circuit and controis the automatic gain control circuit to maintain the linear prediction coding .., '.. ..
I
~ lZ118g4 -:
1 analyzer within a proper range of gain settings to 2 ensure the linear prediction coding algorithm can be 3 properly utilized. The transmitter software is thus 4 also possessed of data indicating to what extent the gain has been so adjusted, so that the gain information 6 transmitted each frame can be adjusted by that amount to 7 thereby reflect actual gain of the digitized voice 8 signal~for proper synthesis at the receiver end. In 9 addition, the present invention relates to features which assist in echo suppression. Echo suppression 11 includes software implementation in the present inven-12 tion enabling suppression of the same echo signal at its 13 originating end of the transmission link an~ at the 14 receiver end, and also includes use of, e.g., an opera- .
tional amplifier hybrid circuit.
16 .. The problems enumerated in the foregoing have 17 not been intended to be exhaustive, but rather are 18 representative of problems which have tended to impair 19 the effectiveness of limited bandwidth, e.g., telephone bandwidth, digital voice transmission apparatus used in 21 the prior art, particularly those using multichannel 22 transmission within the telephone bandwidth. Other note-23 worthy problems may also exist; however, those presented 24 above shouid be sufficient to demonstrate that limited bandwidth, e.g., telephone bandwidth digital voice trans-26 mission apparatus appearing in the prior art have not 27 been altogether satisfactory.
28 Similarly, the foregoing examples of the more 29 important features of the present invention have been given rather broadly in order that the detailed descrip-31 tion thereof which follows may be better understood and 32 the contribution to the art better appreciated. There 33 are, of course, additional features of this invention 34 that will be described hereinafter and which will form the subject matter of the appended claims. These other ~ 1211844 .
1 features of the present invention ~ill become apparent 2 with reference to the following detailed description of 3 a preferred embodiment of the invention in connection 4 with the accompanying drawings, wherein like reference numerals have been applied to like elements, in which:
8 ~ FIGURE l shows a block diagram of an analog 9 input/output circuit for digitized voice compression/
expansion and employing the automatic gain control and ~1 ¦ echo suppression features of the present invention;
12 ~IGURES 2 and 2A are a more detailed schematic 13 ¦ diagram of t~,e circuit of Figure l;
14 ¦ FIGURE 3 shows a block diagram of a digital 15 ¦ voice synthesizer employed in the receiver of a voice 16 ¦ transmission link using the present invention;
17 ¦ FIGURE 4 shows a flow chart for software 18 ¦ implementation of automatic gain control in accordance 19 ¦ with the present invention;
20 ¦ FIGURES 5 and 5A show a flow chart for soft-21 ¦ ware implementation of echo suppression in accordance 22 ¦ with the present invention.
23 ¦ FIGURE 6 shows a further detail of the auto-24 ¦ matic gain control circuit according to the present invention; and, 26 ¦ FIG~RE 7 shows the timing OL an analog-27 ¦ digital/digital-analog converter in accordance with the 28 present invention.
29 Shown in Figure l is a block diagram of an analog input/output circuit 10 for digitized voice com-31 pression and expansion in accordance with the present 32 invention. ~he circuit 10 is adapted for connection 33 either to a two-wire or four-wire telephone transmission 34 link and thus has a two-wire to four-wire interface 12 35 ¦ an a four-wire interface 18. The two-wire to four-vire ., : .
!-. .
~ lZll~7~4 - ~
1 interface 12 is connected to two-wire telephone trahs-2 mission lines 14 and 16. The four-wire interface 18:is 3 connected to a telephone receive link 20, having an 4 associated ground connection 22, and a telephone trans-
The linear predictive coding technique employs 16 digital filtering of the 64,000 bps digitized voice in 17 digital resonating filters. Only digits repre~entative 18 of fundamental frequencies within the analog voice 19 signal are selected in the compression to 2,400 bps.
Speech is made up of pitch (voiced and unvoiced) and 21 amplitude components, with the pitch being derived from 22 the action of the human vocal cords. Pitch ranges va~y 23 from adult males, 50 150 Hz, adult females, 90-450 Hz 24 and children, 125-575 Hz. Thus, much of the fundamental frequencies in the voice of a telephone tal~er is 26 eliminated from the approximately 300-3000 Hz telephone 27 bandwidth. However, fundamental pitch frequencies can 28 be determined from, e.g., second or third harmonics.
29 Thus, e.g., 360 Hz is the second harmonic of 180 Hz and the third harmonic of 120 Hz. It is thus possible in 31 the linear predictive compression technique to transmit 32 a compressed form of digitized s?eech representing the 33 fundamental pitch frequencies, the voiced speech 12~183 44 1 component, and the' unvoiced speech component'to synthe-2 size these at the receiver end to simulate actual ' 3 speech, as is all well known in the art. In syntheslz-4 ing speech at the receiver end, the unvoiced components are represented by white noise, i.e., random binary.
6 bits, which, when synthesized with the voiced components 7 in the proper proportion, result in simulating actual 8 speech; when the resulting synthesized digital signals 9 at the receiver end, now expanded to 64,000 bps, are passed through a digital-to-analog converter, as is also 11 known in the art. The linear predictive coding tech-~2 nique uses a linear prediction algorithm, e.g., LPC-10. .
13 Fùndamentally what the linear predictive 14 coding does is to generate a set of, e.g., 10 numbers ~envelope prediction factors ? per frame at the trans-16 m~tter, based upon the actual data taken from the analog-17 to-digital conversion of the analog speech signal, at 18 64,000 bps. ~hese 10 numbers enable the receiver end to 19 generate by use of the linear predictive algorithm a full set of; e.g., 180 points per frame, e.g., '21 64,000 bps digit'ized voice. The 10 numbers per frame, 22 plus six bit~ representing pitch, six bits representing 23 RMS gain and a sync bit are transmitted every frame, 24 which amounts to 2400 bps. A frame in the example of the present invention is 22.5 milliseconds. The 10 . 26 numbers are generated in the transmitter from an analy-27 sis of the envelope of the digitized voice signal in the 28 frequency domain, and enable the reconstruction of the 29 envelope at the receiver end.
One problem with a technique like linear 31 prediction coding is that the amplitude of the speech 32 must be with'in certain limits for the prediction coding 33 algorithm to properly analyze the digital representa-34 tions of the analog speech signal to result in an accurate generation of the envelope prediction factors.
.' . . ..
lZ~1844 1 Digitally controlled AGC circuits, including those in 2 which the signals used for setting the gain of the AGC
3 are maintained in a stored memory, are known, in the 4 art, as shown, e.g., in United States Patent Nos. 4,213,097 to Chiu et al. (assigned to the assignee 6 of the present application); 4,016,557 to Zitelli et 7 al.; 3,464,022 to E. W. Locheed, Jr., et al.; 3,699,325 8 to Mon~gomery, Jr., et al.; 3,813,609 to Wilkes, et al.;
9 3,562,503 to Harris. The actual gain value sent to the receiver at the end of the transmission link may not be 11 accurate if gain has been adjusted at the transmitter 12 end in order to keep the gain within the linear predic-13 tion coding analyzer's limits. The prior art has not 14 adequately solved these problems. United States Patent No. 4,230,406 to Davis describes an AGC circ~it for 16 stabilizing speech waveforms for pitch. The unction 17 described is pitch detection and the stabilization is to 18 provide a uniform input in pitch, i.e., uniform amp~i-19 tude for the purpose of period detection, not for envelope detection.
21 There are presently in use both two-wire and 22 four-wire telephone transmission links. In the two-wire 23 system, analog speech or data signals are transmitted in 24 both directions with two wires. In the four-wire system there are two wires, each with an associated ground 26 wire, e.g., one for transmitting and one for receiving.
27 Because of processing delays inherent in the 28 compression/expansion of digitized voice, echo suppres-29 sion is of crucial importance. The prior art has not adequately solved this problem.
31 The present invention relates to employing at 32 the transmitter end a linear prediction coding analyzer 33 which is interfaced with a digital-to-analog automatic 34 gain control circuit and controis the automatic gain control circuit to maintain the linear prediction coding .., '.. ..
I
~ lZ118g4 -:
1 analyzer within a proper range of gain settings to 2 ensure the linear prediction coding algorithm can be 3 properly utilized. The transmitter software is thus 4 also possessed of data indicating to what extent the gain has been so adjusted, so that the gain information 6 transmitted each frame can be adjusted by that amount to 7 thereby reflect actual gain of the digitized voice 8 signal~for proper synthesis at the receiver end. In 9 addition, the present invention relates to features which assist in echo suppression. Echo suppression 11 includes software implementation in the present inven-12 tion enabling suppression of the same echo signal at its 13 originating end of the transmission link an~ at the 14 receiver end, and also includes use of, e.g., an opera- .
tional amplifier hybrid circuit.
16 .. The problems enumerated in the foregoing have 17 not been intended to be exhaustive, but rather are 18 representative of problems which have tended to impair 19 the effectiveness of limited bandwidth, e.g., telephone bandwidth, digital voice transmission apparatus used in 21 the prior art, particularly those using multichannel 22 transmission within the telephone bandwidth. Other note-23 worthy problems may also exist; however, those presented 24 above shouid be sufficient to demonstrate that limited bandwidth, e.g., telephone bandwidth digital voice trans-26 mission apparatus appearing in the prior art have not 27 been altogether satisfactory.
28 Similarly, the foregoing examples of the more 29 important features of the present invention have been given rather broadly in order that the detailed descrip-31 tion thereof which follows may be better understood and 32 the contribution to the art better appreciated. There 33 are, of course, additional features of this invention 34 that will be described hereinafter and which will form the subject matter of the appended claims. These other ~ 1211844 .
1 features of the present invention ~ill become apparent 2 with reference to the following detailed description of 3 a preferred embodiment of the invention in connection 4 with the accompanying drawings, wherein like reference numerals have been applied to like elements, in which:
8 ~ FIGURE l shows a block diagram of an analog 9 input/output circuit for digitized voice compression/
expansion and employing the automatic gain control and ~1 ¦ echo suppression features of the present invention;
12 ~IGURES 2 and 2A are a more detailed schematic 13 ¦ diagram of t~,e circuit of Figure l;
14 ¦ FIGURE 3 shows a block diagram of a digital 15 ¦ voice synthesizer employed in the receiver of a voice 16 ¦ transmission link using the present invention;
17 ¦ FIGURE 4 shows a flow chart for software 18 ¦ implementation of automatic gain control in accordance 19 ¦ with the present invention;
20 ¦ FIGURES 5 and 5A show a flow chart for soft-21 ¦ ware implementation of echo suppression in accordance 22 ¦ with the present invention.
23 ¦ FIGURE 6 shows a further detail of the auto-24 ¦ matic gain control circuit according to the present invention; and, 26 ¦ FIG~RE 7 shows the timing OL an analog-27 ¦ digital/digital-analog converter in accordance with the 28 present invention.
29 Shown in Figure l is a block diagram of an analog input/output circuit 10 for digitized voice com-31 pression and expansion in accordance with the present 32 invention. ~he circuit 10 is adapted for connection 33 either to a two-wire or four-wire telephone transmission 34 link and thus has a two-wire to four-wire interface 12 35 ¦ an a four-wire interface 18. The two-wire to four-vire ., : .
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~ lZll~7~4 - ~
1 interface 12 is connected to two-wire telephone trahs-2 mission lines 14 and 16. The four-wire interface 18:is 3 connected to a telephone receive link 20, having an 4 associated ground connection 22, and a telephone trans-
5 mission link 24, having an associated ground connec- .
6 tion 26.
7 Each of the two-wire to four-wire interface 12
8 and four-wire interface 18 i5 connected to a spectrum
9 shaping amplifier 32. The spectrum shaping amplifier 32 is connected through a suitcase strap or a selector ~1 switch 34 to an automatic gain control (A~C) section 36, 12 with the switch 34 also having a position selecting an .
13 ~GC 36 bypass throuyh a 47 Roh~, bypass resistor 38. The 14 output of the AGC 36 section and the bypass resistor 38 - .
are connected to the input filter half 46 of the band-16 p2~S filter 44 which passes only energy in the telephone 17 line bandwidth from about 300-3000 Hz. The output 18 filter half 48 of the same bandpass filter 44 is 19 connected to the telephone,handset speaker input 49 of the two-wire to four-wire interface 12 and to the 21 telephone handset speaker input 51 of the four-~ire 22 interface 18.
23 The input filter 46 is connected to an analog-24 to-digital converter half 52 of an analog-to-digital/
25 digital-to-analog converter 50 (A/D/A converter), the .
26 output of which is serialized digital data at 64,000 27 bps, representative of the analog input to the analog-28 to-digftal half 52. This serialized data at 64,000 bps 29 is passed to a ~erial-to-parallel converter 58 which provides an ~-bit word on output line 62 to an RMS
31 linear prediction analyzer portion of a linear predic-32 tion processor 41. The linear prediction analyzer 33 portion of the processor 41 performs the compression of 34 the 64,000 bps output of the serial-to-parallel con-verter 58 to 2,400 bps for transmission and a linear lZ11844 1 prediction synthesizer portion of the processor 41 2 performs an expanding conversion of 2,400 bps received 3 data to eight-bit words at 64,000 bps, which is an input 4 on line 64 to a parallel-to-serial converter 60. The 2,400 bits as compressed by the processor 41 is trans-6 mitted via, e.g., a modem (not shown) to a remote 7 location, and the 2,400 bps as expanded by the synthe-8 sizer portion of the processor 41 is that which has been received from a remote location, e.g., through a modem, (not shown) and the expanded 64,000 bps is used locally 11 to drive, e.g., a telephone handset speaker (not shown).
12 The parallel-to-serial conver~er 60 is connected through 13 a digital-to-analog converter 54 half of the A/D/~
14 converter 50 and a suitcase strap 56 to the output filter half 48.
16 The RMS analyzer portion of the processor 41 17 has a PDI section which provides an eight-bit control 18 signal on line 42 to the AGC section 36, depending up~n 19 the value of the root mean square (RMS) determined in the processor 41 during the compression function, as 21 will be more fully explained below.
22 Shown in Figures 2 and 2A is a more detailed 23 schematic view of the circuitry of ~igure 1. The two-24 wire to four-wire interface contained within phantom lines 12 is shown to have an off-hook detector am~li-26 fier 66, the negative input 68 of which is connected to 27 RING line 16 through a 160 Rshm resistor 72. The RlNG
28 line is connected to system ground, through a 47 ohm 29 resistor 70. The negative input 68 of the amplifier 66 is connected to system ground through a 1 microfared 31 capacitor 74.
32 The positive input 76 of the amplifier 66 is 33 connected to system supply voltge Vcc through a 10 Kohm 34 resistor 78 and is connected to system ground through the parallel connection of a 1.6 Kohm resistor 80 and a 12118~4 :
1 .01 microfarad capacitor 82. The output of amplifier 66 2 is connected to an OFF HOOR line, which gives an O~F
3 ~OOK enabling signal to the analyzer 41 software.
4 The two-wire to four-wire interface 12 is also shown to have a high voltage ringing circuit connected 6 to 180V through a diode 84. The diode 84 is a lN4004 7 rectifier diode. The high voltage ringing circuit 8 includes transistors 86, 88 and 90. Transistor 86 is a 9 PNP transistor, e.g., a 2N541~, having its base con-nected through a 4.7 Kohm resistor 92 to the diode 84 11 and through a 27 Kohm resistor 94 to the collector of an 12 NPN transistor 90, e.g., a 2N~439 the emitter of which :
13 is connected ~o grGund. The emitter of the tran-14 sistor 86 is connected to the diode 84 through a 47 oh~
resistor 98 and the collector of the transistor 86 is 16 connected through a 47 ohm resistor 100 to the colle'ctor 17 of an NPN transistor 88, e.g., a 2N3439, the emitter of 18 which is connected to ground~
19 The bases of transistors 88 and 90 are connected to TTL level signals Q10NH and Q20NH th'rough, 21 respectively, an'82 Xohm resistor 91 and a 360 ohm 22 resistor 93.
23 A node 102 between the collector of the 24 transistor 86 and the resistor 100 is connected to a node 104 between the anode of a diode 106 and cathode of 26 a diode 108. The cathode of the diode 106 is connected 27 to the cathode of the diode 84 and the anode of 28 diode 108 is connected to ground. The node 104 is 29 connected to the TIP line and to the cathode of a diode 110, the anode o which is connected to a 31 node 112. Each o~ the diodes 106, 108 and 110 are 32 IN4004 diodes.
33 Node 112 is connected to a ~12V bias su~ply 34 through an 82 ohm resistor 114 and an 82 ohm resis-tor 116, a node 118 between which is connected to ground .
1 through a .01 micro-farad capacitor 120. Node 112 is 2 connected to the positive input 122 of an impedance 3 matching hybrid operational amplifier 124 thereinafter 4 "the hybrid operational amplifier"). The negative input 125 of the hybrid operational amplifier 124 is 6 connected to node 112 throu~h a 1.2 Rohm resistor 128 7 and a 1.2 Kohm resistor 126. The hybrid operational 8 amplifi-er 124 has a negative feedback loop consisting of 9 a 27 ohm resistor 130, a 100 ohm variable resistor 132, a second 100 ohm variable resistor 134 and a second 11 27 ohm resistor 136, with a 55 millihenry inductor 138 12 connected between the variable resistors 132, 134 and 13 the output of the hybrid operational ampli~ier 124. The 14 output of the hybrid operational amplifier 124 is con-nected to a node 144 through a 0.068 microfarad capaci-16 tor 146 and a 9.1 Rohm resistor 148. Node 144 is the 17 output 28 of two-wire-to-four-wire interface 12 and is 18 connected to the output 30 of the four-wire interface 19 18, described in further detail below, through a 0.033 microfarad capacitor 140 and an 18 Koh~ resistor 142.
21 Node 144 is connected to the negative 22 input 150 of the spectrum shaping operational ampli-23 fier 152 contained within section 32, the positive 24 I input 151 of which amplifier 152 is connected to ground.
The operational amplifier 152 has a negative feedback 26 loop to the negative input 150 through a 39.2 Kohm 27 resistor 154. The output of the operational ampli-28 fier 152 is connected to switch 34, shown in Figure 2A, 29 through a 0.068 microfarad capacitor 153.
One position of switch 34 directs the output 31 of operational amplifier 152 to the AGC circuit 36 and a ~2 47 Rohm AGC input resistor 156 connected to ground. The 33 AGC circuit 36 is, e.g., an AD7524 made by Analog 34 Devices of Norwood, Massachusetts. The AGC circuit 36 35 l ha nputs D7-D0 from PDI pins PDI07-00 'rom the ,'. ' . ., ~..
1 analyzer 41 (shown in Figure 1) and CS and WR inputs 2 from PDICS3 and PDI ~RTL from the analyzer 41, with the 3 CS and WR inputs also connected to Vcc through 1 Kohm 4 resistors 155 and lS7, respectively.
5 The output, OUT 1, of the AGC circuit 36 LS :
6 connected to the VFXI- input of an Intel*2912 filter 44, 7 which VFXI- input is also connected to a second position 8 of switch 34 through the 47 Kohm AGC bypass resis-9 tor 38. The output, OUT 1 of the AGC 36 is also con-nected to ground through a zener diode 158, e.g., a 11 lN5711 diode made by Hewlett-Packard. The VFXI+ input 12 to the filter 44 is grounded. The GSX pin of ~he 13 filter 44 is connected to RFB in the AGC circuit 36 14 through a 39 Kohm resistor 160. The Vcc pin of the filter 44 is connected to Vcc and also is connected to 16 grpund ~hrough a .0I microfarad capacitor 162. The CLKO
17 pin of the filter 44 is connected to Vcc through a 18 1 K~hm resistor 166. The VFx output pin VFX0 of the 19 filter 44 is connected to the VFx input of the analog-to-digital half 52 of the A/D/A converter 50 through a 21 .3 microfarad capacitor 164 and to the AUTO input pin of 22 the A/D converter through voltage dividing resis-23 tors 170, a 150 Kohm resistor, and 172, a 332 oh~ resis-24 tor, and through a 475 Kohm resistor 176, connected to the node 174 between the resistors 170 and 172. The A/D
26 converter 50 is an Intel 2911.
27 The VFRI in~ut pin of the output half 48 of 28 the filter 44 is connected through a switchcase strap or 29 a switch 56 to either the VFx pin or the VF~ pin of the A/D/A converter 50. The ClX and C2X pins of the A/D/A
31 converter are connected through a 2200 picof arad capaci-32 tor 178. : -33 The CLKC pin of the filter 44 is connected to 34 the IOCLK line. The CLKC pin on the A/D converter 50 is connected to Vcc through a 1 Kohm resistor 180. The TSX
* Trade Mark . ' .. ~, . . .
~ 12l121844 1 pin on the A/D/A converter 50 is connected to the RE pin 2 on the serial-to-parallel converter 58 and the CI pin on 3 the parallel-to-serial converter 60, and also is con-4 nected to a +5v source through a 1 Kohm resistor 186. i 5 The CLKX pin on the A/D/A converter 50 is connected .
6 through an inverter 182 to the CP pin on the serial-to-7 parallel conver~er 58 and to the CLKR pin of the A/D/A
8 converter 50. The QH pin of the parallel-to-serial 9 converter 60 is connected to the DR pin of the A/D/A
converter 50. Vcc of the A/D/A converter 50 is con-11 nected tv Vcc across a .01 microfarad capacitor 184.
12 The Dx pin of the A/D/A converter 50 is connected to the 13 DA pin of the serial-to-parallel converter 58.
14 The DE pin of the serial-to~parailel con-verter 58 is connected to the AD & NL line. The S/P, SE
16 and CLR pins of the serial-to-parallel converter 58 are 17 connected to the PULLUP 2 line. A pair of flip-18 flops 188 and 190 serve to generate an interrupt signal 19 on the ADINT line and a reset signal on the ADRST line in response to a clock signal on the SRCLK line. This 21 is a timing function to inform the analyzer 41 when data 22 is ready to be sent from the serial-to-parallel con-23 verter 58 and data is ready to be received by the 241 parallel-to-serial 60. Also the flip-flops 188 and 190 control the timing of transfer of data from the A/D/A
26 converter 50 to or from the converters 58 and 60. The 27 flip-flops 188 and 190 are connected to Vcc through a 28 1 Rohm resistor 191.
29 Negative voltage of -Sv is supplied to Vgg of the filter 44 across a l microfarad capacitor 192, and 31 to V8B of the A/D/A converter 50, from an A79M05 voltage 3~ regulator 194 (shown in Figure 2) made, for example, by 33 Fairchild of Mountain View, California, which is sup-plied with -12v across a 2 microfarad capacitor 196.
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- I 121l31844 1~ As shown in Figure 2 the output VFR0 of 2¦ filter 44 for driving the speaker in the telephone .
31 handset is connected thro~gh a 10 Kohm variable resis-4 ¦ tor 198 and a 10 Xohm resistor 200 to the negative S ¦ input 202 of an operational amplifier 2~4, the positive .
6 ¦ input 206 of which is connected to ground through an 7 ¦ 8.2 Kohm resistor 208. The operational amplifier 204 8 ¦ has a feedback loop to the negative input 202 thereof 9 ¦ through a 27 ~ohm resistor 210.
13 ~GC 36 bypass throuyh a 47 Roh~, bypass resistor 38. The 14 output of the AGC 36 section and the bypass resistor 38 - .
are connected to the input filter half 46 of the band-16 p2~S filter 44 which passes only energy in the telephone 17 line bandwidth from about 300-3000 Hz. The output 18 filter half 48 of the same bandpass filter 44 is 19 connected to the telephone,handset speaker input 49 of the two-wire to four-wire interface 12 and to the 21 telephone handset speaker input 51 of the four-~ire 22 interface 18.
23 The input filter 46 is connected to an analog-24 to-digital converter half 52 of an analog-to-digital/
25 digital-to-analog converter 50 (A/D/A converter), the .
26 output of which is serialized digital data at 64,000 27 bps, representative of the analog input to the analog-28 to-digftal half 52. This serialized data at 64,000 bps 29 is passed to a ~erial-to-parallel converter 58 which provides an ~-bit word on output line 62 to an RMS
31 linear prediction analyzer portion of a linear predic-32 tion processor 41. The linear prediction analyzer 33 portion of the processor 41 performs the compression of 34 the 64,000 bps output of the serial-to-parallel con-verter 58 to 2,400 bps for transmission and a linear lZ11844 1 prediction synthesizer portion of the processor 41 2 performs an expanding conversion of 2,400 bps received 3 data to eight-bit words at 64,000 bps, which is an input 4 on line 64 to a parallel-to-serial converter 60. The 2,400 bits as compressed by the processor 41 is trans-6 mitted via, e.g., a modem (not shown) to a remote 7 location, and the 2,400 bps as expanded by the synthe-8 sizer portion of the processor 41 is that which has been received from a remote location, e.g., through a modem, (not shown) and the expanded 64,000 bps is used locally 11 to drive, e.g., a telephone handset speaker (not shown).
12 The parallel-to-serial conver~er 60 is connected through 13 a digital-to-analog converter 54 half of the A/D/~
14 converter 50 and a suitcase strap 56 to the output filter half 48.
16 The RMS analyzer portion of the processor 41 17 has a PDI section which provides an eight-bit control 18 signal on line 42 to the AGC section 36, depending up~n 19 the value of the root mean square (RMS) determined in the processor 41 during the compression function, as 21 will be more fully explained below.
22 Shown in Figures 2 and 2A is a more detailed 23 schematic view of the circuitry of ~igure 1. The two-24 wire to four-wire interface contained within phantom lines 12 is shown to have an off-hook detector am~li-26 fier 66, the negative input 68 of which is connected to 27 RING line 16 through a 160 Rshm resistor 72. The RlNG
28 line is connected to system ground, through a 47 ohm 29 resistor 70. The negative input 68 of the amplifier 66 is connected to system ground through a 1 microfared 31 capacitor 74.
32 The positive input 76 of the amplifier 66 is 33 connected to system supply voltge Vcc through a 10 Kohm 34 resistor 78 and is connected to system ground through the parallel connection of a 1.6 Kohm resistor 80 and a 12118~4 :
1 .01 microfarad capacitor 82. The output of amplifier 66 2 is connected to an OFF HOOR line, which gives an O~F
3 ~OOK enabling signal to the analyzer 41 software.
4 The two-wire to four-wire interface 12 is also shown to have a high voltage ringing circuit connected 6 to 180V through a diode 84. The diode 84 is a lN4004 7 rectifier diode. The high voltage ringing circuit 8 includes transistors 86, 88 and 90. Transistor 86 is a 9 PNP transistor, e.g., a 2N541~, having its base con-nected through a 4.7 Kohm resistor 92 to the diode 84 11 and through a 27 Kohm resistor 94 to the collector of an 12 NPN transistor 90, e.g., a 2N~439 the emitter of which :
13 is connected ~o grGund. The emitter of the tran-14 sistor 86 is connected to the diode 84 through a 47 oh~
resistor 98 and the collector of the transistor 86 is 16 connected through a 47 ohm resistor 100 to the colle'ctor 17 of an NPN transistor 88, e.g., a 2N3439, the emitter of 18 which is connected to ground~
19 The bases of transistors 88 and 90 are connected to TTL level signals Q10NH and Q20NH th'rough, 21 respectively, an'82 Xohm resistor 91 and a 360 ohm 22 resistor 93.
23 A node 102 between the collector of the 24 transistor 86 and the resistor 100 is connected to a node 104 between the anode of a diode 106 and cathode of 26 a diode 108. The cathode of the diode 106 is connected 27 to the cathode of the diode 84 and the anode of 28 diode 108 is connected to ground. The node 104 is 29 connected to the TIP line and to the cathode of a diode 110, the anode o which is connected to a 31 node 112. Each o~ the diodes 106, 108 and 110 are 32 IN4004 diodes.
33 Node 112 is connected to a ~12V bias su~ply 34 through an 82 ohm resistor 114 and an 82 ohm resis-tor 116, a node 118 between which is connected to ground .
1 through a .01 micro-farad capacitor 120. Node 112 is 2 connected to the positive input 122 of an impedance 3 matching hybrid operational amplifier 124 thereinafter 4 "the hybrid operational amplifier"). The negative input 125 of the hybrid operational amplifier 124 is 6 connected to node 112 throu~h a 1.2 Rohm resistor 128 7 and a 1.2 Kohm resistor 126. The hybrid operational 8 amplifi-er 124 has a negative feedback loop consisting of 9 a 27 ohm resistor 130, a 100 ohm variable resistor 132, a second 100 ohm variable resistor 134 and a second 11 27 ohm resistor 136, with a 55 millihenry inductor 138 12 connected between the variable resistors 132, 134 and 13 the output of the hybrid operational ampli~ier 124. The 14 output of the hybrid operational amplifier 124 is con-nected to a node 144 through a 0.068 microfarad capaci-16 tor 146 and a 9.1 Rohm resistor 148. Node 144 is the 17 output 28 of two-wire-to-four-wire interface 12 and is 18 connected to the output 30 of the four-wire interface 19 18, described in further detail below, through a 0.033 microfarad capacitor 140 and an 18 Koh~ resistor 142.
21 Node 144 is connected to the negative 22 input 150 of the spectrum shaping operational ampli-23 fier 152 contained within section 32, the positive 24 I input 151 of which amplifier 152 is connected to ground.
The operational amplifier 152 has a negative feedback 26 loop to the negative input 150 through a 39.2 Kohm 27 resistor 154. The output of the operational ampli-28 fier 152 is connected to switch 34, shown in Figure 2A, 29 through a 0.068 microfarad capacitor 153.
One position of switch 34 directs the output 31 of operational amplifier 152 to the AGC circuit 36 and a ~2 47 Rohm AGC input resistor 156 connected to ground. The 33 AGC circuit 36 is, e.g., an AD7524 made by Analog 34 Devices of Norwood, Massachusetts. The AGC circuit 36 35 l ha nputs D7-D0 from PDI pins PDI07-00 'rom the ,'. ' . ., ~..
1 analyzer 41 (shown in Figure 1) and CS and WR inputs 2 from PDICS3 and PDI ~RTL from the analyzer 41, with the 3 CS and WR inputs also connected to Vcc through 1 Kohm 4 resistors 155 and lS7, respectively.
5 The output, OUT 1, of the AGC circuit 36 LS :
6 connected to the VFXI- input of an Intel*2912 filter 44, 7 which VFXI- input is also connected to a second position 8 of switch 34 through the 47 Kohm AGC bypass resis-9 tor 38. The output, OUT 1 of the AGC 36 is also con-nected to ground through a zener diode 158, e.g., a 11 lN5711 diode made by Hewlett-Packard. The VFXI+ input 12 to the filter 44 is grounded. The GSX pin of ~he 13 filter 44 is connected to RFB in the AGC circuit 36 14 through a 39 Kohm resistor 160. The Vcc pin of the filter 44 is connected to Vcc and also is connected to 16 grpund ~hrough a .0I microfarad capacitor 162. The CLKO
17 pin of the filter 44 is connected to Vcc through a 18 1 K~hm resistor 166. The VFx output pin VFX0 of the 19 filter 44 is connected to the VFx input of the analog-to-digital half 52 of the A/D/A converter 50 through a 21 .3 microfarad capacitor 164 and to the AUTO input pin of 22 the A/D converter through voltage dividing resis-23 tors 170, a 150 Kohm resistor, and 172, a 332 oh~ resis-24 tor, and through a 475 Kohm resistor 176, connected to the node 174 between the resistors 170 and 172. The A/D
26 converter 50 is an Intel 2911.
27 The VFRI in~ut pin of the output half 48 of 28 the filter 44 is connected through a switchcase strap or 29 a switch 56 to either the VFx pin or the VF~ pin of the A/D/A converter 50. The ClX and C2X pins of the A/D/A
31 converter are connected through a 2200 picof arad capaci-32 tor 178. : -33 The CLKC pin of the filter 44 is connected to 34 the IOCLK line. The CLKC pin on the A/D converter 50 is connected to Vcc through a 1 Kohm resistor 180. The TSX
* Trade Mark . ' .. ~, . . .
~ 12l121844 1 pin on the A/D/A converter 50 is connected to the RE pin 2 on the serial-to-parallel converter 58 and the CI pin on 3 the parallel-to-serial converter 60, and also is con-4 nected to a +5v source through a 1 Kohm resistor 186. i 5 The CLKX pin on the A/D/A converter 50 is connected .
6 through an inverter 182 to the CP pin on the serial-to-7 parallel conver~er 58 and to the CLKR pin of the A/D/A
8 converter 50. The QH pin of the parallel-to-serial 9 converter 60 is connected to the DR pin of the A/D/A
converter 50. Vcc of the A/D/A converter 50 is con-11 nected tv Vcc across a .01 microfarad capacitor 184.
12 The Dx pin of the A/D/A converter 50 is connected to the 13 DA pin of the serial-to-parallel converter 58.
14 The DE pin of the serial-to~parailel con-verter 58 is connected to the AD & NL line. The S/P, SE
16 and CLR pins of the serial-to-parallel converter 58 are 17 connected to the PULLUP 2 line. A pair of flip-18 flops 188 and 190 serve to generate an interrupt signal 19 on the ADINT line and a reset signal on the ADRST line in response to a clock signal on the SRCLK line. This 21 is a timing function to inform the analyzer 41 when data 22 is ready to be sent from the serial-to-parallel con-23 verter 58 and data is ready to be received by the 241 parallel-to-serial 60. Also the flip-flops 188 and 190 control the timing of transfer of data from the A/D/A
26 converter 50 to or from the converters 58 and 60. The 27 flip-flops 188 and 190 are connected to Vcc through a 28 1 Rohm resistor 191.
29 Negative voltage of -Sv is supplied to Vgg of the filter 44 across a l microfarad capacitor 192, and 31 to V8B of the A/D/A converter 50, from an A79M05 voltage 3~ regulator 194 (shown in Figure 2) made, for example, by 33 Fairchild of Mountain View, California, which is sup-plied with -12v across a 2 microfarad capacitor 196.
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- I 121l31844 1~ As shown in Figure 2 the output VFR0 of 2¦ filter 44 for driving the speaker in the telephone .
31 handset is connected thro~gh a 10 Kohm variable resis-4 ¦ tor 198 and a 10 Xohm resistor 200 to the negative S ¦ input 202 of an operational amplifier 2~4, the positive .
6 ¦ input 206 of which is connected to ground through an 7 ¦ 8.2 Kohm resistor 208. The operational amplifier 204 8 ¦ has a feedback loop to the negative input 202 thereof 9 ¦ through a 27 ~ohm resistor 210.
10 ¦ The output of the operational ampli~ier 202
11 ¦ is connected to a node 212, which is connected to a
12 ¦ node 214 between the resistors 126 and 128, and forms
13 ¦ the output for the signal to be passed through the '-wo-
14 ¦ wire to four-wire interface to the TIP line 14 for . .
15 ¦ driving the telephone speaker in the ~ull duplex system
16 ¦ on,the tip line 14. Node 212 is also connected to the
17 ¦ four-wire interface 18 through an 18 Kohm resistor 216.
18 ¦ The telephone speaker drive line 24 is .
19 ¦ connected through a 6i9 ohm resistor 230 to the output of an operatïonal amplifier 220, a negative input 218 of 21 which is connected to the resistor 216 and a positive 22 input 221 of which is connected to ground through a 23 13 Kohm resistor 222. The operational amplifier 220 has 24 a feedback loop connected to the negative input 218, including the parallel connection of a 9.1 Xohm 26 resistor 228.
27 FIGURE 3 shows a block diagram of a synthe-28 sizer 249 contained in the processor 41 in the present 29 invention. During each frame of 54 bits contained .
within the 2,400 bps received from the remote location 31 via, e;g., a modem (not shown), the synthesizer portion 32 of the processor 41 receives through a decoder 240 six 33 bits of data representing pitch, six bits of data 34 representing gain, 1 sync bit, and 10 words of variable 35 ~ t length from 5 eo 2, totalling 4~ bits o data from ! 1.
~ 1211844 1 which the synthesizer 249 contained in the processor 41 2 software, using the linear predictive algorithm, 3 generates 180 points defining the frequency spectrum 4 envelope of the analog speech to be synthesized. The 5 pitch data is employed to drive an oscillator 250 at the :
6 proper pitch. If pitch for that frame is 0, then an 7 electronic switch 252 in the synthesizer 249 is in the 8 position to be supplied with random digital nu~bers, 9 i.e., noise, from a random number generator 254. The oscillator 250 is connected to the switch 252 through a 11 filter 2S6 which spreads the spectrum of the oscil-12 lator 250 about its oscillating frequency for better 13 approximation cf speech ~y the synthesi~er 249. When 14 the switch 252 is thé position shown in FIGURE 3, the voicing decision is a voiced decision and when it is in 16 the position to receive noise, it is an unvoiced 17 decision.
18 A filter 258 is zn adjustable digital filter, 19 the output of which is controlled by the 10 numbers
27 FIGURE 3 shows a block diagram of a synthe-28 sizer 249 contained in the processor 41 in the present 29 invention. During each frame of 54 bits contained .
within the 2,400 bps received from the remote location 31 via, e;g., a modem (not shown), the synthesizer portion 32 of the processor 41 receives through a decoder 240 six 33 bits of data representing pitch, six bits of data 34 representing gain, 1 sync bit, and 10 words of variable 35 ~ t length from 5 eo 2, totalling 4~ bits o data from ! 1.
~ 1211844 1 which the synthesizer 249 contained in the processor 41 2 software, using the linear predictive algorithm, 3 generates 180 points defining the frequency spectrum 4 envelope of the analog speech to be synthesized. The 5 pitch data is employed to drive an oscillator 250 at the :
6 proper pitch. If pitch for that frame is 0, then an 7 electronic switch 252 in the synthesizer 249 is in the 8 position to be supplied with random digital nu~bers, 9 i.e., noise, from a random number generator 254. The oscillator 250 is connected to the switch 252 through a 11 filter 2S6 which spreads the spectrum of the oscil-12 lator 250 about its oscillating frequency for better 13 approximation cf speech ~y the synthesi~er 249. When 14 the switch 252 is thé position shown in FIGURE 3, the voicing decision is a voiced decision and when it is in 16 the position to receive noise, it is an unvoiced 17 decision.
18 A filter 258 is zn adjustable digital filter, 19 the output of which is controlled by the 10 numbers
20 ¦ defining the frequency spectrum envelop~ or that frame,
21 ¦ as generated by the synthesizer portion of the proc-
22 essor 41. This results in an output of the ilter 58
23 which corresponds quite closely to the analog speech
24 signal in the time domain originally digitized and compressed for transmission. This signal is amplified 26 in a gain amplifier 260 according to the value of the 27 gain (RMS) for that frame. This value is equal to the 28 measured RMS, which the analyzer 41 at a remote location 29 computed in performing the linear prediction coding, adjusted for the gain or attenuation, if any, introduced 31 in the AGC section 32 at the remote location to ensure 32 proper operation of the analyzer 41 at the remote loca-341~ tion compressing the digitized voice at 64,000 bps to , . ,.
Y
l51844 1 ¦ 2,400 bps by use of the linear prediction algorithm.
2 ¦ Therefore it is the true gain necessary to duplicate the 3 ¦ original analog speech -in volume.
4 ¦ The software implementation of automatic gain 5 ¦ control at the spea~er's end of the transmission link 6 ¦ provided by the analyzer 41 at that end during voice 7 ¦ compression is shown in the flow chart of FIGURE 4.
8 ¦ Modification of the gain in the AGC 36 is dependent upon 9 ¦ the RMS value in the analyzer 41. A programmed data 10 ¦ processor or hard wired large scale integrated circuit, i1 1 e.g., a microprocessor controller in the analyzer 41 12 starting at start 30~ (AGAINC) first sets the values for 13 VMAX = 85, RANGE = .63096, IDEAL = 512 and VINC = 4 in 14 block 302. A decision is then made in block 304 between whether the voicing decision in a given frame is a 16 v~iced decision or unvoiced decision, i.e., is there a 17 pitch value or is pitch = 0. If it is unvoiced the 18 count VCNT in an AGC accumulator within the micro-19 processor in the analyzer 41 is decremented by 1 in block 305. ~he count VCNT in the accumulator is then 21 checked in block 306 to see if it is greater than or 22 equal to zero. If it is not greater than or equal to 23 zero the count VCNT is set at zero in block 308.
24 Returning to block 304, if the decision is a voiced decision the AGCl loop is started at 310. The 26 VCNT is incremented in block 312 by VINC which equals 4.
27 The present value of RMS in the analyzer 41, ARMS, is 28 then compared in block 314 to see if it is greater than 29 the most recent peak value AVENG of ARMS. If it is greater, then AVENG is set to equal present ARMS in 31 block 316 representing now the most recent peak.
32 Regardless of whether AVENG needs to be reset, the 33 accumulated value of the AGC accumulator VCNT is then 34 compared in decision block 318 to see if it is less than the preselected value of V~lAX, in this case 85r ~f it `; ' ., ''' ' '' ..
'1'-~ 121~344 1 is, the no change NOCHNG instruction is initiated in 2 block 320. The result of the unvoiced instructions in 3 blocks 305, 306 and 308 is also to ultimately initiate 4 NOCHNG, as shown in FIGURE 4.
Returning now to block 318, if VCNT is not 6 less than VMAX, VCNT is set to zero in block 320 and a 7 decision is made whether to adjust the gain of the 8 AGC 36. The most recent pea}c A~SS, AVENG, is compared . 9 in block 322 to see if it is greater than or equal to generally a midpoint selected value, IDEAL, in this 11 case 512, and also if the difference between AVENG and 12 IDEAL is less than or equal to some value, ~ANGE. If it 13 is not > to :-DEAL and the difference is no~ < RANGE then 14 value GCNT in the gain accumulator is incremented in block 324 to GCNT I 1. After this, or if the decision 16 in block 322 is a yes decision, then the l)NTST instruc-17 tion is started in block 326. In block 328 IDEAL is 18 compared to see if it is greater tnan or equal to A~tENG
19 and if the difference between the AVENG and I~EAL is less than or equal to RANGE. If IDEAL is not less than 21 or equal to AVENG, and the difference is not less than 22 RANGE, the count GCNT is decremented by 1 in block 330.
23 Regardless of whether GCNT is decremented, the next 24 instruction executed is to start NOCHNG at block 320.
If the count in the gain accumulator GC2~T is less than 0 26 it is reset to 0 by the combination of the ste?s in 27 blocks 332 and 334. If GCNT is not less than 16 it is .
28 reset to 15 by the combination of the steps in .
29 blocks 336 and 338. The next instruction in block 339 provides for z look up in a memor~ table in the 31 analyzer 41 of a gain control signal to be provided to 32 the AGC 36 on lines PDI07-00 from the analyzer 41, based 34 upon the value of GCNT.
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~1 12~184~
l Thus the AGC controller in the analy~er 41 2 microprocessor assigns a value of -l to unvoiced deci-3 sions and +4 to voiced decisions. These are accumulate~
4 from frame to frame during the processing by the ana-lyzer 41 for making gain adjustment decisions for use in 6 the AGC 36 and correspond to whether there was data in 7 the respective frame indicating that pitch was present 8 in the~frame, as transmitted to the remote location in 9 the frame data. Only if VCNT exceeds VMAX is a gain l0 ¦ change permitted. This ensures that a speech-like ll signal is present and that enough intervals have 12 occurred on which to base a gain decision. Thus the 13 AGC 36 in the a~paratus o~ the present invention is ;
14 adjusted only in response to speech signals and only to keep these signals within the range necessary for proper 16 p.-pcessing by the analyzer 41 in accordance with the 17 linear predictive algorithm.
18 Once VCNT exceeds VMAX, an AGC 36 gain deci-l9 sion is made and VCNT is then set to zero to prevent rapid gain changes in the AGC 36. The parameter used 21 during voiced intervals is the most recent peak ARMS in 22 the analyzer 41 (AVENG) which is compared with the value 23 representative of the desired RMS. The sign of the dif-24 ference, as determined in the software, determines the direction of the gain change. No change is made if the 26 magnitude of the difference is less than a preselected 27 value, ~GE, since no change is needed if the magnitude 28 of the difference is such that the measured ARMS energy 29 is close to the selected IDEAL. If the difference is greater than the selected RANGE then a one-step change 31 of +2 db is made in the AGC 36, and AvENG is reset to 32 zero so that the next measured ~RMS will become AVENG.
33 The gain change is made by incrementing or 34 decrementing by one a four-bit counter GCNT within the microprocessor in the analyzer 4l. The count GCNT in ,' 1~ lZ11844 :
! -18-1 this counter is used within the software in the =na-2 lyzer 41, used for controlling the AGC 36, to address a 3 corresponding memory location and the new gain setting contained therein is written to the AGC ~6 on lines P~I07-00.
6 IDEAL is set at 512, which is half scale for 7 the RMS parameter. RANGE is a multiplier .63096 which 8 corresponds to 4 db (4 = 20 log (1/.63096). V~AX is 9 em~irically set at 85.
The analyzer 41 receives data at 64,000 bps 11 from the serial-to-parallel converter 58 and compresses 12 this data according to the linear predictive algorithm.
13 In the process it computes RMS on a frame-by-frame Dasis 14 and performs the decision-making process of whether to J.
adjust the gain of the AGC 36. The gain of the AGC 36 16 is thus available data for the analyzer 41, which 17 transmits, via, e.g., a modem (not shown), the true gain 18 (i.e., the ARMS adjusted by whatever value the AGC 36 19 gain has been adjusted to maintain the analyzer 41 in the proper range for accurately performing the linear 21 prediction algorithm) as part of the frame data, to an 22 analyzer 41 at a remote location. Using the actual data 23 for a frame, the analyzer 41 computes the best set of, 24 e.g., 10 linear prediction algorithm factors, from which the remote analyzer 41 can reconstruct the full-180 26 points of digital data representing the frequency domain 27 spectrum envelope for synthesis by a synthesizer 249 28 contained in the remote analyzer 41 to simulate a voice 29 signal which is an analog signal.
The analyzer 41 also receives compressed 31 2,400 bps data from a remote analyzer 41 via, e.g., a 32 modem (not shown). Using this data, and the linear 33 predictive al~orithm, it generates a frequency domain 34 spectrum envelope for each frame. It also receives pitch and gain data for each frame and from the pitch, .,.
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~, - . I 121~1844 l~ gain and envelope data it synthesizes in its synthesizer 21 portion 249 a 64,000 bps digital voice signal which is 31 converted in the A/D/A converter 50 to drive the speaker 41 in the local telephone handset.
51 Echo suppression of the present invention.is 61 partially software implemented and includes also 71 circuitry within the two-wire-to-four-wire interface 12 81 which -functions as an echo suppressor in the manner of 91 balancing network couplers in the prior art. These lO~ employ transformers to accomplish echo suppression by ll¦ balancing impedances. The echo suppressor of the 12¦ present invention is particularly suited to the present 13¦ system employing di~itize3 voice. In the interface 14¦ circuitry of the present invention the hybrid coupler of l51 the prior art is replaced with a hybrid coupling .
16¦ opçrational amplifier 124.
17 ¦ The source of echo in the interface circuitry 18 1 of the present invention is the two-wire to four-wire 19 1 load balancing circuit including operational ampli-201 fier 124. A~ the impedance of the two-wire load, i.e., 21 1 the telephone, varies from the impedance the balancing 22 ~ circuit expects to see, a larger amount of the synthe-23 1 sizer 249 output signal at node 214 is reflected into 24 1 the analog input to the analyzer 4l through the spectrum
Y
l51844 1 ¦ 2,400 bps by use of the linear prediction algorithm.
2 ¦ Therefore it is the true gain necessary to duplicate the 3 ¦ original analog speech -in volume.
4 ¦ The software implementation of automatic gain 5 ¦ control at the spea~er's end of the transmission link 6 ¦ provided by the analyzer 41 at that end during voice 7 ¦ compression is shown in the flow chart of FIGURE 4.
8 ¦ Modification of the gain in the AGC 36 is dependent upon 9 ¦ the RMS value in the analyzer 41. A programmed data 10 ¦ processor or hard wired large scale integrated circuit, i1 1 e.g., a microprocessor controller in the analyzer 41 12 starting at start 30~ (AGAINC) first sets the values for 13 VMAX = 85, RANGE = .63096, IDEAL = 512 and VINC = 4 in 14 block 302. A decision is then made in block 304 between whether the voicing decision in a given frame is a 16 v~iced decision or unvoiced decision, i.e., is there a 17 pitch value or is pitch = 0. If it is unvoiced the 18 count VCNT in an AGC accumulator within the micro-19 processor in the analyzer 41 is decremented by 1 in block 305. ~he count VCNT in the accumulator is then 21 checked in block 306 to see if it is greater than or 22 equal to zero. If it is not greater than or equal to 23 zero the count VCNT is set at zero in block 308.
24 Returning to block 304, if the decision is a voiced decision the AGCl loop is started at 310. The 26 VCNT is incremented in block 312 by VINC which equals 4.
27 The present value of RMS in the analyzer 41, ARMS, is 28 then compared in block 314 to see if it is greater than 29 the most recent peak value AVENG of ARMS. If it is greater, then AVENG is set to equal present ARMS in 31 block 316 representing now the most recent peak.
32 Regardless of whether AVENG needs to be reset, the 33 accumulated value of the AGC accumulator VCNT is then 34 compared in decision block 318 to see if it is less than the preselected value of V~lAX, in this case 85r ~f it `; ' ., ''' ' '' ..
'1'-~ 121~344 1 is, the no change NOCHNG instruction is initiated in 2 block 320. The result of the unvoiced instructions in 3 blocks 305, 306 and 308 is also to ultimately initiate 4 NOCHNG, as shown in FIGURE 4.
Returning now to block 318, if VCNT is not 6 less than VMAX, VCNT is set to zero in block 320 and a 7 decision is made whether to adjust the gain of the 8 AGC 36. The most recent pea}c A~SS, AVENG, is compared . 9 in block 322 to see if it is greater than or equal to generally a midpoint selected value, IDEAL, in this 11 case 512, and also if the difference between AVENG and 12 IDEAL is less than or equal to some value, ~ANGE. If it 13 is not > to :-DEAL and the difference is no~ < RANGE then 14 value GCNT in the gain accumulator is incremented in block 324 to GCNT I 1. After this, or if the decision 16 in block 322 is a yes decision, then the l)NTST instruc-17 tion is started in block 326. In block 328 IDEAL is 18 compared to see if it is greater tnan or equal to A~tENG
19 and if the difference between the AVENG and I~EAL is less than or equal to RANGE. If IDEAL is not less than 21 or equal to AVENG, and the difference is not less than 22 RANGE, the count GCNT is decremented by 1 in block 330.
23 Regardless of whether GCNT is decremented, the next 24 instruction executed is to start NOCHNG at block 320.
If the count in the gain accumulator GC2~T is less than 0 26 it is reset to 0 by the combination of the ste?s in 27 blocks 332 and 334. If GCNT is not less than 16 it is .
28 reset to 15 by the combination of the steps in .
29 blocks 336 and 338. The next instruction in block 339 provides for z look up in a memor~ table in the 31 analyzer 41 of a gain control signal to be provided to 32 the AGC 36 on lines PDI07-00 from the analyzer 41, based 34 upon the value of GCNT.
, . ,.
~ `- - !
~1 12~184~
l Thus the AGC controller in the analy~er 41 2 microprocessor assigns a value of -l to unvoiced deci-3 sions and +4 to voiced decisions. These are accumulate~
4 from frame to frame during the processing by the ana-lyzer 41 for making gain adjustment decisions for use in 6 the AGC 36 and correspond to whether there was data in 7 the respective frame indicating that pitch was present 8 in the~frame, as transmitted to the remote location in 9 the frame data. Only if VCNT exceeds VMAX is a gain l0 ¦ change permitted. This ensures that a speech-like ll signal is present and that enough intervals have 12 occurred on which to base a gain decision. Thus the 13 AGC 36 in the a~paratus o~ the present invention is ;
14 adjusted only in response to speech signals and only to keep these signals within the range necessary for proper 16 p.-pcessing by the analyzer 41 in accordance with the 17 linear predictive algorithm.
18 Once VCNT exceeds VMAX, an AGC 36 gain deci-l9 sion is made and VCNT is then set to zero to prevent rapid gain changes in the AGC 36. The parameter used 21 during voiced intervals is the most recent peak ARMS in 22 the analyzer 41 (AVENG) which is compared with the value 23 representative of the desired RMS. The sign of the dif-24 ference, as determined in the software, determines the direction of the gain change. No change is made if the 26 magnitude of the difference is less than a preselected 27 value, ~GE, since no change is needed if the magnitude 28 of the difference is such that the measured ARMS energy 29 is close to the selected IDEAL. If the difference is greater than the selected RANGE then a one-step change 31 of +2 db is made in the AGC 36, and AvENG is reset to 32 zero so that the next measured ~RMS will become AVENG.
33 The gain change is made by incrementing or 34 decrementing by one a four-bit counter GCNT within the microprocessor in the analyzer 4l. The count GCNT in ,' 1~ lZ11844 :
! -18-1 this counter is used within the software in the =na-2 lyzer 41, used for controlling the AGC 36, to address a 3 corresponding memory location and the new gain setting contained therein is written to the AGC ~6 on lines P~I07-00.
6 IDEAL is set at 512, which is half scale for 7 the RMS parameter. RANGE is a multiplier .63096 which 8 corresponds to 4 db (4 = 20 log (1/.63096). V~AX is 9 em~irically set at 85.
The analyzer 41 receives data at 64,000 bps 11 from the serial-to-parallel converter 58 and compresses 12 this data according to the linear predictive algorithm.
13 In the process it computes RMS on a frame-by-frame Dasis 14 and performs the decision-making process of whether to J.
adjust the gain of the AGC 36. The gain of the AGC 36 16 is thus available data for the analyzer 41, which 17 transmits, via, e.g., a modem (not shown), the true gain 18 (i.e., the ARMS adjusted by whatever value the AGC 36 19 gain has been adjusted to maintain the analyzer 41 in the proper range for accurately performing the linear 21 prediction algorithm) as part of the frame data, to an 22 analyzer 41 at a remote location. Using the actual data 23 for a frame, the analyzer 41 computes the best set of, 24 e.g., 10 linear prediction algorithm factors, from which the remote analyzer 41 can reconstruct the full-180 26 points of digital data representing the frequency domain 27 spectrum envelope for synthesis by a synthesizer 249 28 contained in the remote analyzer 41 to simulate a voice 29 signal which is an analog signal.
The analyzer 41 also receives compressed 31 2,400 bps data from a remote analyzer 41 via, e.g., a 32 modem (not shown). Using this data, and the linear 33 predictive al~orithm, it generates a frequency domain 34 spectrum envelope for each frame. It also receives pitch and gain data for each frame and from the pitch, .,.
Y ' . '. , 1. 1'`
~, - . I 121~1844 l~ gain and envelope data it synthesizes in its synthesizer 21 portion 249 a 64,000 bps digital voice signal which is 31 converted in the A/D/A converter 50 to drive the speaker 41 in the local telephone handset.
51 Echo suppression of the present invention.is 61 partially software implemented and includes also 71 circuitry within the two-wire-to-four-wire interface 12 81 which -functions as an echo suppressor in the manner of 91 balancing network couplers in the prior art. These lO~ employ transformers to accomplish echo suppression by ll¦ balancing impedances. The echo suppressor of the 12¦ present invention is particularly suited to the present 13¦ system employing di~itize3 voice. In the interface 14¦ circuitry of the present invention the hybrid coupler of l51 the prior art is replaced with a hybrid coupling .
16¦ opçrational amplifier 124.
17 ¦ The source of echo in the interface circuitry 18 1 of the present invention is the two-wire to four-wire 19 1 load balancing circuit including operational ampli-201 fier 124. A~ the impedance of the two-wire load, i.e., 21 1 the telephone, varies from the impedance the balancing 22 ~ circuit expects to see, a larger amount of the synthe-23 1 sizer 249 output signal at node 214 is reflected into 24 1 the analog input to the analyzer 4l through the spectrum
25 ~ shaping amplifier 32.
26 1 Because of the processing delay inherent in
27 ¦ digital voice transmission, especially Pmploying data
28 1 compression and expansion, even small amounts of echo
29 ¦ are annoying to the talker. The echo suppression
30 1 employed in the present invention effectively eliminates
31 1 this residual echo, and the flow chart for the software
32 1 implementation is shown in FIGURE 5.
33 1 Echo suppression is carried out by a combina-
34 1 tion of the use of the balancing hybrid operational
35 ¦ amplifier 124 and software analysis of the near talker . - ..
. ~ 1211~3~4 1 ~S in the analyzer 41, ARMS, and the far talker RMS in 2 the synthesizer, 249, SRMS. This determines whether the 3 user at the respective end of the transmission link is talking or listening during each frame and accordingly, attenuates A~MS or $RMS. This process begins in soft-6 ware, e.g., in the'analyzer 41, at START 350. In deci-7 sion bloc~ 352 the ARMS is compared to see if it is 8 greate~ than the most recent peak ARMS, i.e., ARMSP. If 9 it is then the ARMSP value is set to the present ARMS
value in block 354. Since decisions are made each frame 11 regarding which signal to suppress in order to suppress 12 echo effectively during pauses and at the end of talk-li ing, two delay functions are employed. The first is to 14 hold ARMSP at its most recent val~e for a selected time.
This is done in block 354 by setting the count CACNT in 16 an accumulator in the analyzer 41 to DCNT, equal to 16, , i 17 and which CACNT is decremented by 1 each frame for a 18 total of 16 frames, as long as ARMS is less than or ', 19 equal to ARMSP.
20, In decision block 356 SRMS is,compared to 21 SRMSP, the most recent peak SRMS. If it is greater, 22 then SRMSP is set to equai the present SRMS in 23 block 358. Also for the reasons explained above a delay 24 counter accumulator count CSCNT in an accumulator in the analyzer 41 is set to equal DCNT and is decremented by 1 26 once each frame for 16 frames as long as SRMS is less 27 than or equal to SRMSP.
28 In decision block 3`60 CACNT is compared to 0 29 and if less than or equal to 0 ARMSP is set at the present value of ARMS in block 362. This same function 31 is performed in decision block 364 and block 366 with 32 respect to CSCNT and SRMSP equa1 to the present S~IS.
33 A decision whether to at'tenuate SRMS is made 34 in decision block 368 by comparing ARMSP to a value T~RONE set at two-fifths scale, and also comparing to ... , , , ~, ."" ' ., !-1 ~ , ` iZ11~344 1 see if ARMSP is greater than or equal to SRMCiP plus a 2 fraction of the hybrid loss HLOSS. The f irst condition 3 makes certain that a reasonable volume of speech is 4 being transmitted/received and the second condition makes certain that the received energy is smaller, even 6 when a correction is made for hybrid impedance mismatch.
7 If these conditions are met an attenuating counter for 8 the synthesizer CNTA is set in block 370 at MAXCNT, 9 e.g , 16 and an attenuating counter for the analyzer CNT~ is set to zero. This results in SRMS attenuatior 11 at, e.g., 12 db each frame for as long as CNT~ is 12 greater than 0.
13 Similarly if SRMSP is greater than THRGNE and 14 SRMSP is greater than ARMSP + ~LOSS a decision is made in decision block 372 which results in block 374 in the 16 setting of an attenuating counter CNTS for the analyzer 17 at MAXCNT and the attenuating counter CNTA for the 18 synthesizer at 0, to attenuate ARMS for a selected 19 number of frames as CNTS decrements each frame from MAXC~7T which may be, e.g., 16.
21 Moving on to FIGURE 5A it is seen that ARMSP
22 and SRMSP are then compared in decision blocks 3?6 and 23 380, respectively, with a sécond threshold value THRTWO, 24 equal to four-fifths scale. If either is greater than this value then, respectively, the far talker or near 26 talker is interrupting and attenuation must be accord-27 ingly removed. This is done in ~locks 378 and 382 by 28 setting, respectively, CNTS or CNTA equal to 0.
~9 Decision bloc~s 384 and 386 control the actual attenuation so long as, respectively, CNTA is greater 31 than 0 or CNTS is greater than 0. In the former event 32 SRMS is set:in block 386 to equal SRMS minus, e.g., 33 12 db and in the latter event ARMS is set in blocX 390 34 to equal ARMS minus, e.g., 12 db.
'.
. " :
.. . ..
I 122~184~
1~ The decrementing function is performed in 2 ¦ block 392 by setting CNTA, CNTS, CAC~T and CSCNT each 3 ¦ equal to their respective values minus 1. The program 4 ¦ then returns to START from RETURN 394, to begin process-5 ¦ ing the data for the next frame.
6 ¦ Thus it can be seen that the software at each 7 ¦ end of the transmission link functions to attenuate the 8 ¦ proper^value, either SRMS or ARMS depending on whether 9 ¦ the near talker or far talker, as perceived by each 10 ¦ respective end of the transmission link, is the actual 11 talker, the other signal, either S~MS or ARMS, being 12 thereby determined to be echo and being attenuated to 13 suppress the echo.
14 Echo suppression also occurs in the four-wire 15 ..interface section of the two-wire to four-wire con-. 16 verter. The voltage at node 112, V112 is given by .
17 equation 1.
18 112 R126 + ZT (1) 21 where: VT = telephone MIC output voltage 22 ZT = telephone impedance .
23 VS c voltage at the output of operational .
24 amplifier 204 (the synthesizer output) .
26 Since the operational amplifier 124 is operat-27 ing with negative feedback, its negative input will .
28 track the positive input. A second node equation at the .
29 output of the amplifier 124 yields:
31 V112 - Vo + V112 - Vs = 0 (2) -- 32 Rf ~128 . ',.
~1 12~
1 where: Vo is the vol~cage at the output of the 2 operational amplifier 124 (the analyzer 3 input) 4 Rf is the equi~alent resistance of the feed-back resistance inductance network of. the 6 operation amplifier 124 8 - Substituting for V112 from equation 1 yields:
12~ Rf S ~(R126 + ZT) (Rf R128) R128~ .
13 ~ VT (R126 I ZT) (Rf R128) 16 ., For proper operation there should be no Vs 17 signal component in Vo. For this to occur, the ~irs~
18 term on the right side of equation 3 must equal zero.
19 That term equals zero when:
21 2T Rf 22 R126 + ZT R128 + Rf 24 In the design of the present invention, this requirement is satisfied using Rf = ZT and R128 = R126 26 Substituting these values into equation 3 yields Vo as a 27 f~nction of the microphone signal:
29 Vo = VT
In order to empiracally match ZT' measurements were taken of th 31 telephone impedance over a range of about 100 T. 4000 Hz at a 32 bias current of 16 ma. From this data a matching network accor( 1-33 ing to the present invention was synthesizec'. Since telephone 34 impedances vary from unit to unit, two adjustments are included in the ne~work by way of the variable resistors 132 and 134 and 198 in order to improve the nominal matching.
~ I 121~84~ :
1 The performance of the two-wire to four-wire 2 converter 12 is more critical in the present invention 3 than in a normal telephone channel since the processing 4 delay inherent in the use of digitized voice will produce sufficient delay in the echo path of the con-6 verter 12 (synthesïzer out to analyzer in) to disturb 7 the normal cadence of the talker.
8 - Once adjusted, the circuit yields approxi-9 mately 40 dB of loss in the echo path across the 100 to 4000 Hz spectrum. To null the circuit a signal 11 (1000 Hz, sinusoidal, .814 V~MS) is inserted at the 12 center post of suitcase strap 56 (with the strap 13 removed). Variable resistor 198 ,s adjusted (Rx Gain i4 Pot) to produce 1.1 ' .2 VRMS at the output of ampli-15 fier 204. This adjusts the receive gain and provides a .
i6 reference signal for the two-wire to four-wire balance 17 adjustment. The balance adjustment must be made with 18 the telephone connected to the RING and TIP lines and 19 with OFF HOOR activated. ~onitoring the output of the amplifier 152, variable resistor 132 and 134 are 21 adjusted to null the signal at that point. The signal , 22 ¦ level at that point should be at least 35 d~ lower than 23 at the output of amplifier 204. -24 The principal features of the operation of the present invention will be now described with reference 26 to FIGURES 2 and 2A. Bias current for the telephone is 27 produced using a series resistor network 116 and 114 to 28 +12 volts with a decoupling capacitor 120 to ground.
29 The ring driver 15 consists of a totem pole driver circuit which includes transistors 86, 88 and 90 31 and associated discrete components. The circuit uses 32 the TTL levei signals QlONH and Q20NH to alternately 33 switch the TIP line between 180V and ground. The design ..' ".
1~ lZ118~ ;
1 of the TTL drive signals includes a "dead time" between 2 state changes in which both transistor 88 and transis-3 tor 86 are off.
Diodes 108 and 106 limit the spiking which 5 occurs when the current in the bell coil of the tele- :
6 phone (not shownl tries to change rapidly. Diode liO
7 isolates the ringing voltage from the two-wire to four-8 wire converter 12. When the ring driver 15 is active 9 the voltage at node 112 will swing from 0 to ~12V, at 10 which point diode 110 turns off, while the cathode side 11 of diode 110 continues toward 180V.
12 When the ring driver 15 is inactive both 13 halves of the totem pole driver circuit are off, i:hereby t 14 presenting a very high impedance to the TIP line and 15 having no effect on the two-wire to four-wire conver-16 te~ 12 balance.
17 The hookswitch status detection is accom-18 plished by the amplifier 66 and its associated discrete :
19 components. Resistor 70 is a DC current sense resistor.
20 The voltage across resistor 70 is low pass filtered at 21 1 Hz by resistor 72 and capacitor 74 and compared (via 22 amplifier 66) to a fixed threshold at the junction of 23 resistors 78 and 80. In operation there are four 24 combinations of ring staté and hookswitch status which 25 the status detection circuitry must recognize. Each 26 combination is described below.
27 1. Ring Active, ON HOOR - for this state 28 (which occurs when a call is received) the TIP and ~ING
29 leads are AC coupled through the telephone bell circuit.
30 The voltage across the sense resistor 70 is therefore an ,, 31 AC signal (f approximately 20 Hz). The 1 Hz LPF ~resis- , 32 tor 72 and capacitor 74) prevents excursions of this 33 signal from exceeding the threshold and the O~HOOR
34 status does not change.
.., . ' ' .
r-.- .
' ' 12~18q4~
1 2. Rinq Active, OFF HOOK - in this state 2 (which occurs when a call is answered) the TIP and RING
3 lines are DC coupled through the telephone. The LPF
4 capacitor 82 charges to the average value of the rin~ .
signal, which exceeds the preselected threshold and 6 generates the OFFHOOR status, which should then be 7 sensed by software to turn off the ring signal.
~ 3. Ring Inactive ON HOOK - in this state 9¦ (which occurs when the telephone is no longer being used) the TIP and RING lines are again AC coupled. No 11¦ bias current can flow through the TIP and RING lines and `
12¦ the voltage across resistor 70 drops below the threshold 13 ~to 0VJ producing the ON HOOK indication.
14 4. Ring Inactive, OFF HOOK - in this state ~which occurs when a call is initiated or in-progress) 16 the TIP and RING lines are DC coupled. Bias current 17 flows through resistor 70 producing a voltage approxi-18 mately twice the threshold voltage at the LPF capaci-19 tor 82 output which produces the OFF HOO~ status.
The spectrum shaping amplifier 32 provides 21 any analog pre/de-emphasis which may be desirable for 22 the trans~it audio. It also sums the transmit analog 23 signals from both the two-wire and four-wire inputs.
24 The circuit is AC co~pled, via capacitors 146 and 140 to, respectively, the interfaces 12 and 18 to remove the 26 DC voltage resulting from the telephone bias currents.
27 The gains of the two-wire and four-wire transmit paths 28 can be set independently using resistor 148 and resis-29 tor 142 respectively. The nominal gain of the inter-faces are 14.3 dB for the two-wire; path in interface 12 31 and 3 dB for the four-wire path in interface 18. The 32 gains are set so that the signal peaks between capaci-33 tor 153 and switch 34 reach approximately 3 volts when 33s speaking ac a normal level. The output of the spectrum . . .
1211844 ;
1 shaping amplif ier 152 is AC coupled through capaci-2 tor 153 to the AGC circuit 36 to prevent a DC offset 3 voltage from causing unnecessary transitions in the 4 AGC 36 output signal as the gain is changed.
S The AGC circuit 36 and input filter 46 po.rtion 6 of the filter 44 are described together in further 7 detail here, as shown in FIGURE 6, because a ladder .
8 networ~ contained in the AGC 36 circuit and an inpu~
9 operational amplifier 375 contained in the filter 44 are 10 interconnected to form a composite gain block. The 11 equivalent circuit for the AGC 36 and a portion of the 12 input filter 46 circuit within the filter 44 is shown in . I
13 FIGURE 6~ . j.
14 Within the AGC circuit 36 is a feedback 15 resistor 376 which, together with feedbacX resistor 160 . .
16 ~cts as a negative feedback loop for operational ampli-17 fier 375. The AGC circuit 36 and the operational ampli- .
18 fier 375 also have an input resistor 378.
19 The gain of this AGC 36 and filter 44 circuit 20 from EIN at switch 34 to Eo at VFx at the output of the }
21 operational amplifier 375 in the filter circuit 44 22 VFxOis 23 ..
?4 G = = _ D (R160 + R376 27 where D is the digital code loaded into the AGC 36 (0 < .
28 D < 255) on pins PDI07-00 and resistors 376 and 378 are 29 nominally 10 Kohms. A digital-to-analog converter 380 in the AGG 36 circuit is connected to a precision refer-31 ence voltage Vref and provides a current output repre-.32 sentative of the value 256 ~ 1 where ~ is the digital 33 input to the AGC 36 on PDI07-00 from the analyzer 41.
~, .- ' '..
.-., .., , '' :
.
~2~18 ~
1 In operation the AGC 36 and input filter 46 2 circuits cover a gain range of 30 dB ~+14 dB to -16 dB), 3 in 2 dB ste2s, although the hardware is capable of 4 greater range and finer resolution. Table l lists the.
values of D stored in the memory in the analyzer 41 ., 6 corresponding to respective foùr-bit counts (0-lS
7 decimal) from the AGC controller accumulator GCNT in 8 the analyzer 41, along with the corresponding gains .9 ¦ based on the component values used in the AGC 36 and the 10 ¦ input filter 46 circuits.
Ll I The remainder of the in~ut filter 46 inte--12 grated circuit actually performs the low pass filter 13 ¦ function in filter 380 and introduces +3 dB gain in the 14 ¦ passband. The input filter 46 output on pin 16 ~VFxO) 15 ¦ of filter 44 is therefore 3 dB higher than the values 16 ¦ shown in Table 1. .
17 I .
18: ~ Table 1. AGC/Filter Gain Settings 19 GCNT D Gain in dB
0 255. + 13.8 21 1 203. + 11.7 22 2 162~ + 9.8 23 3 129. + 7.8 24 4 102. + 5.8 81. + 3.1 26 6 64. + 1.75 27 7 Sl. - .21 .
28 8 40. - 2.3 29 9 32. - 4.3 26. - 6.1 31 11 20. - 8.3 32 12 16. - 10.2 33 13 13. . - 12.0 34 14 10. - 14.3 8. - 16.3 . .
I' .
~ ~3 1211844 :
1 The AGC circuit 36 by~ass strap 34 permits the 2 AGC 36 to be bypassed for specific applications or for 3 test purposes. When the strap 34 is in the bypass 4 position, the gain from the strap to the input (trans-5 mit) filter 46 portion of filter 44 output VFx0 is. ,~
6 +3.36 dB, which is close to mid-range AGC 36 setting.
7 The A/D - D/A function is performed using the 8 INTEL 2911A A-Law CODEC 50. The CODEC 50 and an I~TEL
9 ¦ 2912 filter 44 form a functional block which is inter-10 ¦ connected as is well known in the art.
11 A suitcase strap is provided on the VFRI
12 ¦ input of the output (receive),filter 48 portion of the 13 fil~er 44 at 56 to allow the audio input to be looped 14 back to the output for test purposes.
',15 The serial output of the A/D converter 50 16 which is at 64,000 bps and represents the digitized 17 voice is converted to 8 bit parallel word in serial-to-18 parallel converter 58. The TSX output of the CO~EC 50 lg is used for several functions in the A/D - D/A opera-tion. During its active time the TSX output enables the '21 shift clocks on'serial-to-parallel converter 58'and 22 parallel-to-serial converter 60 so that the CODEC 50 can 23 output its A/D word. It also enables inputing a new D/A
24 word from the parallel-to-serial converter 60, which is the synthesized digital voice from'the synthesizer 249 26 in the analyzer 41 at 64,000 bps. The trailing edge of 27 TSX (data transfer is complete) is used to generate an ,28 interrupt request for the A/D and D/A portions of the 29 A/D/A converter 50 (ADINT) in flip-flop 88. The actual A/D and DjA conversions are started when the FS(X,R) 31 signai is generated for the CODEC A/D/A converter 50.
32 FS signal is generated using retimed SRCLR from flip-33 flop 190 on pin Q. The timing sequence for the CODEC 50 34 is shown in ~IGURE 7. When an ADINT pulse is generated, e.g., every eight bits in tlme the data (eight bits) in . ''.
., .`' ' . .
=~ _~................ ,. ~.. ,........ ~ I
., ~ . . :
lZ11~44 .
1 the serial-to-parallel converter 58 is loaded to the 2 processor 41 and the data (e~ght bits) in the parallel-3 to-serial converter 60 is loaded to the A/D/A
4 converter 50.
The Rx low pass filter output ~FRO drives the inverting amplifier 204. The gain of this amplifier 204 7 is adjustable via variable resistor 198 to set the 8 receive signal level. The output of amplifier 204 ~ drives both the two-wire and four-wire ~udio output circuits, which drive the speaker in the telephone 11 handset (not shownl.
.
It will be seen that the present invention in 16 a.broad sense provides for digital control of a digital-17 to-analog AGC circuit dependent upon the RMS measured 18 during data compression of digitized voice talker end of lg the transmission line. The control of the AGC is for the purpose of maintaining an analyzer means which 21 perorms the data compression within a certain range of 22 RMS values. The availability of the digital data 23 representing the adjustment of the AGC enables incl~sion 24 in the compressed data of a gain data signal representa-tive of the 2MS measured in the analyzer during com-26 pression of the digitized voice data adjusted by the 27 inverse of the change in the AGC in order to keep the 28 analyzer within its RMS limits for proper operation.
29 The gain data transmitted and utilized in the synthe-sizer portion of a remote analyzer at the listener end 31 of the transmission link, during data expansion, is thus 32 the true gain of the analog voice signal which was 33 compressed in the analyzer at the talker end of the 34 transmission link. In addition the present invention, in combination with the above, includes, in a more , .
. , ' .
I
.
~ 1211844 :-1 narrow sense, echo suppression at both the talker end 2 and the receiver end, along with a hybrid operational 3 amplifier echo suppression circuit, which particularly 4 is suited for echo suppression in a transmissi~n and receiver system empioying compressed digitized voice 6 data.
7 The foregoing description of the present 8 invention has been directed to a particular em~odiment 9 of the invention in accordance with the requirements of the patent statutes and for purposes of illustrating and 11 explaining the invention. It will be apparent, however, 12 to those skilled in this art that many modifications and 13 cnange~ in bc-th the method and apparatus Oî the precent 14 invention may be made without departing from the scope and spirit of the present invention. For example, other 16 ~eans of data compression which employ RMS may be used.
17 Also the analyzer/synthesizer can be microprocessor 18 implemented or implemented by, e.g., a minicomputer or 19 by suitable hand-wired large-scale integrated circuitry dedicated to performance of the functions described 21 herein. The particular values for the logic decisions 22 described herein may be varied as desired from the pre-23 ferred embodiment described herein. It will be further 24 apparent that the invention may also be utilized, with suitable modifications within the state of the art which 26 will be apparent to those skilled in the art. It is the 27 applicants' intention in the following claims to cover 28 all such equivalent modifications and variations as fall 29 within the true scope and spirit o the invention.
'..,' . ' ' '.
~ . ' .
., . . I' . .
. ~ 1211~3~4 1 ~S in the analyzer 41, ARMS, and the far talker RMS in 2 the synthesizer, 249, SRMS. This determines whether the 3 user at the respective end of the transmission link is talking or listening during each frame and accordingly, attenuates A~MS or $RMS. This process begins in soft-6 ware, e.g., in the'analyzer 41, at START 350. In deci-7 sion bloc~ 352 the ARMS is compared to see if it is 8 greate~ than the most recent peak ARMS, i.e., ARMSP. If 9 it is then the ARMSP value is set to the present ARMS
value in block 354. Since decisions are made each frame 11 regarding which signal to suppress in order to suppress 12 echo effectively during pauses and at the end of talk-li ing, two delay functions are employed. The first is to 14 hold ARMSP at its most recent val~e for a selected time.
This is done in block 354 by setting the count CACNT in 16 an accumulator in the analyzer 41 to DCNT, equal to 16, , i 17 and which CACNT is decremented by 1 each frame for a 18 total of 16 frames, as long as ARMS is less than or ', 19 equal to ARMSP.
20, In decision block 356 SRMS is,compared to 21 SRMSP, the most recent peak SRMS. If it is greater, 22 then SRMSP is set to equai the present SRMS in 23 block 358. Also for the reasons explained above a delay 24 counter accumulator count CSCNT in an accumulator in the analyzer 41 is set to equal DCNT and is decremented by 1 26 once each frame for 16 frames as long as SRMS is less 27 than or equal to SRMSP.
28 In decision block 3`60 CACNT is compared to 0 29 and if less than or equal to 0 ARMSP is set at the present value of ARMS in block 362. This same function 31 is performed in decision block 364 and block 366 with 32 respect to CSCNT and SRMSP equa1 to the present S~IS.
33 A decision whether to at'tenuate SRMS is made 34 in decision block 368 by comparing ARMSP to a value T~RONE set at two-fifths scale, and also comparing to ... , , , ~, ."" ' ., !-1 ~ , ` iZ11~344 1 see if ARMSP is greater than or equal to SRMCiP plus a 2 fraction of the hybrid loss HLOSS. The f irst condition 3 makes certain that a reasonable volume of speech is 4 being transmitted/received and the second condition makes certain that the received energy is smaller, even 6 when a correction is made for hybrid impedance mismatch.
7 If these conditions are met an attenuating counter for 8 the synthesizer CNTA is set in block 370 at MAXCNT, 9 e.g , 16 and an attenuating counter for the analyzer CNT~ is set to zero. This results in SRMS attenuatior 11 at, e.g., 12 db each frame for as long as CNT~ is 12 greater than 0.
13 Similarly if SRMSP is greater than THRGNE and 14 SRMSP is greater than ARMSP + ~LOSS a decision is made in decision block 372 which results in block 374 in the 16 setting of an attenuating counter CNTS for the analyzer 17 at MAXCNT and the attenuating counter CNTA for the 18 synthesizer at 0, to attenuate ARMS for a selected 19 number of frames as CNTS decrements each frame from MAXC~7T which may be, e.g., 16.
21 Moving on to FIGURE 5A it is seen that ARMSP
22 and SRMSP are then compared in decision blocks 3?6 and 23 380, respectively, with a sécond threshold value THRTWO, 24 equal to four-fifths scale. If either is greater than this value then, respectively, the far talker or near 26 talker is interrupting and attenuation must be accord-27 ingly removed. This is done in ~locks 378 and 382 by 28 setting, respectively, CNTS or CNTA equal to 0.
~9 Decision bloc~s 384 and 386 control the actual attenuation so long as, respectively, CNTA is greater 31 than 0 or CNTS is greater than 0. In the former event 32 SRMS is set:in block 386 to equal SRMS minus, e.g., 33 12 db and in the latter event ARMS is set in blocX 390 34 to equal ARMS minus, e.g., 12 db.
'.
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.. . ..
I 122~184~
1~ The decrementing function is performed in 2 ¦ block 392 by setting CNTA, CNTS, CAC~T and CSCNT each 3 ¦ equal to their respective values minus 1. The program 4 ¦ then returns to START from RETURN 394, to begin process-5 ¦ ing the data for the next frame.
6 ¦ Thus it can be seen that the software at each 7 ¦ end of the transmission link functions to attenuate the 8 ¦ proper^value, either SRMS or ARMS depending on whether 9 ¦ the near talker or far talker, as perceived by each 10 ¦ respective end of the transmission link, is the actual 11 talker, the other signal, either S~MS or ARMS, being 12 thereby determined to be echo and being attenuated to 13 suppress the echo.
14 Echo suppression also occurs in the four-wire 15 ..interface section of the two-wire to four-wire con-. 16 verter. The voltage at node 112, V112 is given by .
17 equation 1.
18 112 R126 + ZT (1) 21 where: VT = telephone MIC output voltage 22 ZT = telephone impedance .
23 VS c voltage at the output of operational .
24 amplifier 204 (the synthesizer output) .
26 Since the operational amplifier 124 is operat-27 ing with negative feedback, its negative input will .
28 track the positive input. A second node equation at the .
29 output of the amplifier 124 yields:
31 V112 - Vo + V112 - Vs = 0 (2) -- 32 Rf ~128 . ',.
~1 12~
1 where: Vo is the vol~cage at the output of the 2 operational amplifier 124 (the analyzer 3 input) 4 Rf is the equi~alent resistance of the feed-back resistance inductance network of. the 6 operation amplifier 124 8 - Substituting for V112 from equation 1 yields:
12~ Rf S ~(R126 + ZT) (Rf R128) R128~ .
13 ~ VT (R126 I ZT) (Rf R128) 16 ., For proper operation there should be no Vs 17 signal component in Vo. For this to occur, the ~irs~
18 term on the right side of equation 3 must equal zero.
19 That term equals zero when:
21 2T Rf 22 R126 + ZT R128 + Rf 24 In the design of the present invention, this requirement is satisfied using Rf = ZT and R128 = R126 26 Substituting these values into equation 3 yields Vo as a 27 f~nction of the microphone signal:
29 Vo = VT
In order to empiracally match ZT' measurements were taken of th 31 telephone impedance over a range of about 100 T. 4000 Hz at a 32 bias current of 16 ma. From this data a matching network accor( 1-33 ing to the present invention was synthesizec'. Since telephone 34 impedances vary from unit to unit, two adjustments are included in the ne~work by way of the variable resistors 132 and 134 and 198 in order to improve the nominal matching.
~ I 121~84~ :
1 The performance of the two-wire to four-wire 2 converter 12 is more critical in the present invention 3 than in a normal telephone channel since the processing 4 delay inherent in the use of digitized voice will produce sufficient delay in the echo path of the con-6 verter 12 (synthesïzer out to analyzer in) to disturb 7 the normal cadence of the talker.
8 - Once adjusted, the circuit yields approxi-9 mately 40 dB of loss in the echo path across the 100 to 4000 Hz spectrum. To null the circuit a signal 11 (1000 Hz, sinusoidal, .814 V~MS) is inserted at the 12 center post of suitcase strap 56 (with the strap 13 removed). Variable resistor 198 ,s adjusted (Rx Gain i4 Pot) to produce 1.1 ' .2 VRMS at the output of ampli-15 fier 204. This adjusts the receive gain and provides a .
i6 reference signal for the two-wire to four-wire balance 17 adjustment. The balance adjustment must be made with 18 the telephone connected to the RING and TIP lines and 19 with OFF HOOR activated. ~onitoring the output of the amplifier 152, variable resistor 132 and 134 are 21 adjusted to null the signal at that point. The signal , 22 ¦ level at that point should be at least 35 d~ lower than 23 at the output of amplifier 204. -24 The principal features of the operation of the present invention will be now described with reference 26 to FIGURES 2 and 2A. Bias current for the telephone is 27 produced using a series resistor network 116 and 114 to 28 +12 volts with a decoupling capacitor 120 to ground.
29 The ring driver 15 consists of a totem pole driver circuit which includes transistors 86, 88 and 90 31 and associated discrete components. The circuit uses 32 the TTL levei signals QlONH and Q20NH to alternately 33 switch the TIP line between 180V and ground. The design ..' ".
1~ lZ118~ ;
1 of the TTL drive signals includes a "dead time" between 2 state changes in which both transistor 88 and transis-3 tor 86 are off.
Diodes 108 and 106 limit the spiking which 5 occurs when the current in the bell coil of the tele- :
6 phone (not shownl tries to change rapidly. Diode liO
7 isolates the ringing voltage from the two-wire to four-8 wire converter 12. When the ring driver 15 is active 9 the voltage at node 112 will swing from 0 to ~12V, at 10 which point diode 110 turns off, while the cathode side 11 of diode 110 continues toward 180V.
12 When the ring driver 15 is inactive both 13 halves of the totem pole driver circuit are off, i:hereby t 14 presenting a very high impedance to the TIP line and 15 having no effect on the two-wire to four-wire conver-16 te~ 12 balance.
17 The hookswitch status detection is accom-18 plished by the amplifier 66 and its associated discrete :
19 components. Resistor 70 is a DC current sense resistor.
20 The voltage across resistor 70 is low pass filtered at 21 1 Hz by resistor 72 and capacitor 74 and compared (via 22 amplifier 66) to a fixed threshold at the junction of 23 resistors 78 and 80. In operation there are four 24 combinations of ring staté and hookswitch status which 25 the status detection circuitry must recognize. Each 26 combination is described below.
27 1. Ring Active, ON HOOR - for this state 28 (which occurs when a call is received) the TIP and ~ING
29 leads are AC coupled through the telephone bell circuit.
30 The voltage across the sense resistor 70 is therefore an ,, 31 AC signal (f approximately 20 Hz). The 1 Hz LPF ~resis- , 32 tor 72 and capacitor 74) prevents excursions of this 33 signal from exceeding the threshold and the O~HOOR
34 status does not change.
.., . ' ' .
r-.- .
' ' 12~18q4~
1 2. Rinq Active, OFF HOOK - in this state 2 (which occurs when a call is answered) the TIP and RING
3 lines are DC coupled through the telephone. The LPF
4 capacitor 82 charges to the average value of the rin~ .
signal, which exceeds the preselected threshold and 6 generates the OFFHOOR status, which should then be 7 sensed by software to turn off the ring signal.
~ 3. Ring Inactive ON HOOK - in this state 9¦ (which occurs when the telephone is no longer being used) the TIP and RING lines are again AC coupled. No 11¦ bias current can flow through the TIP and RING lines and `
12¦ the voltage across resistor 70 drops below the threshold 13 ~to 0VJ producing the ON HOOK indication.
14 4. Ring Inactive, OFF HOOK - in this state ~which occurs when a call is initiated or in-progress) 16 the TIP and RING lines are DC coupled. Bias current 17 flows through resistor 70 producing a voltage approxi-18 mately twice the threshold voltage at the LPF capaci-19 tor 82 output which produces the OFF HOO~ status.
The spectrum shaping amplifier 32 provides 21 any analog pre/de-emphasis which may be desirable for 22 the trans~it audio. It also sums the transmit analog 23 signals from both the two-wire and four-wire inputs.
24 The circuit is AC co~pled, via capacitors 146 and 140 to, respectively, the interfaces 12 and 18 to remove the 26 DC voltage resulting from the telephone bias currents.
27 The gains of the two-wire and four-wire transmit paths 28 can be set independently using resistor 148 and resis-29 tor 142 respectively. The nominal gain of the inter-faces are 14.3 dB for the two-wire; path in interface 12 31 and 3 dB for the four-wire path in interface 18. The 32 gains are set so that the signal peaks between capaci-33 tor 153 and switch 34 reach approximately 3 volts when 33s speaking ac a normal level. The output of the spectrum . . .
1211844 ;
1 shaping amplif ier 152 is AC coupled through capaci-2 tor 153 to the AGC circuit 36 to prevent a DC offset 3 voltage from causing unnecessary transitions in the 4 AGC 36 output signal as the gain is changed.
S The AGC circuit 36 and input filter 46 po.rtion 6 of the filter 44 are described together in further 7 detail here, as shown in FIGURE 6, because a ladder .
8 networ~ contained in the AGC 36 circuit and an inpu~
9 operational amplifier 375 contained in the filter 44 are 10 interconnected to form a composite gain block. The 11 equivalent circuit for the AGC 36 and a portion of the 12 input filter 46 circuit within the filter 44 is shown in . I
13 FIGURE 6~ . j.
14 Within the AGC circuit 36 is a feedback 15 resistor 376 which, together with feedbacX resistor 160 . .
16 ~cts as a negative feedback loop for operational ampli-17 fier 375. The AGC circuit 36 and the operational ampli- .
18 fier 375 also have an input resistor 378.
19 The gain of this AGC 36 and filter 44 circuit 20 from EIN at switch 34 to Eo at VFx at the output of the }
21 operational amplifier 375 in the filter circuit 44 22 VFxOis 23 ..
?4 G = = _ D (R160 + R376 27 where D is the digital code loaded into the AGC 36 (0 < .
28 D < 255) on pins PDI07-00 and resistors 376 and 378 are 29 nominally 10 Kohms. A digital-to-analog converter 380 in the AGG 36 circuit is connected to a precision refer-31 ence voltage Vref and provides a current output repre-.32 sentative of the value 256 ~ 1 where ~ is the digital 33 input to the AGC 36 on PDI07-00 from the analyzer 41.
~, .- ' '..
.-., .., , '' :
.
~2~18 ~
1 In operation the AGC 36 and input filter 46 2 circuits cover a gain range of 30 dB ~+14 dB to -16 dB), 3 in 2 dB ste2s, although the hardware is capable of 4 greater range and finer resolution. Table l lists the.
values of D stored in the memory in the analyzer 41 ., 6 corresponding to respective foùr-bit counts (0-lS
7 decimal) from the AGC controller accumulator GCNT in 8 the analyzer 41, along with the corresponding gains .9 ¦ based on the component values used in the AGC 36 and the 10 ¦ input filter 46 circuits.
Ll I The remainder of the in~ut filter 46 inte--12 grated circuit actually performs the low pass filter 13 ¦ function in filter 380 and introduces +3 dB gain in the 14 ¦ passband. The input filter 46 output on pin 16 ~VFxO) 15 ¦ of filter 44 is therefore 3 dB higher than the values 16 ¦ shown in Table 1. .
17 I .
18: ~ Table 1. AGC/Filter Gain Settings 19 GCNT D Gain in dB
0 255. + 13.8 21 1 203. + 11.7 22 2 162~ + 9.8 23 3 129. + 7.8 24 4 102. + 5.8 81. + 3.1 26 6 64. + 1.75 27 7 Sl. - .21 .
28 8 40. - 2.3 29 9 32. - 4.3 26. - 6.1 31 11 20. - 8.3 32 12 16. - 10.2 33 13 13. . - 12.0 34 14 10. - 14.3 8. - 16.3 . .
I' .
~ ~3 1211844 :
1 The AGC circuit 36 by~ass strap 34 permits the 2 AGC 36 to be bypassed for specific applications or for 3 test purposes. When the strap 34 is in the bypass 4 position, the gain from the strap to the input (trans-5 mit) filter 46 portion of filter 44 output VFx0 is. ,~
6 +3.36 dB, which is close to mid-range AGC 36 setting.
7 The A/D - D/A function is performed using the 8 INTEL 2911A A-Law CODEC 50. The CODEC 50 and an I~TEL
9 ¦ 2912 filter 44 form a functional block which is inter-10 ¦ connected as is well known in the art.
11 A suitcase strap is provided on the VFRI
12 ¦ input of the output (receive),filter 48 portion of the 13 fil~er 44 at 56 to allow the audio input to be looped 14 back to the output for test purposes.
',15 The serial output of the A/D converter 50 16 which is at 64,000 bps and represents the digitized 17 voice is converted to 8 bit parallel word in serial-to-18 parallel converter 58. The TSX output of the CO~EC 50 lg is used for several functions in the A/D - D/A opera-tion. During its active time the TSX output enables the '21 shift clocks on'serial-to-parallel converter 58'and 22 parallel-to-serial converter 60 so that the CODEC 50 can 23 output its A/D word. It also enables inputing a new D/A
24 word from the parallel-to-serial converter 60, which is the synthesized digital voice from'the synthesizer 249 26 in the analyzer 41 at 64,000 bps. The trailing edge of 27 TSX (data transfer is complete) is used to generate an ,28 interrupt request for the A/D and D/A portions of the 29 A/D/A converter 50 (ADINT) in flip-flop 88. The actual A/D and DjA conversions are started when the FS(X,R) 31 signai is generated for the CODEC A/D/A converter 50.
32 FS signal is generated using retimed SRCLR from flip-33 flop 190 on pin Q. The timing sequence for the CODEC 50 34 is shown in ~IGURE 7. When an ADINT pulse is generated, e.g., every eight bits in tlme the data (eight bits) in . ''.
., .`' ' . .
=~ _~................ ,. ~.. ,........ ~ I
., ~ . . :
lZ11~44 .
1 the serial-to-parallel converter 58 is loaded to the 2 processor 41 and the data (e~ght bits) in the parallel-3 to-serial converter 60 is loaded to the A/D/A
4 converter 50.
The Rx low pass filter output ~FRO drives the inverting amplifier 204. The gain of this amplifier 204 7 is adjustable via variable resistor 198 to set the 8 receive signal level. The output of amplifier 204 ~ drives both the two-wire and four-wire ~udio output circuits, which drive the speaker in the telephone 11 handset (not shownl.
.
It will be seen that the present invention in 16 a.broad sense provides for digital control of a digital-17 to-analog AGC circuit dependent upon the RMS measured 18 during data compression of digitized voice talker end of lg the transmission line. The control of the AGC is for the purpose of maintaining an analyzer means which 21 perorms the data compression within a certain range of 22 RMS values. The availability of the digital data 23 representing the adjustment of the AGC enables incl~sion 24 in the compressed data of a gain data signal representa-tive of the 2MS measured in the analyzer during com-26 pression of the digitized voice data adjusted by the 27 inverse of the change in the AGC in order to keep the 28 analyzer within its RMS limits for proper operation.
29 The gain data transmitted and utilized in the synthe-sizer portion of a remote analyzer at the listener end 31 of the transmission link, during data expansion, is thus 32 the true gain of the analog voice signal which was 33 compressed in the analyzer at the talker end of the 34 transmission link. In addition the present invention, in combination with the above, includes, in a more , .
. , ' .
I
.
~ 1211844 :-1 narrow sense, echo suppression at both the talker end 2 and the receiver end, along with a hybrid operational 3 amplifier echo suppression circuit, which particularly 4 is suited for echo suppression in a transmissi~n and receiver system empioying compressed digitized voice 6 data.
7 The foregoing description of the present 8 invention has been directed to a particular em~odiment 9 of the invention in accordance with the requirements of the patent statutes and for purposes of illustrating and 11 explaining the invention. It will be apparent, however, 12 to those skilled in this art that many modifications and 13 cnange~ in bc-th the method and apparatus Oî the precent 14 invention may be made without departing from the scope and spirit of the present invention. For example, other 16 ~eans of data compression which employ RMS may be used.
17 Also the analyzer/synthesizer can be microprocessor 18 implemented or implemented by, e.g., a minicomputer or 19 by suitable hand-wired large-scale integrated circuitry dedicated to performance of the functions described 21 herein. The particular values for the logic decisions 22 described herein may be varied as desired from the pre-23 ferred embodiment described herein. It will be further 24 apparent that the invention may also be utilized, with suitable modifications within the state of the art which 26 will be apparent to those skilled in the art. It is the 27 applicants' intention in the following claims to cover 28 all such equivalent modifications and variations as fall 29 within the true scope and spirit o the invention.
'..,' . ' ' '.
~ . ' .
., . . I' . .
Claims (4)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:-
1. An apparatus for use in the transmission of digital voice data, compressed for transmission, comprising:
an analyzer means for compressing digitized voice data according to an algo-rithm including a measured root mean square of the digitized voice data being compressed;
an analog-to-digital conversion means for converting an analog voice signal to digitized voice data as an input to the analyzer means;
an automatic gain control means within the analog-to-digital conversion means for controlling the gain of the analog voice signal prior to the analog voice signal being digitized, such that the digitized voice data input to the analyzer means has a root mean square within selected limits, the setting of the automatic gain control means being respon-sive to the value of the root mean square of the digitized voice data, as measured by the analyzer means; and, means for including in the digitized voice data, compressed for transmission, data representative of the root mean square measured in the analyzer means, adjusted by the inverse of the change induced in the gain of the automatic gain control means in order to maintain the analyzer means root mean square within the selected limits.
an analyzer means for compressing digitized voice data according to an algo-rithm including a measured root mean square of the digitized voice data being compressed;
an analog-to-digital conversion means for converting an analog voice signal to digitized voice data as an input to the analyzer means;
an automatic gain control means within the analog-to-digital conversion means for controlling the gain of the analog voice signal prior to the analog voice signal being digitized, such that the digitized voice data input to the analyzer means has a root mean square within selected limits, the setting of the automatic gain control means being respon-sive to the value of the root mean square of the digitized voice data, as measured by the analyzer means; and, means for including in the digitized voice data, compressed for transmission, data representative of the root mean square measured in the analyzer means, adjusted by the inverse of the change induced in the gain of the automatic gain control means in order to maintain the analyzer means root mean square within the selected limits.
2. A synthesizer for simulating speech by producing an analog speech signal from digitized voice data, compressed for transmission by an analyzer means at a remote location, wherein the compressed digitized voice data is arranged in frames and includes data representative of pitch, gain, and a plurality of linear predictive algorithm envelope generation factors for each frame, comprising:
a synthesizer means for generating the frequency domain envelope of the speech signal from the envelope generation factors according to a linear predictive algorithm;
a harmonic generating means for generating harmonics of the pitch having amplitudes as defined by the frequency domain envelope; and, an amplifying means for amplifying the output of the harmonic generating means in response to the gain data repre-sentative of the actual gain of the voice signal, which gain data is representative of the root mean square, detected in the analyzer at the remote location, adjusted by the inverse of the gain change induced in the analog voice signal, prior to compression at the remote location, in order to maintain the root mean square of the remote analyzer within selected limits.
a synthesizer means for generating the frequency domain envelope of the speech signal from the envelope generation factors according to a linear predictive algorithm;
a harmonic generating means for generating harmonics of the pitch having amplitudes as defined by the frequency domain envelope; and, an amplifying means for amplifying the output of the harmonic generating means in response to the gain data repre-sentative of the actual gain of the voice signal, which gain data is representative of the root mean square, detected in the analyzer at the remote location, adjusted by the inverse of the gain change induced in the analog voice signal, prior to compression at the remote location, in order to maintain the root mean square of the remote analyzer within selected limits.
3. The apparatus of Claim 1, further comprising:
a synthesizer means for synthesizing expanded digitized voice data, received from a remote location as compressed digitized voice data, to form an analog speech signal.
a synthesizer means for synthesizing expanded digitized voice data, received from a remote location as compressed digitized voice data, to form an analog speech signal.
4. A method of compressing a digitized voice signal for transmission, comprising:
converting an analog voice signal to an expanded digitized voice signal;
compressing the digitized voice signal in an analyzer means for digitized voice compression according to an algo-rithm including a measured root mean square of the digitized voice signal;
changing the gain of the expanded digitized voice signal, as necessary, in order to maintain the root mean square within selected limits; and including in the digitized voice data compressed for transmission data repre-senting the measured root mean square adjusted by the inverse of change in the gain of the expanded digitized voice data induced to maintain the root mean square within the selected limits.
converting an analog voice signal to an expanded digitized voice signal;
compressing the digitized voice signal in an analyzer means for digitized voice compression according to an algo-rithm including a measured root mean square of the digitized voice signal;
changing the gain of the expanded digitized voice signal, as necessary, in order to maintain the root mean square within selected limits; and including in the digitized voice data compressed for transmission data repre-senting the measured root mean square adjusted by the inverse of change in the gain of the expanded digitized voice data induced to maintain the root mean square within the selected limits.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US47103883A | 1983-03-01 | 1983-03-01 | |
| US471,038 | 1996-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1211844A true CA1211844A (en) | 1986-09-23 |
Family
ID=23870024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000448666A Expired CA1211844A (en) | 1983-03-01 | 1984-03-01 | Digital voice compression having a digitally controlled agc circuit and means for including the true gain in the compressed data |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1211844A (en) |
-
1984
- 1984-03-01 CA CA000448666A patent/CA1211844A/en not_active Expired
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