CA1169950A - Power circuit control programmable timer - Google Patents
Power circuit control programmable timerInfo
- Publication number
- CA1169950A CA1169950A CA000373577A CA373577A CA1169950A CA 1169950 A CA1169950 A CA 1169950A CA 000373577 A CA000373577 A CA 000373577A CA 373577 A CA373577 A CA 373577A CA 1169950 A CA1169950 A CA 1169950A
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- Canada
- Prior art keywords
- timer
- time
- mode
- markers
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- Measurement Of Predetermined Time Intervals (AREA)
Abstract
Abstract of Disclosure One form of the timer is designed to be mounted over and behind a conventional wall switch cover plate and includes a two position timer condition-setting arm, a rotatable and depressible time setting dial knob and an in-dicator on the front of the cover plate. When the arm is moved to a timer-on position, the indicator flashes to indi-cate that timer programming is needed. This may be achieved in real time over the first twenty-four hours after a 30 minute play period by depressing the knob acting as an on and off power switch control push button to turn the light circuit on and off in a normal manner. Fast manual program-ming is achieved by rotating the knob to various time set-tings and depressing the knob to set ON or OFF markers in timer memory. A full twenty-four hour programming is corn-pleted by either completing a full rotation of the knob over the full twenty-four hour time settings, with at least on ON and one OFF derpession, or by a similar pair of knob depressions without such a full rotation, OFF markers then being automatically set by the timer to complete the timer programming. The indicator comes steady-on to indicate that the timer is fully programmed and in an automatic mode of operation. The automatic operation is temporarily overrid-den by depression of the knob or permanently overridden by a simple distinctive speed or time duration depression of the knob.
Description
3~
The subject matter of ~he invention is an improved electrical timer for actuating electrical power circuits.
This application is related to applicant's pending application Serial No. 345~053, filed February 5, 1980 and entitled Timer and Power Control System~
The present invention relates to programmable power circuit control timers of the type wh;ch has i~s most impor~ant commercial application as a timer for controlling the energiæation and de-energization of lighting circuits in a home or the like for security purposes, although certain aspects thereof have a more general applicationO In such a commerc}al application, the present invention will form a programmable power circuit control timer of the type to be connected in ~series wi~h a power cord for a table lamp or the like, :~: in which case it can be incorporated in a self contained :: :
hoas-ing a:dapted to rest on the top of a table, or~ in ~ its most preferred form, of a type where it is so compact : 20 : as to be mountable in an e~isting toggle wall switch :
opening in~place of the toggla switch~ The latter timer has programming and power on and of controls mounted on ::
; ~ ~ mg/~
, ! ~ . . , ' - , :
.
', . ~ ~ , . :
~. , :
the front of one switch station of a single or multiple station wall switch cover plateO Unique timers of these types are disclosed in said copending application Serial No. 345,053, filed February 5, 1980.
This copending application describes an electronic timer and power control system in which a shift register is continuously cycled to cause a daily repetition of ON and OFF periods for the control of lights and appliances or the likeO The ON and OFF
pattern of operation is determined by storing power circuit ON 1 and OFF 0 control markers respectively in each of the storage locations of the shift register.
At any given instant of time, each storage loca~ion in the register represents a definite time interval in the 24 hour cycle, such as one-quarter hourO ~The time interval represented by such storage location advances one time interval as the shift register marke~rs a~e shifted one position.) The control markers ;can~be e~tered into the storage locations either gi~ 2 -::
::
:
:: ' ~ ' . , , : . . : . -'''~
iO
synchronously, ln real -time over a 25 hour per;.od, or asyn-ehronously in a rela-tively short time by manual proyra~ninc3 MeanS. This proyramminc3 means ineludes an inaicator for identi.fyiny the time in-terval represented by the s-toraye loea-tion i31 position to receive a marker. The indicator must be sufEieiently smal:L and oeeupy with the o-ther eon-trols sueh a small area in -the wa].l switch opening eorm of the timer that they eneompass only one sw.itch station of any eonventional single or multi~station switch eover plate without interferinc3 wi-th the toyc31e switeh oE the adjacent s-tat.ion in the latter ease.
This applieation diseloses a number of different forms o.E sueh a system. l'he mos-t commereial].y important form -thereof is an extremely low cos-t 24 hour re~peat cycle timer of sueh smal:L s;.ze -that it ean be completely contained with.in the small space of an elec-trical f].ush swi-tch-receiv-inc~ box commonly emp].oyed to house a wa].1. moun-ted toy-3:l.e light: switch unit. The fron-t eontrol portion of the timer is also of such small size -that it fits over one swi-tch : ~ 20 station of any conven-tional s:ingle or multi-station switeh eover plate without interferiny with the toygle s~itch of the adjaeent stdtion in -the latter case.
To aecomplish -this objective, it was neeessary to eliminate the usual eostly and overly bulky digital read~
out and addressiny means which prior shift reyister '., ~ '' , ~ .
' -contro:Lled tim~rs used for identifyincJ and accessi.ny the storage locations during the manual progra~niny of these -timers (see Carlson U.S. Patent No. 4,035,66l). Instead of such digital read-out means, the storage locations of the wall switch opening mounted timer disclosed in this copend-ing application is most advantageously indlcated on the dial of a preferably rotatable and depressible time dial knob which has a discrete number of detented inde~able positions. Each deten-ted position of -the knob corresponds to a single memory storage location in the shift regi.ster.
~hen the knob is rolated, the movement of the knob to each de-tent posi.tion i.n the form of the invention using a shift ,:
register storaye means as described, yenera-tes a shift pulse that clocks the shift regl.ster and advances all markers to t-he next storage locati.on.
E'or a ~ hour repeat-cycle timer capable of s~"i.-tching a l.icJht or a`ppl;.ance ON or OFF, i.f each basic tim--ing interval i.s one-quarter hour, 96 memory storage loca-.
: . .
ti.ons are required :in the shift reyi.s-ter. In the form of ~ 20 the Inventlon c1isc].osed in this copending applicati.on, the `!
;~ ~ tlme dial knob when depressed forms a push but-ton control for operating the liyht ci.rcui.t invol.ved and programming the ~:
.tlmer. Also~ it has ~8 detent positions so that the time dial knob must be rotated throuc~h two complete revoluti.ons to cloc~k the shif-t register through one complete cycle.
~ ~ :
.. ,.......... ~............................................................... ' - . ~ -: -- :
s~
This permits the time dial knob to he rnarked with the famili.ar 1 -to 12 hour indicia like a clock face with 1/4 hour markers placed between the hour markers. An ~M-PM
indicator adjacent -the time di.al knob chanyes when the knob is rotated past the 12 hour indicia. Thus each index mark on -the knob corresponds to a speci~ic quarter-hour further identified with the parti.cular AM or PM indica-tion on the indi.ca-tor. This timer is simply programmed by first setting the -time dial knob to a present -time setting relative to an index mark on the face plate of the timer and then momentarily depressiny the knob and the shaft to which it is connected to chancJe tlle condition of the light cir-cuit i.nvolved to the desi.red condi-tion. Depression o:E the time dial knob operates a se~uence switch which alternately produces voltages which elther enter a 1 on marker or leaves a ) marker ;.n the firs-t stage of the shif-t re-gister. As the knob is then a~vanced to its var.;.ous other positions t.he previously set marker is merely duplicated :: :
n the first staye o~ the shift register until a further ~change in the condition of tlle light circuit is desi.red.
For automatic operation of the timer the shift :: :
regîster is clocked synchronously in real time by quar-ter-hour pulses d~rived from the 60Hz AC supply. T}le li~ht ~ ~ clrcult involved will be turned ON or OFF by -the 1 and 0 ; ~ 25 markers in -the last s-tage oE the shift register :Eox- each : ~" ~ ' ' ' ' '' ' .
quar~er--hour period involved.
Once the timer has been programrned and is pro~
perly synchronized with real time, it is advan-tageous to provide an indication to the user which enables him to ex-amine the conten-ts of the shift reyi.ster memory locations.
In a timer for home use of this type, it is advantageous to be able to review the program to be assured that the control operations will take place at the desired times~
In the timer disclosed in this copending application, such an indication is available only within the first time inter val (which is there 15 minutes) by advancing the time dial knob through the various time interval posi-tions and noting the .results thereoE on the lights which are controlled by the timer or a green indicator light.
. 15 While the depressible and rotatab].e time dial knob just descr.ibed can be used in a similar manner for either e:Efecting a rapid asynchronous pro~ramming of the ti~ner or ~: for rapidly reviewing the program, there are still a number :: :
: of problerns assocla~ed with these operations which make ~the.ir use dif~icult ~or many persons and could resul-t in errors of operation or non-functioning of the t.imer. The :nature of these problems and the means provided to minirnize them will now be described.
It should be recognized -that i.n complying with the ph~sical size ~limitati.ons as described above, and :
~ : satisfying the requirement for use wi-th and upon a standard ~: -, swi-tch cover plate, se-vere limilations are placed on the number o~ controls and indicators available to the user.
In the commercially prac-tical realization of the inven-tlon, and in accordance with one of the improvement features of our present invention, it was found advantageous to provide only a single indicator light to show the status of the ti.mer, a two rather than a three position switch as des--cribed in our copendincJ app],ication for turning t,he timer ON and OFF and clearing the memory, and a single time dial knob that could be both rotated and depressed. W;.th these controls and indicator, it is mos-t desirable to perform and indicate the s-tatus of most and preferably al].-the ~ollowi.ng functions and modes:
1. CLEAR (reset) the memory and provide an J5~ "air-gap" elec-trical disconnect for sa~ety purposes required by the Under~7ri-ter's Laborator,y Standards;
The subject matter of ~he invention is an improved electrical timer for actuating electrical power circuits.
This application is related to applicant's pending application Serial No. 345~053, filed February 5, 1980 and entitled Timer and Power Control System~
The present invention relates to programmable power circuit control timers of the type wh;ch has i~s most impor~ant commercial application as a timer for controlling the energiæation and de-energization of lighting circuits in a home or the like for security purposes, although certain aspects thereof have a more general applicationO In such a commerc}al application, the present invention will form a programmable power circuit control timer of the type to be connected in ~series wi~h a power cord for a table lamp or the like, :~: in which case it can be incorporated in a self contained :: :
hoas-ing a:dapted to rest on the top of a table, or~ in ~ its most preferred form, of a type where it is so compact : 20 : as to be mountable in an e~isting toggle wall switch :
opening in~place of the toggla switch~ The latter timer has programming and power on and of controls mounted on ::
; ~ ~ mg/~
, ! ~ . . , ' - , :
.
', . ~ ~ , . :
~. , :
the front of one switch station of a single or multiple station wall switch cover plateO Unique timers of these types are disclosed in said copending application Serial No. 345,053, filed February 5, 1980.
This copending application describes an electronic timer and power control system in which a shift register is continuously cycled to cause a daily repetition of ON and OFF periods for the control of lights and appliances or the likeO The ON and OFF
pattern of operation is determined by storing power circuit ON 1 and OFF 0 control markers respectively in each of the storage locations of the shift register.
At any given instant of time, each storage loca~ion in the register represents a definite time interval in the 24 hour cycle, such as one-quarter hourO ~The time interval represented by such storage location advances one time interval as the shift register marke~rs a~e shifted one position.) The control markers ;can~be e~tered into the storage locations either gi~ 2 -::
::
:
:: ' ~ ' . , , : . . : . -'''~
iO
synchronously, ln real -time over a 25 hour per;.od, or asyn-ehronously in a rela-tively short time by manual proyra~ninc3 MeanS. This proyramminc3 means ineludes an inaicator for identi.fyiny the time in-terval represented by the s-toraye loea-tion i31 position to receive a marker. The indicator must be sufEieiently smal:L and oeeupy with the o-ther eon-trols sueh a small area in -the wa].l switch opening eorm of the timer that they eneompass only one sw.itch station of any eonventional single or multi~station switch eover plate without interferinc3 wi-th the toyc31e switeh oE the adjacent s-tat.ion in the latter ease.
This applieation diseloses a number of different forms o.E sueh a system. l'he mos-t commereial].y important form -thereof is an extremely low cos-t 24 hour re~peat cycle timer of sueh smal:L s;.ze -that it ean be completely contained with.in the small space of an elec-trical f].ush swi-tch-receiv-inc~ box commonly emp].oyed to house a wa].1. moun-ted toy-3:l.e light: switch unit. The fron-t eontrol portion of the timer is also of such small size -that it fits over one swi-tch : ~ 20 station of any conven-tional s:ingle or multi-station switeh eover plate without interferiny with the toygle s~itch of the adjaeent stdtion in -the latter case.
To aecomplish -this objective, it was neeessary to eliminate the usual eostly and overly bulky digital read~
out and addressiny means which prior shift reyister '., ~ '' , ~ .
' -contro:Lled tim~rs used for identifyincJ and accessi.ny the storage locations during the manual progra~niny of these -timers (see Carlson U.S. Patent No. 4,035,66l). Instead of such digital read-out means, the storage locations of the wall switch opening mounted timer disclosed in this copend-ing application is most advantageously indlcated on the dial of a preferably rotatable and depressible time dial knob which has a discrete number of detented inde~able positions. Each deten-ted position of -the knob corresponds to a single memory storage location in the shift regi.ster.
~hen the knob is rolated, the movement of the knob to each de-tent posi.tion i.n the form of the invention using a shift ,:
register storaye means as described, yenera-tes a shift pulse that clocks the shift regl.ster and advances all markers to t-he next storage locati.on.
E'or a ~ hour repeat-cycle timer capable of s~"i.-tching a l.icJht or a`ppl;.ance ON or OFF, i.f each basic tim--ing interval i.s one-quarter hour, 96 memory storage loca-.
: . .
ti.ons are required :in the shift reyi.s-ter. In the form of ~ 20 the Inventlon c1isc].osed in this copending applicati.on, the `!
;~ ~ tlme dial knob when depressed forms a push but-ton control for operating the liyht ci.rcui.t invol.ved and programming the ~:
.tlmer. Also~ it has ~8 detent positions so that the time dial knob must be rotated throuc~h two complete revoluti.ons to cloc~k the shif-t register through one complete cycle.
~ ~ :
.. ,.......... ~............................................................... ' - . ~ -: -- :
s~
This permits the time dial knob to he rnarked with the famili.ar 1 -to 12 hour indicia like a clock face with 1/4 hour markers placed between the hour markers. An ~M-PM
indicator adjacent -the time di.al knob chanyes when the knob is rotated past the 12 hour indicia. Thus each index mark on -the knob corresponds to a speci~ic quarter-hour further identified with the parti.cular AM or PM indica-tion on the indi.ca-tor. This timer is simply programmed by first setting the -time dial knob to a present -time setting relative to an index mark on the face plate of the timer and then momentarily depressiny the knob and the shaft to which it is connected to chancJe tlle condition of the light cir-cuit i.nvolved to the desi.red condi-tion. Depression o:E the time dial knob operates a se~uence switch which alternately produces voltages which elther enter a 1 on marker or leaves a ) marker ;.n the firs-t stage of the shif-t re-gister. As the knob is then a~vanced to its var.;.ous other positions t.he previously set marker is merely duplicated :: :
n the first staye o~ the shift register until a further ~change in the condition of tlle light circuit is desi.red.
For automatic operation of the timer the shift :: :
regîster is clocked synchronously in real time by quar-ter-hour pulses d~rived from the 60Hz AC supply. T}le li~ht ~ ~ clrcult involved will be turned ON or OFF by -the 1 and 0 ; ~ 25 markers in -the last s-tage oE the shift register :Eox- each : ~" ~ ' ' ' ' '' ' .
quar~er--hour period involved.
Once the timer has been programrned and is pro~
perly synchronized with real time, it is advan-tageous to provide an indication to the user which enables him to ex-amine the conten-ts of the shift reyi.ster memory locations.
In a timer for home use of this type, it is advantageous to be able to review the program to be assured that the control operations will take place at the desired times~
In the timer disclosed in this copending application, such an indication is available only within the first time inter val (which is there 15 minutes) by advancing the time dial knob through the various time interval posi-tions and noting the .results thereoE on the lights which are controlled by the timer or a green indicator light.
. 15 While the depressible and rotatab].e time dial knob just descr.ibed can be used in a similar manner for either e:Efecting a rapid asynchronous pro~ramming of the ti~ner or ~: for rapidly reviewing the program, there are still a number :: :
: of problerns assocla~ed with these operations which make ~the.ir use dif~icult ~or many persons and could resul-t in errors of operation or non-functioning of the t.imer. The :nature of these problems and the means provided to minirnize them will now be described.
It should be recognized -that i.n complying with the ph~sical size ~limitati.ons as described above, and :
~ : satisfying the requirement for use wi-th and upon a standard ~: -, swi-tch cover plate, se-vere limilations are placed on the number o~ controls and indicators available to the user.
In the commercially prac-tical realization of the inven-tlon, and in accordance with one of the improvement features of our present invention, it was found advantageous to provide only a single indicator light to show the status of the ti.mer, a two rather than a three position switch as des--cribed in our copendincJ app],ication for turning t,he timer ON and OFF and clearing the memory, and a single time dial knob that could be both rotated and depressed. W;.th these controls and indicator, it is mos-t desirable to perform and indicate the s-tatus of most and preferably al].-the ~ollowi.ng functions and modes:
1. CLEAR (reset) the memory and provide an J5~ "air-gap" elec-trical disconnect for sa~ety purposes required by the Under~7ri-ter's Laborator,y Standards;
2. Indicate the NOT PROGRAMMED and PROGR~MED
status of the program;
20~ 3. Se3ectively prov1de and indicate AUTO~ TIC
(tlmed) operation and MANUAL (not-timed) -operation operating modes;
4. Manually control the ligh-t at all times without disturbing the stored program;
25~ 5. Initiate a real-time 2~ hour synchronous - ' , .~ -: -program period;
6. Termina-te a real-time 2~ hour program period;
7. Initiate a rapid manual asynchronous program en-try mode;
8. Terminate a rapid manual asynchronous program mode when completed;
9. Initiate a program review mode; and 10. Terminate a program review mode.
. :[n attemptiny to "human engineer" the timer to bes-t sa-tisfy the above requirements, within the li.mitations stated above, many problems occur. Firstly, in using the ~ time dial knob ~or rapid asynchronous programming or review-~ -: ing the program wnere markers are stored in a shift recJister :1 : as described, it is necessary after these operations are performed -to again synchroni~e the indexed dial mark corres~
ponding to the present real time wii:.h the last marker - :
s~orage location so tha-t all the marker s-lorage loca~ions will:correspond in real time wi.th the dial knob time indica-:-tlons. Thls operation is explained -to -the user as "setting - , :
2~0 ~present time" so that whenever the time dial is to be used he would reallze that:he must ~irst set present time on -the time dlal knob and then "enter" that time by pressing the , ~ knob. "Entering'l present time by depressing the time dial : ~ ~
knob shou1d~not change the state of the light or enter a 25~ marker~in the shift reglster (which does so in the timer : ~ :
:
.
~s~s~
disclosed i.n our Applica-ti.on Serial No. ~
Secondly, in enterinc~ a manual program bythe dial knob it was found that many users had di:Eficulty if present real time was located within a longer -time inter-val during which they wanted to have the light ON. Forinstance, if the time was 8:00 PM when the user desired to program the timer and he wanted the light ON from 5:30 PM
to 11:00 PM, he would have to set the dial to ~:00 PM and depress the d:i.a:L knob -to "enter" present -time. Then he would have to press it again withou-t rotating the dial knob to turn the light ON, since present time represented a desired ON time.
: To complete his program, he would then have to advance the dial knob to 11:00 PM, depress the tlme dial knob to turn the light OFF, advance again to 5:30 PM, turn the light ON and advance again to 8:00 PM to complete the : 2~ hour cycle. This last operation, the join;.ng up oE the early segment of an ON interval preceed:ing present -time with that:portion of the ON interval following present time, 20~ seemed to be a source of considerable confusion.
-In accordance with another feature of our present nvention, to simplify the operation so that the user can ignore the location of "present Lime" with respec-t to a .
desired ON interval, a system was devised tha-t permit-ted the user to employ a unifoxm sequence of operati.on no mat-ter .. . .
:
. ~ ~
: ~
:
-- ~ . . . - ,,: - .
-- 10 ~
where present t.ime was located. Thu.s he could think of act.ions that always involved first rota-ting -the ti.me dial knob to a desired time (present time, "ON" time or begin-ning of "OFF" tlme) and then pressing the knob to "enter"
that time. It was found -that the user learned this se-~uence much more rapidly and easily, because it allowed each dial setting to be associated with a single "enter"
direction - (1) ENTER PR.~SENT TIME, (2) ENTER B~GINNING OF NEXT "ON" TlME, or
status of the program;
20~ 3. Se3ectively prov1de and indicate AUTO~ TIC
(tlmed) operation and MANUAL (not-timed) -operation operating modes;
4. Manually control the ligh-t at all times without disturbing the stored program;
25~ 5. Initiate a real-time 2~ hour synchronous - ' , .~ -: -program period;
6. Termina-te a real-time 2~ hour program period;
7. Initiate a rapid manual asynchronous program en-try mode;
8. Terminate a rapid manual asynchronous program mode when completed;
9. Initiate a program review mode; and 10. Terminate a program review mode.
. :[n attemptiny to "human engineer" the timer to bes-t sa-tisfy the above requirements, within the li.mitations stated above, many problems occur. Firstly, in using the ~ time dial knob ~or rapid asynchronous programming or review-~ -: ing the program wnere markers are stored in a shift recJister :1 : as described, it is necessary after these operations are performed -to again synchroni~e the indexed dial mark corres~
ponding to the present real time wii:.h the last marker - :
s~orage location so tha-t all the marker s-lorage loca~ions will:correspond in real time wi.th the dial knob time indica-:-tlons. Thls operation is explained -to -the user as "setting - , :
2~0 ~present time" so that whenever the time dial is to be used he would reallze that:he must ~irst set present time on -the time dlal knob and then "enter" that time by pressing the , ~ knob. "Entering'l present time by depressing the time dial : ~ ~
knob shou1d~not change the state of the light or enter a 25~ marker~in the shift reglster (which does so in the timer : ~ :
:
.
~s~s~
disclosed i.n our Applica-ti.on Serial No. ~
Secondly, in enterinc~ a manual program bythe dial knob it was found that many users had di:Eficulty if present real time was located within a longer -time inter-val during which they wanted to have the light ON. Forinstance, if the time was 8:00 PM when the user desired to program the timer and he wanted the light ON from 5:30 PM
to 11:00 PM, he would have to set the dial to ~:00 PM and depress the d:i.a:L knob -to "enter" present -time. Then he would have to press it again withou-t rotating the dial knob to turn the light ON, since present time represented a desired ON time.
: To complete his program, he would then have to advance the dial knob to 11:00 PM, depress the tlme dial knob to turn the light OFF, advance again to 5:30 PM, turn the light ON and advance again to 8:00 PM to complete the : 2~ hour cycle. This last operation, the join;.ng up oE the early segment of an ON interval preceed:ing present -time with that:portion of the ON interval following present time, 20~ seemed to be a source of considerable confusion.
-In accordance with another feature of our present nvention, to simplify the operation so that the user can ignore the location of "present Lime" with respec-t to a .
desired ON interval, a system was devised tha-t permit-ted the user to employ a unifoxm sequence of operati.on no mat-ter .. . .
:
. ~ ~
: ~
:
-- ~ . . . - ,,: - .
-- 10 ~
where present t.ime was located. Thu.s he could think of act.ions that always involved first rota-ting -the ti.me dial knob to a desired time (present time, "ON" time or begin-ning of "OFF" tlme) and then pressing the knob to "enter"
that time. It was found -that the user learned this se-~uence much more rapidly and easily, because it allowed each dial setting to be associated with a single "enter"
direction - (1) ENTER PR.~SENT TIME, (2) ENTER B~GINNING OF NEXT "ON" TlME, or
(3) ENI'ER B~GINNING OF NEXT "OFF" TIME.
After "en-tering present time" the system permits rotation of the time dial to the first desired ON time. This se-quence of ti.me dial knob action is thus always -the same, ~:~ namely to rotate the time dial knob from an entered pre-J5~ ~sent time setting at the desired time of the beginning of :: an "ON" time peri.od and then to depress the same to first enter~an "ON" -time. Thi.s operation is repeated -to set and enter the beginning of the first "OFF" period.
Accordingly, this method of programming is easie.r, 20~ it is~believed, because it permits the user to think s~uentially oE (1) "present time", ~2) the firs-t desired ON time and (3) the firs-t desired OFF tirne, (~) the second desired~ON~time, (5:) the second desired OFF time, etco ~ un-~: ~: . :
til he~has set as many ON an.d OFF periods as desired.
25:~ ~ The time dlal knob is arranged so that :it can be . ~
~ , ~ . ~ : '' .:' ' ' ' `
-turned in one direction only, -that is, in the direction that advances the indicated time. When presen-t time is in-dicated on the time dial knob, it must first be depressed to "enter" present -time.- This action switches the shift xegister clock input from a real time pulse source to the output of a pulse switch ope.rated by movement of the dial knob to each shiEt detected positi.on thereof. There is no res-tric-tion on how much the time dial knob can be rotated after present time is entered. It can be rotated one step -to the first ON time or many complete revolutions to the first ON time. This lack o:E restriction also aids the user ~n separating the actions oE setting and en-tering "present time" from the desired fi.rst ON and OFF times.
. It wi.ll be recognized that the above method of programming as so far described will result in the shi.f-t reg;.ster having s-tage locations containing markeLs corres-ponding -to the desi.red ON or OFF condition of the controlled deviGe at the t:imes i.ndieated on the t:ime di.a.1 knob. ~Iow-:: :
ever, when a full 24 hour period has been programrned in -the 0 example program being described, the last location of the shift register will correspond wi-th the -t.ime indica-ted on the di-al knob when the firs-t ON marker was stored therein, xather than presen-t time, since it is the appearance of a :
1" marker in -the las-t storage location of -the shift re-gister tha-t signdls cornple-tion of a program c~cle with the~
programming format just described. In accordance with :
: . .:. . ,.
~ 9~5~3 anc)ther featllre of the invention, means are provided for automatically advancing the shift reyister so that i-t will be au-toma-tically advanced until the last storage location ^ corresponds to the -time indica-t~d when "presen-t time" was S entered. rrhis provicles au-tomatic synchronization of the shift registe~r locations with real time. At the same time that this is done, the shift register clock input is switched back to the synchronous real time counter output.
Thus the user is freed from any need to synchronize his pro~
gram with real time beyondthe initial entry of present time.
The stated feature that the shift register's last storaye location will contain the marker corresponding to the first ON time assumes that t.he user has completed a 24 hour proyram cycle by rotating the time dial described which encompasses only ]2 hours throuyh two complete revo-.
lutions after entering the irst "ON" marker. It is quite possible if not likely, however, that he may not have clone -this. For instance, he may have entered presellt -time at 2:00 PM, then entered a 5:30 PM ON time and 11:00 PM OFF
time. Since this may complete his desirecd program he may nec3lect to rotate the time dial further. In anticipating of this posslb~ y, in accordance with another ea-ture o the invention, m~ans are provided in the timer which, after the entry of present time and at leas-t a single ON time ~ollowed by an OFF time "wait" five or other number o~
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'-'1 , .
5~3 minutes mode of opera~ion is established to allow for fur-ther proyramming, if desired.-. ~fter this time period has lapsed, ~his means -then comple-tes the program with all sub~
sequent timing intervals OFF, and au-toma-tically synchronizes S the shift register with real -time jus-t as if the user had completed -the program by rota-tion of the time dial knob.
The problem of reviewing the program and return-ing the sh:ift register in synchronism with real ti.me also i.nvolves human engineering . The review mode of the timer should be possible at any time. In accordance witll another feature of the invention, to read ou-t the state of the storage locations of -the shif-t register i-t is necessary on]y to clock it through a comple-te program cycle wi-th the time dial knob af-ter presen-t time is set on the time dial knob and to observe the con-trolled device for an ON or OFF
condition at the times indicated on the dial. In order that the storage locati.ons be properl.y identified with :their real times it i.s necessary to set the time dial k.nob :: to the correct presen-t ti.me so that this ti.me will corres-20~ pond wlth the last storage location. Then, all the markson the time di.al knob will corresponcd with the proper storage loca-tlons in the shift register ~or the programmed : ~ markers. The review mode is-thus star-ted by an enter present time operatibn, namely by pressing the -tlme dial ~: 5 knob after setting the~s:ame to the correct present time. ~ .
9~
Thls switches ~he shi~t regi.ster cl.ock i.nput from the real time counter output to a pulser swi-tch output. The -time dial knob can then be rotated through a complete cycle to observe the sto.red program. The cycle can be repeated in-delinitely by continuing to rotate the -time dial knob. To terminate the review mode the user simply depresses the time dial knob a second time. When the time dial knob is depressed to term.inate the review mode, -the shift register is automatically clocked by exactly the number of pulses required so tha-t -the last storage location thereof will contain -the same marker that was present when the review m~de was initiated. Thus, the shift register is automati-cally resynchronized witll .real til~e. Upon -terminati.on of :~: the review mode the tlmer is placed back into the automa-tic mode and the lnd;.cator light cornes on steady. ~lowever, ; ~ to assure that the t;.mer ~`7ill not be le:Et in the review mode :.indefin:itely if the user fails to termina-te review, means is~provided which automatically termina-tes the review mode in approximately 40 seconds if no pulse is received from ~ : ~
the: pulser~switch during that period. It can be seen that the automa~ti.c resynchronization of the shift register with : : real t~ime upon the term;.nation o~ a review mode ma}ces it mposslble for the user to substantially disturb the pro-gram as a~resu1t of having reviewed the program.
With the constraint in the preferred form of the ~:
:
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invention p],aced upon tlle number of indicator l;.yhts (one) and controls (-two~ avaLlable to -the USeL as explained pre-viously, it became important to use the indicator lamp in a manner that would provide the most useful inEormation to ; 5 he user. (In the timer disc]osed in our application Serial No. i~L-}5~, a red light ls energized during programming and a green light is energized with the ligh-t circuit being controlled.) In accordance with another feature of the in-vention, only one indicator light is provided which has a flashing condit.ion when the timer is on and there are no prograrn mar]cers stored in memory. Since a flashing light is known to at-tract more attention than a steady li.ght, ~, this condition was selected to signal tha-t there is no pro~
.
gram stored in the timer's memory and timed operation will ` 15 not occur. This feature is partlcularly useful to call the ' : userls attention to the need to reprogram the timer after : a prolonged power failure. (Ano-theL featuLe of our :inven-~: tlon is that a power failure of less than a given time like 5 minutes will not cause loss of memory.) A s-teady-on con-dition of.the indicator light is used to indicate that the timer has been progra~nmed and is in the autornatic mode.
:
. Means:are ~rovided that permits -the timer to be in its automatic mode only if a 2~ hour program has been completely ~, stored in the memory. Thus the steady-on condition indica-tes : :
,:~ 25 both that there is a.complete program in the memvry and the .. , ~
' '~ :tlrner is in the automa-tic mode. ,The steady~on condition :
:
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enables the user to ~ulckly check his t.imer pri.or to leav-ing his dwell.ing since -that is when he is most concerned with having aUtOmat.lC operation of lighting.
It will be noted that t,he time dial knob is active in clocking the shi~t register only when the timer is being asynchronously (rapidly) pxogrammed or -the program is being reviewed~ In accordance with a specific aspect oE the in-vention, to provide the user with feedback that tel].s him the time dial knob is active, a brief pulsi.ng of the indi-cator light occurs with each step of the time dial knobrotation. Also, it is preferred -that the asynchronous (rapi.d) program mode is activated only if:
(1) the indicator l.ight had previousl,y been flashing -to indicate that the shift 15 ~ register storage loca-tions had been cleared and was read,v to accept a new program; ., (2) the time dial knob had been moved (to set present time); and (3) the time dial knob had been depressed 20 ~ ' to "enter" present time.
: The timer disclosed in our application Serial YS, ~
~No. ~74~, can be~programmed automatically by the pattern ~of operations of the depressible time con-trol knob during ::
the first 24 hours after the timer is turned or by 25 aSyll hronous manual prograrnming by using the time dial ::
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sc~
knob as descri.bed~ Thls rec~uires mealls for selecting automatica:l.ly the real time programming mode i~ the manual programmincJ mode is not selected. It should be noted that the reason for providing the real-time program mo-le is primarily because man~ persons find timer programming a clifficult task. This is true whether it is a simple mechanical -timer with a rotating clock face or a digital time piece such as an a].arm clock or wristwa.~ch To make certain any person, even a small child, could proyram the timer of this invention, -the real-time proyram mode was rnade -the easiest to use. To accomplish this, the real-time program mode is automat:ically entered when the power switch is moved from the OFF/CI.L~R position to the ON posi-tion.
Thus, to progr~m the timer the user merely turns lt on and ]5~ uses thé depressihle timer dia]. knob as a contact push-button for turni.ng on and off the light circui-t involved ~-for ~ pe~iad oE 2~ hours from the time tha-t the ].igh-t ci.rcuit is ~irst deenergized.
In accordance with an important feature of the 20~ pre.sent invent.ion, prior to the first time tile liyht cir-cuit is turned on, the indicator light will be flashing to - ~ndicate that there are no program markers in the memory and automa-tic operation is not possible. ~pon turning the ~;~ light circuit involved on for the first time the indicator : 25 iaMp will go out as in the case during the manual : !
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~ : 3 ~ ~ :
.. ' ~i . ' ' : ' : , ,.",;,, 5~
progranmm:i.rlg, si.gnifyiny the start oE a 2~ hour real-time proyram entry period. ~t the end oE the 24 hour period the proyram is comple-te and the timer is automatically placed into the automa-tic mode. Then the lndica-tor ligh-t comes steady-on to signal automatic operation is now possible and serves as a convenient signal that the 24 hour xeal -time program has been entered :into the memory.
Since -the real time program mode is so eas:ily entered, it was judged to be impor-tant to prevent the user from being "locked" into this rnode when it was not really his intention. rrhis would mos-t likely occur, for instance, riyht after the user had installed the timer. (It is anti-cipated that the timer will mos-t often be installed by the homeowner.) Immedia-tely upon ins~allation it will be -the most natural action for the user to test -the ti.me.r by de-pressing the time dial knob to see if he had normal manual control o:E the llght. The probability is hlgh that he will ~, want to enter a progr~m immediately using the time dial ~: ,knob. Therefore, in accordance wi-th another feature of -the 20~ invention, means is provided to prevent the real time pro-:
gram mode from being "locked-in" un-til the l.ight circui-t : : . is energizèd for at least one-half hour. This pxovides a :: .
half-hour "play period" during which the user may turn the . light circuit on and off withou-t yetting locked into the .
2S real time program mode. ThUS, each time the light is turned -:, , - :
- 1.9 -off in -the firs-t hal~-hour -the tlmer will revert to a "not proyrammed" mode and the indicator ligh-t will resume ~lash-ing.
It should be noted, also, that the timer reverts S to a non-programmed and light c:ircuit opening mode when power is restored following a prolonged power failure ~.i.e. greater than 5 minutes). In accordance with ano-ther feature of the invention, a power failure of less than 5 minutes will not cause loss of memory because such a loss de-eneryizes most of the timer circuits except those needed to maintain the rnemory through a voltage s-tored across a slowly dischargi.ng capacitor in the DC power supply. In ~ pr;.or ar-t timers, when tempoxary loss of power occurs and ;~ the light circuit becomes enery:i~ed again, the user is not usually aware that the pxevious timer se-ttincJs are no-t any-more operable at the time settings i.nvolved. With the pre-sent invention, the loss o:E t:he markers is indicated ~y a flashing light, indicatiny the need for reprogramming.
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Reversion to the "no-t~proyrammed" mode and automatic entry 20~ into the real--time proyram mode also of~ers the advantaye :; ~that the timer will be reprogrammed au-tornatically through norma1 household activity. Thus, a power failure ~hich occurs~when the persons who normally program the timer , ~ (or instance, the parents of small children) are away from : .
~ ~ 25 home for a prolonyed period, need not deprive the family of .
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the bene~it o:E automat;.c ligh-t operation ~ecause the person ;.n char~e of the children i.s unable to reprogram the timer.
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The above and other advantages and features of the invention will become apparent UpOII making reference to the specification to follow, the claims and the draw-ings . ,, .
esc_ipt _n of Dr~ s Fig. ~ is a perspective view of a light switchlO station in a home or -the like, which station includes a conventional dual s~itch aovering wall switch cover plate be~hind which is mounted at one side o:E -the plate a conven-tional toggle switch with its control arm protruding throug-one~vertical slot 1n the pla-te, and behind and over which ~ : :
lS~ at the other side of the plate is mounted -the tim~r of the invenLi.on wi.-tll`the several controls therefor occupving an :: ~ : :
area over and beyond the other ver-tical slot of the cover plate~(not~shown)~ through which slot the controls pass to the rear of the plate;
20~ Fi.y. 2 ls an~exploded view oE the diEferent basic parts making~up the -timer partially shown in Fig. l;
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Figs. 3~ and 3B together form a logic flow~and ;control diagram whioh indicates how the various modes of operation of~the timer are obtained in response to the tim-iny~of the operation of the various controls shown in Fig.l~
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F:i.gs. 4~ and ~B together form a ~ox diagram of the basic control elements of the timer of the present in-vention and the power circuit controlled -thereby including a lighting circuit, a three-way switch in series l:he~ewith and a power tr.iac forming part of and controlled by the other portions of the timer of the invention;
Figs. 5~, 5B and 5C together form an overall more detailed box diagram corresponding to that shown in Figs.
4A and 4B, except that some of the con-trol elemen-ts shown in simp.1.ified form in Figs. 4~ and 4B have been shown in more detail; and Figs. 6A and 6B are tables illustrating the var-ious inputs and outputs to and from the logic circuit matrix shown as a single block in FicJ. 5B, the dif:Eerent lS operating modes of the timer identified in Fig. 3A and 3B
:~ .
.and the input signals to which the matrix responds to pro-uce these operatiny modes, are the output signa:ls ~ener-~ated by the matrix for each operating mode and eachope~rating mode transition involved.
20~ ~ of the Invention . Timer Descri.ption From . User7s Standpoi_ (Fi.gs. l and 2 Referring now to ~igs. l and 2, there is shown a typlcal dual switch station wall switch cover plate l which S~ i5 mo.unted over a wall swi:tch opening normally accommodating .
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5~
- ~2 -two -toggle swi-tches. As illustrated, -the cover plate l has on one side thereof a vertical toggle arm--rece:iving slot 5 through which projects the usual toggle switch arm 6 ~or operating a switch unit mounted behind the p]ate upon a S metal strap tnot shown), as is conventional. The toggle switch arm 6 controls a light c;rcuit differen-t from that controlled by the timer to be described. The timer of the present ;nvention illus-tra-ted generally by reference numeral 7, has portlons bo-th mounted upon and behind the cover plate l. The cover plate is anchored in place in a conventional way by a pair of anchoring screws 3a-3a above and below the plate slot 5. The timer has a front housiny sub-assembly 7A with a control pane] 8 upon which various manually operable controls are accessible. Anchoritlg screw 3a' anchors -the timer front housing sub-assembly 7A and the cover plate 1 to a metal strap 10 (Figure 2). ~nother screw 3a", accessible when one of -the controls ;s pulled from the control panel ~ and passing through -the other ver-ticàl cover plate slot 5', also helps to anchor the cover , ~ . .
plate l and the front housing sub-assembly 7A of the timer.
The screws 3a' and 3a" thread into threaded holes 11 and 11' in the Eron-t wall of a timer rear housing sub-assembly 7R (Fig. 2).
; One oE the timer controls re~erred to is a :: :
~ 25 ro~tatable and depressible time dial knob 1~ (sometimes re-: ~ :
-~ ferred to also as a time interval setting means). This ~ ~ .
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s~
kno,.b is supported so it has 24 discrete positions and each discrete pos:.ition thereof brings a new half-hour ti.me set-ting opposite an index mark 13 Oll the panel 8. The knob 12 is press-fitted over a depressible shaf-t 12b projecting from the rear housing sub-assembly 7B and passing through cover plate slot 5'. Also, the shaft 12b or knob 12 is rotatable in only a clockwise direction. The knob 12 has on the side thereof hour .indicating indicia and mar];ers 12a, there being lZ such markers representing 12 hours of the day, and half hour~i.ndicat;.ng markers 12a' mid-way between the hour indicati.ng markers. The markers 12a and 12a' are i.ndividually positi.onable oppos.ite the index mark 13 on the pan~l 8 t:o identify the begi.nni.ng o:E the various halE-hour : time intervals during which the light ci.rcuit con-trolled by the timer i.s to be energized or de-enercJized in accord-.
~ ance w:ith a light control program established by the ti.mer.
;::
When the knob 12 is rotated through a first 12 houx period, an:"~M'' or "PM" marker 14' previously visible in an opening .
: 14 in the control panel g will change to the other of same, 20 ~so that the paIticular "AM" or "PM" hour of the day is ind.i-cated~ ~The rotatable tlme dial knob 12 is also a depressible member so~as to act as a power on-off switch control and as :~ ~ a turn-on and turn-of~ marker signal generating control ~ during the lnitial programming of the timer. After the knob ; 25 12 is initially.rotated to a present time setting and de~
` pressed once to "enter" present time, each subsequellt .
~1 6i~ r~
- 2~ -depression will generallly alternately energize and de-enerylze the ligllt;ng circuit involved and, during initial pro~rammincJ of the timer, will set or re-tain a turn-on or turn-off marker in the timer memory.
There is also exposed on the front of the panel 8 a timer cond;.tion settlng arm 15 which is movable between two stable extreme positions within a horizontal slot 16 in the panel 8. The arm 15 extends from a shiftable plate 15a in the front housing sub-assembly 7A which has a slot lSb receiving a switch actuatincJ arm l5c projecting forward-: ly from the rear housing sub-assembly 7B. The extreme left-hand positi.on o:E arm 15 is in "OFI~/CI,EAR" position where the timer i.s turned o~f and the pc>wer circuit involved is completely interrupted by an air gap. When the arm 15 is in its extreme right-hand position, -the timer is in an "ON"
posi.-ti.on to be programmecl i.n the m~nner to be described and, after completion o~ programming, unless the knob is depLessed :~ in a special manner to be described, the light circuit in-volved is energized by the markers stored in the timer ~ 20 memory, unless such automatic control is overridden by de-;~ pression of the knob 12 ~/hich will reverse the condition of the light circuit involved.
. When the -timer of the preferred exemplary form of the invention being described is initially installed, as just indicated, -the user will Eirst move the timer condition ~:
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set-tiny arm 15 to the "OFF/CLr`~R" position. If this arm is posi-tioned thusly ror at least S seconds and then moved to the far right-hand "ON" position, this will initiate a re-setting operation of all of the circui-ts that need to be xeset, and ini.tiates a basic "play" period, which is assumed to be 30 minutes (but could be a much shorter period like 20 minutes or so). A LED indicator 17a (shown in ~ig. 3A), vi.sible through a lens 17 aligned therewith through an emp-ty screw-receiving opening 17' in the plate 1, will preferably flash at -this point in the operation of the timer to indi-cate a "not programmed" mode of operation of the timer.
When starting this "play" period, the LED indicator goes : off and any depressi.on of the knob 12 which is not combined . w.ith a previous rotat-ion thereof will have to ef:Eect on the . lS programming of the unit, but will only be effective in rendering conductlve or non-conductive a power triac 10 : (Fig. 4A) controlled by -the timer. If the depression o the : :
~:
knob 12 turns the ligh-t circuit on and the light remains on for the duration of -the "play" period, the previously men-20~ tloned real time-programming of the timer takes place. If : : .
~ the knob 12 is depressed to turn the liyht circuit off be- . .
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fore the play period is over, the timer returns to its "non-programmed" mode of operatio~. Then, when the knob 12 is ~rotated to a given detented time setting position referred ~; 25 to~as~a présent ~ime setting, and the knob is depressed to -:
: "enter" present time, this initiates manual prog.ram modes ~ ~ .. ' :
.
of operation to be described, where the s-torage locations in the timer rnemory are accessed manually as the knob is ad-vanced each one-halE hour position. Upon entry of a manual program mode of operation, the LED indicator light goes off, except that the LE~ lndicator will pulse once as the knob 12 is advanced each detented posltion thereof The manual programming of the -timer is effected by the user rotating the knob 12 to all of the various hour o:E half hour time setting positions beyond the firs-t turn-on period and depressing the knob 12 once at each timesetting where a change in the light condition is desired a-t the time setting involved. The first depression of the knob 12 after present time is entered wi]l turn the light circuit involved on. ~t tha-t point in time and as the knob is fur-ther advanced to each subse~uen-t one-halt hour se-t-ting, and ON "1" mar]cer is entered into a storage location of the timer memory assigned to the time intexval involved.
When the light circuit is turned OFF by the depression oE the knob 12, an OFP "0" marker is entered into the appropriate storage Location of the timer memory. Each subsequent one ; half hour advancement of the knob will continue to enter "0" marker :in the corresponding storage locations until the knob is once again depressed. ~f the user rotates the-knob 12 two full revolutions throughout all of -the 24 hour posi-, ~ . :
tions from the point he has depressed the knob 12 to energize .
; the llyhting circuit for the first time and he has depressed '~ ' , , : ,' -5~3 the knob once again to rurn -the circuit off, or he has carried out additional pairs of successive knob depressions so that he ends up with the circuit off, then all the proper programmi.ny markers will have been entered into memory and an automatic programming mode of operation will come into being, and the LED indicator comes steady-on.
If the user within a medium time (MT) selected as 5 minutes after each advancement or depression of the knob 12 from the t.ime he "entered" present time depressed the knob 12 only once so as not to complete the identification of one ON -time interval, the -timer returns to a "not-pro-grammed" condition. If he has depressed the knob 12 twice to identify one ON time interval, bu-t does not rotate knob 12 to all the ~8 half-hour settings from the first ON markex : 15 setting, the manual programming mode of opera-tion wi.ll . automatically be completed by the automatic entry o:E "0"
markers in the remaining unaccessed storage locati.ons, so .
~ that the timer becomes fully programmed and is in an automa-`: :
: tic operating mode.
; 20~ : It sho~lld be recalled that when the timer condi-:
tion setting arm 15 is moved from the "OFF/CLEAR" position to a "TIMER-ON" position for the first time, and the 30 minute play perlod ex~ires, if the knob 12 is not subse-.
quently rotated within a 2~ hour period, the storac3e :
locati..ons of memory are synchronously accessed in real time ::
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to provide automatic rea.1. time proyramminc3 of the timer where each depression of the knob 12 to turn the l.l~ht circuit involved in the normal manner on or off will enter or retain an ON "l" or OFE "0" marker in the timer memory.
After completion of a real time 24 hour pro~ramrning of the timer, the timer is in an au-tomatic operatinc3 mode where the light circuit involved is controlled automatically in accordance with the markers in memory, even if the opera-tor does not do anything else to the timer. This real time programming permits anyone to pro~ram the timer with no effort heyond turni.ng the timer to ON.
If the user desires to disable the automatic operation of the timer without los;.nc3 the markers in memory, he depresses the knob 12 1n a disti.nc-tive mannex, ].ike two fast depressions thereof less than .8 seconds apart (or once for a prolonged peri.od). ~hen si.ngle short depressions O e the knob 12 will turn the l.i~ht circuit on and off in a . normal manner. ~'he automatic mode of operation of the ~: ~ tlmer is: re~established by a~ain operating the knob in the ~ 20 distlnctive manner referred to.
; One important feature of the present invention is ;~ the ab~ility of the timer to ho1d i.ts memory even if there should be a loss of power for not more than about 5 minutes.
~: ~ If there:is a loss of power Eor less than about 5 minutes, 25~ a DC power supply capacitor will hold a sufficient charge ~ ~ ~ . , ., ,. ' 5~
to be able -to ~nergi7.e the memory maintaining portion of the timer, and circuit disabli.n~ means are brough-t into p]ay when power is los-t to disconnect the DC power supply from the portions of the timer not needed to maintain memory.
If power is interrupted for more than about S minutes, memory is lost and this will be i.ndicated by the flashing of the LED indicator which shows. that the timer has returned to a "not-programmed" mode of operation.
Operation of Timer Explained From I,o~_ _low and Control Dlagram of F.i~ 3A and 3B
:, The various modes of operation oE the timer in the preferred form of the i.nvention are illustrated in Figs. 3 and 3B which, for the mos-t part, is self explanatory. The nomenclature and abbreviations of the different modes of ].5 operation needed to bes-t understand the logic circuit ma-trix tabl~e of Figs~ 6P~ and 6B are shown in Fi~s. 3A and 3B. As there shown, when the timer condition settin~ arm 15 i9 first moved to the l'oN" position from the "OFF/CI.EAR" posi-. :
tion under circumstances where memory has been lost or had ~not been establi.shed, the timer is in what is referred to : :: ; as~a "power up" (PU) mode of operation identified in block A representi.ng -the control means which effects this control.
Control B then causes the time.r to enter the "not-pro-grarnmed"~tNP) mode of operation previously described where ~: 25 -the~LED indicator 17a 1ashes. For the next 30 minutes, ..:: .
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as long as t.he knoh 12 is not rotated in a cloc]cwise direc--tion, (coun-terclockwise ro-tation thereof causes slipping of the knob and no de-tented rota-tion of the knob shaft) a "pla~" period takes p].ace where the knob 12 may be depressed successively to turn the light circuit on and off a-t ~7ill .
The firs-t time the knob 12 is depressed under -these condi-tions, control means M causes the timer -to enter a "learn enable" (I.E) mode o:E operation where the LED indicator turns o:Ef. At the end of the "play" period, or a-t any time during the "play" period when the last depression of the knob 12 turns the light circuit off, control means B causes the timer to return to the NP mode of operation. After this 30 m:il~ute p.~ay period, beclinning with the tirne that the control knob 12 is thereaf-ter first depressed to turn the lS ligh-t ci.rcuit on, con-trol means N causes the timer to en-ter the "learn" (LPN) mode of opera-tion when the L~D indicator is o:Ef. As the control knob 12 is depresscd -th.roughout: the following 24 hour period from the ti.me the push hutton 12 :.
: was first depressed after the 30 minute play period is over, : 20 liyht turn-on and turn-of markers are set in the storage :
locaLions of a memory identified wi.t.h the particular tim-; ing interval involved. During this period the d:ifferent .
storage loca-tions o memory assigned to the various time intervals are accessed synchronously. ~t the end of this 24 hour period, ~ontrol means J causes the timer automa-tically ~.~
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to enter an "aui,omatic" (~'rO) mode of operation where the LED indicator comes steady-on. ~t any time duriny -this ~UTO mode of operation, as previously indicated, if the con-trol knob 12 should be depressed once, this will temporar .ily override the automatic control over -the light circuit at that particular time, and reverse the condition of the li.ghts involved. If the knob 12 is depressed again, the condition of the lights will return to the same condition for which the au-tomati.c control thereof ~lould become re-establis}led. (Permanent override of the automatic controli5 onl~ achievecl by the aforesaid distinctive depression of the knob 12. This is achieved by contro]. means P shown n Fi~. 3A.) If it ~s desired -to dete.rrnine the actual pattern ;~ 15 of -turn-on and turn~off markers which are sl,ored in the storaye locati.ons of the memory, the timer can be operated in ~vhat is referred to as "revie~ enable" ~Rr~) and "revi.e~"
(REV) modes of operation shown in the con-trol means-indica~
. ting boxes K and L in Figs. 3A ~nd 3B where the synchronous 2:0 accessing of the memory storage loca-tions is texminated.
;; Tha RB mode of operation is entered by control : means K when the user first advances the control knob 12 to bring the hour or half hour marker 12a or 12' opposite the . index mark 13 which iclentifies present time. The LED indi-:
~ 25 cator is-then steady~on. When the user then depresses knob .
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~.~,6~g~
12 he~ "enters" presellt time, and control means L causes -the timer to en~er the RF.~' mode of operat-ion. Then, as the control knob 12 is advanced in a clockwise direction to each detented one half hour -time posi.tion to bring the var~
ious markers 12a and 12a' opposite the index mark 13, a stoxage location accessing pulse is generated and the marker stored ;.n each accessed locati.on for the time interval i.nvolved is i.dentified by the actual state of the light circuit for the time interval involved. To re-enter the AIJTO mode of operation from the REV mode of operation, it is only necessar~ to depress the control knob 12 once. .
Also, if the user forgets to depxess the control knob 12 to en-ter the automatic mode of operation beyond a basic timing period, which was selected as a short timing (ST) 15~ period referred to as 40 seconds, then AUTO control means J .
:causes -the timer to return to the said Au~.ro mode of opera-: tion from either the REV or RE modes o operati.on. ~s ~:~ previously e~plained, the manual program modes of operation :: :
of the timer are entered from the 'Inot-programmed" (NP) 20 :mode by first rotating the control knob 12 clockwise at least one posit1on where a control means C causes the timer to ~: :
enter what is refe~red to as a "manual program enabled"
: (MPE) mode of operation, where -the LED indicator continues ~` : to flash. The control knob 12 is rotated in a clockwise direction to bring the marker 12a or 12a' representing : .
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present time oppos:i-te the index mark 13, after which the user depresses tl1e control knob 12 once to enter present tlme. Then, control means D causes -the timer to enter what is r~ferred to as a "manual program not initiated" (MPNI) mode of operation. (The LED indicator pulses once as the control knob 12 is moved to each detented positlon thereof.) -After such a present time setting and enteriny operation, as previously indicated the next depression of the control knob 12 ~lil]. be effective in first turning on the light circuit involved and enteriny a turn-on marker into the storage location which is accessed, as determined by the number of pulses which are generated by the control knob 12 '~
since the present time settlng.
The first ligh-t circui-t turn-on depression of the knob 12 after the knob is advanced -to a time setting i.denti-fying the beglnning oE an ON time interval causes control : means E to oper,lte the timer in a "Manual program initia-ted"
MPI) mode of operation. As the control knob is furthex advanced clockw1se ater the first on-time set-ting, ON
~: , 20~:~markers are entered into the various storage locations of . the timer memory as each detented posi.tion of the control :: : ~ : :
knob generates a pulse to access a new storage location, and~a control means F causes the timer to enter a "manual program not-validated (MPNV) mode of opera-tion. The control ;~. ; 25 :knob 12 is advanced by the user to the time set-ting .
:
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.: ' , : ~
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95~
- 3~ -ident;.fying the encl of an ON time interval, which .is the beginni.ncJ of a desired OFF time inte val. If, by mistake, the user should rotate the control knob quickly beyond the . various possible marker setting positions thereof before he depre.sses the control knob 12 to enter a first OFF marker, control means D will respond to -this mistake by re-turn-ing the mode of operation of the timer to the "manual pro-c3ram not initiated" mode of operation~ Ho~ever, if the user correctly depresses the control knob 12 to turn the light circuit off and to insert an OFF marker into the timer memory starting at the previous time setting of the control knob involved, then control means G operates the ,~
-timer in a "manual program transition" (MPT) mode o opera~
tion. If the user depresses the control knob 12 ac3ain lS w~thout rotating the knob, in effect to cancel the "OFF"
marker Which he has just set, control means F will then return the timer to the "manual. procJram not vali.dated" mode of~operation. However, ~f he rotates the knob 12 for fur-t~her entry of a lrst OFF marker/ then control means ~1 op--20 ~:erates the:time.r in a "manual program validated" (~PV)mode of operation where the timer will be automatically or~manual~ly operated into a completed program or "auto-mati~o": (AUTO) mode of opera-tion in the manner to be des-: ~ :
cr:i~bed.
~ ~When the timer lS in the "manual program validatedU
mode of opera-tlon, the user can enter other ON and OFF
markers at deslrable time set-tings by depresslng the con-trol knob 12 to -turn the lighting circuit ON, followed by rotation of the control knob 12 of the time settlngs for which an ON time interval is desired, and similarly can depress the control knob 12 -to en-ter OFF markers in the storaye locations identified by -the rotation o:E the control knob 12, to complete a desired pattern of O~ and OE'F time inter~als for the lightiny circuit involved. When the control knob 12 is manually rotated -to a time setting which completes marker entries in all of the storage locations, a control means I wlll operate the timer in a "pre-auto"
(PE) mode of operation. ~fter a short period of -time yreater than about one second, as or exarnple, a period r; greater than 0.8 seconds, the control means J will opera-te the timer in the "autornatic" mode of operation. If the "pre-auto" mode of operation is enlered by the use-c advan-ciny the control knob 12 quickly up throuyh and beyond the point where~the 1st ON marker is added to the last storage 20 ~1Ocatlon o~ the tlmer memory, the automatic control means J will not respond to the extra control pulse generated hy the~advancement of the control knob 12 beyond the point where the last marker is en-tered in the last available storaye ~location of memory~. If the -timer had then been ln .
~ 25~ an "automatic" mode of operation, then the control means ~
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would have xe~ponded to -this exl-ra pulse by shif-ti.ng the timer into a "review enable" mode of operation previously descrlbed, an obviously undesirable mode of operation ~hen the control knob .is spun cluickly to complete a manual pro-gramming operation..
Some o the control means shown in Fig. 3A and 3B respond automatically to.the passage of various time intervals, to shift the mode of operatlon of the -timer from one mode to another. ~hus, when the timer is in the MPNV, MPI or MPNI modes of operation, and the timer has not been advanced t:o the "manual program transition" mode of ; operation referred to with;n a medium time (MT) lnterval selected to be five mi.nu-tes since the knob 12 was last ro-tated or depressed, control means B will cause the timer to return:to the "not programmecl" mode of operation. A.l.so, :
: when the timer is in e;.ther the "manual program -transit:ion~' or::the "manual proc~ram validated" mode of operation, and .
~ nothing is done by the user to advance the timer to the :
"automatic" or "pre-auto" mode.s of opera-ti.on of the timer, : 20;~ within the five minute t:~me interval described (i.e. since the last:rotation or~depression of the control knob 12~
then control means~ will au~omatically shift the tim~r into the "automatic" mode of operation by entering or re- ~
taining OFF ma~kers in the remaining unaccessed storage --locations of the timer memory~ Also, when the~ timer is in the "manual proyram enable" mode of operation entered by the .
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~9~0 set-tiny o:~ knob 12 to present -time, if the knob 12 is not depressed to "enter" presen-l: -time within ~0 seconds, con-trol means B returns the timer to the "no-t-prograrnmed" mode of operation.
Description of Simplified Block and C.irGuit Diagram of Fic~s. 4A and ~B
... .
As shown in Fig. 4A, the circuit controlled by the -timer shown is a lighting circuit energized :Erom a pair of ll0 volt, 60 cycle power lines 9-9'. The timer also derives its energi~ing power ~rom these power lines 9-9' but indirectly therefrom in a manner to be described. The power line 9 is shown exl:ending to a pair of spaced stationary contacts 23a-23b which can be bxi.dged by a wiper 23c whose position is determined by tlle movement o~ the timer condi-~: l5 tion setting arm 15. The contacts 23a-23b are bridged by the~wiper 23c when -the arm 15 is moved to the right~hand "ON" posltion. A conductor 24 extends ~xom -th.e stat:iollaxy :~ :
: :~ contact 23b to one of the load terminals l0a of the power ~ : triac I0 whose other load terminal l0b is connected by a :
20 ~conductor 9" to a 3-way switch 25. I~7hile -the present inven-tion:is operable without the presence o~ such a 3-way :swi~ch, it is extremely useful i:E the presen-t invention can be incorporated lnto any~wall switch station position which may already be wired ,in series with a 3-way switch. The : ~: ~ : :
~ :25 loc~ic of the presen-t inve~tion is designed to accommodate : . :
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5~
hoth pro~ra~ing and ligllt turn-on ancl turn-off operations through operation o~ either the 3 way switch or the control knob 12. (The 3-way swi-tch controlled aspect of the inven-:ion is a sole invention of I,ouis Schornack.) The 3-way 5 switch 25 has a wiper 25c movable between a stationary con-tact 25a and 25b. A jumper 25d is shown interconnec-ting the stationary contact 25b with the wiper 25c. A conductor 26 extends between the wiper 25c and one or more lighting devices on lamps connected in parallel, iden-tified as lighting means 11 in Fig. 4A. The stationary con-tact 25a is connected to a pulse generating circuit to be later des-cribed which generates a pulse each time the wiper 25c is moved between the contacts 25a and 25b.
The ~C volta~e utilized to energize the various circuits to be described is obtaincd from a DC power supply 30 whlch must ob-tain its energization from across the load terrninals lOa and lOb of the power triac 10, since there is only one direct connection to a power line available in any wall switch opening in which the present invention is desir-20 ~ably mounted. (It should be understood, however, tha-t the ---;
present invention is also applicable to timer applications .
~:: :: :
~which are table mounted or mounted in some other location ~;~ than a wall switch box, in which case accesss -to both power lines 9 and 9' would normally be available.) 25The po~er trlac 10 is controlled in a well known -~ manner wherein a control terminal lOc thereof is connected : ~ , : .
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to a source of current which can render the power triac 10 conduc-tive generally at a pOillt within several degrees after the ~.,ime the applied AC voltage passes through zero each half cycle involved. However, this short period dur-ing which the power triac 10 is non-conductive is suffi- .
cient to provide a voltage drop across the terminals of the power -triac -to energize the DC power supply which charyes a capacitor 30b through one or more rectifiers like 30a shown i.n Fig. 4A. (There are a number of such prior art DC power supplies which can be used.) As shown - in Fi.g. ~A, a conductor 32 connected to the triac load ter-minal lOa extends to the junc-ture of rectiEi.er 30a and a terminal of a resistor 30c whose o-ther terminal is connec-~ ted to one of the plate terminals of capacitor 30b whose : lS other plate terminal is grounded. The anode of rectifier 30a is shown connected to ground. The ungrounded plate of ~ ~ capaci.tor 30b is shown connected through a suitable control circuit 30d to the other load terminal 10b of the power triac 10. Suffice it to say, the DC power supply develops .
~ 20~ across the capacitor 30 a charge sufficient to enexgi.ze all :
: the circuits referred to, and to energize at least the memory portions of the circuit to be described for at least : ~ :
. : about 5 minutes should power be completely interrupted for :~ :
such a period. Th.is is useful in accordance with one of the aspects of the .inven-tion where, upon a less than 5 ~' minute time power failure, the progran~ing of the timer is :: ~ ' `
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~9~
- ~o -not lost because of ~he selected ellergization of only the memory retaininc3 circuits. A V-~- DC voltacJe output termi-nal 32 is shown connec-ted ~o the ungroun~l 3 plate of the capaci.tor 30b. (For a very useful DC power supply ener-gized in the manner described, reerence can be made to d os~ ~rl/ed~y ~i~g U~S.~ ~c~ ~ri~r~ No./~ e~ d~2~, 19~
When the t.imer condition setting control arm 15 is on "OFF/CLEAR", the wiper 23c bridges a pair o:E ccn-tacts 23a' and 23b'~ The contact 23a' is shown connectedto the con-tact 23b previously described and the contact 23b' i.s shown grounded. It .is apparent, there~ore, that when .
the wiper 23c bridges tile contacts 23a' and 23b', the resis-tor 30c is connected dlrectly across the capacitor 30b to ~orm an air gap interruption of the power circuit requ.ired for UI. approval oE the timer and to discharge the capaci-tor 30b to de-energi~e the enti.re timer sys-tem.
As previously indlcated, as the con-troL knob 12 . is advanced each detented posit.ion, a storage location ac-,, 20' cessing pulse is generated, and as the control knob 12 is depressed, a slgnal is generated to set a turn-on or turn-: off marker in an appropriate storage locat.ion of a memory which, in the most pre~erred ~orm of the invention, is a shift register to be. described which has 48 stages in the case where we have 48 one half hour marker accepting time ~ , .
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..
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5~
intexvals wlthin a 24 hour period. While these pulses and signals can be generated in a variety of ways, in Fig. 4A
the control knob 12 is shown connected to a shaft 42 carryiny a ratchet 44 along tlle periphery of which slides a sprlng ~5. The spring 45 acts as a detenting spriny so that the control knob has the 24 discrete positions with-in one clockwise revolution thereof, and in the pre~erred form of the invention also acts as a control arm for.caus-ing a pulse generator 46 to generate a pulse each time the detent spring 45 slips off the highest portion of a detent tooth and falls within the bottom of the recess between successive teeth.. (It will be recalled that the contro].
knob 12 on the sha.Et is rotatable in only a clockwise direction so that the shaft 42 can only be rotated in a clockwise direction~) This pulse generator 46 may prefer-ably comprise a pie~.oe~ectric elemen-t which is unstressed sllddenly as the detent sprlng falls of:E the end of a ratchet tooth, to generate an initially large amplitude : gradually decaying amplitude sinusoidal-like waveform which lS; converted to a single pulse by any sui-table "debouncing"
circuit 4B known in the art. Such a pulse generating cir-cuit is desirable because it cannot generate a Ealse pulse of any signifi.cant amplitude~by vibrations or teasing the : knob, as is readily possibIe with pulses Eormed by making - . .
~ 25 or breaking contacts. The output 48b oE the debouncing : ~ . :, :
:-- . ~.:
9~
circuit 48 is coupled by a control line 49 to the "pulse"
input 40j of a control circuit 40, and the input 73j of timing means 73 (Fig. 4B) and also by a control line 49i (Fig. 4Aj of the input 51b of an "~ND" gate 51 which con-trols the asynchronous accessing of the storage locations of the timer memory, namely the shift register 62 in Fig.
4A. Control circuit 40 may comprise logic circuit elements as well as a logic matrix controller 41 (Fig. SB~, the operation of which is illustrated by the charts shown in Figs. 6A and 6B and by the flow diagram of Figs. 3A and 3B.
The end of the shaft 42 bears against an outward-ly spring-urged movable contact 50c~ ,When the control knob 12 is depressed, the movable contact 50c bridges a , pair of stationary contacts 50a and 50b to couple the out-~ put of the DC power supply to a conductor 53 extending to the input 52a of an "OR" gate 52, whose other input 52b is connected by conductor 60 to khe output 58b of a voltage change pulse~ circuit 58 shown.in detail in Fig. 5A to be described. The voltage change pulser circuit 58 has an input 58a connected by a conductor 56 to the stationary contact 25a of the 3-way switch 25. As previously indica-ted, as the wiper 25c of the 3-way switch is moved between '.
engagement with the'stationary contacts 25b and 25a, the : voltage conditions at the stationary contac-t 25a will shift between a condition where it recelves a 60 cycle voltage to a condition where it receives no voltage. The voltage -.:
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s~
- ~3 -chancJe pulser c:ircuit 58 is one wherein, upon each change of condition of the inpu-t vol-tage, it will generate a positive pulse a-t -the outpu-t terminal 58b fed -to "OR"
gate 52, thereby duplicatiny the signal conditions pro-duced by the successive depression of the con-trol knob 12.
Accordingly, as the control knob 12 is depressed or w.iper 25c of the 3-way switch 25 i5 moved from one contact posi-tion -to another, a positive pulse ~ill appear at the output of the "OR" gate 52 which is connected by a conductor 54 to the con-tro:L circui-t 40 to effect ON and OFF marker setting and power triac turn-on and turn-off operations.
I-t is apparen-t from our previous description of the basic modes oiC operation of the logi.c flow and cont:rol circuit diagram of Figs. 3A ancl 3B that -there is provided a means for generatincJ a signal, such as a momentary pulse, when the power is initi.all.y applied to the timer. To this end, an init;,al power-oE:r~-to-on s~nsing circui,t 55 (Fig.
4B) is provided (whi.ch is shown in more detail in Fig. SC) which has an input 55a connected to -the ~C ou-tput of the V~ terminaI of the DC power supply 30. ~s the capacitor 30b of the DC power supply charges up to its normal maxi.mum voltage (of about ~4 vol.ts), a single pulse appears at the power-up reset output 55b of the sensing circuit 55, which ; pulse is coupled by a conductor 57 to powex-up reset inpu-t ~ 25 40k of control circuit 40. This pulse initiates the : - ~ .
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9~S6~
"power-up" mode of operation of the timer.
~ s previously indica-ted, means axe provided for disabling the higher current-draininy portions of the timer when power on ~C lines 9-9' disappears. This means is a power-ou-t timer circuit 63 (l~ig. 4A) whieh has a disable input 63a connected by a conductor 61 -to the output 57b of pulse shaping means 57 whose input 57a is connected to load terminal lOb of the power triac. The 60 cysle ~C voltage always present on this terminal when power is on will be converted to a 60 eycle sc~uare wave si~nal by pulse shapiny means 57. When power goes out, the power-out timer 63 becomes operative to produce a "1" stand-by sig-nal at its output 63b for the five minutes or so cluring whieh the eharge on capacitor 30b of the DC power sup~ly remains at an operating level. Th;s signal is connected by a conduc-tor G7 to the "disable" inpu-t 74B of an oscil-ld-tor 74, and to input 40w of the control circuit 40 Fig. 4B)~ which, among o-ther -things, renders the power : .
triae eontrol c:ircuit to be described inoperative. These 20 ~ reLatively large power drawing circui-ts are de-ener~ized by this stand-by signal during a 5 minute power s-tand-by mode of opera-tion of the timer where the markers are re-tain~ed in memory.
It will be recalled that the eontrol circuit 40 ~; 25 funotions in response to the relative spacing between var-IOUS signals generated by the eontrols of the timer. For .
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~ 5 _ example, the mode of opera-tion of the -timer changes to a timer-off mode if the control knob 12 is successively de-pressed in a time less than 0.8 seconds. Similarly, certain operating modes are automatically changed when "automatic" mode or the "manual program transition" mode is not reached within 5 minutes. To this end, Fig. 4A
shows the conductor 5~ extending from the ou-tput of "OR"
yate 52 to input 73i of a timing circuit 73 (Fig. 4B).
Also, the conductor 49 e~tending from the output o~ the debouncing circuit 48 connects to input 73j of the timing circuit 73. This timing circuit is also the source o~
var:ious timing pulses, such as a 30 minute pulse which occurs every 30 minutes. This 30 minute pulse appears at an output 73e of -the tirning circuit 73. The timing circui-t 73 also is shown having SST, ST, MT and LT output terminals 73a, 73b, 73c and 73d at which respectively a "0" signal is present when the tlming measurement involved is below the time indicated on the lines e~tending from these outpu-t terminals and a "1" signal is present when the -timing meas-:
urement involved is greater than the time indicated. The manner in which these timing signals operate is shown by Fiy. 6A and was descrlbed previously in connection with Figs. 3A and 3B.
In Fiy. 4B, the LED indicator 17a is shown con-25 ~nect~d between ground and the output 84a of an"AND" gate 8 - . . : .
;' ' :'. ' '' ~
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having an :inpu-t 84c coupled to the output of an inverter 83 whose input is conn~cted by l;.ne 61 to the "stand~by"
output 63b of the power-out timer 63 so that "AND" yate 84 is closed during "stand-by" operation. (I-t will be 5 assumed that all i'ANr)"gates operate on the principle that all inputs must have a "1" state signal for there to be a "1" operating output state signal.) The "AND" gate 84 has anothér inpu-t 84b ex-tending I:o the output 81d o:E an "OR"
gate 81 having inpu-ts 81a, 81b and 81c respec:-tively ex-10 tendiny to "flash", "pulse" and "steady-on" outpul:s 40c, 40d and 40e o.1~ the control circuit 40. The signal appearing at the various inpu-t -terminals 81a, 81b and 81c of "AND"
gate 84 ~i.ll respec-tivcly be signals which will produce flashing, pulsing, or a steady-on condition of the LED indi-15 cator 17a except duriny "stand-by" opera-tion.
Fig. 4A shows the shif-t regis::er 62 as a 48 stage shi:E-t regi.s-ter having shi.ft pulse, data input, and reset input terminal 62a, 62b and 62c, respectively. Also, the shift register has a Q48 output terminal 62d (which repre-.
20 sents an output oE the las-t 4~th stage of the shift register).
The ~output terminal 62d of the shift register 62 is connec-ed by d cond~uctor 67' to the input 69a of a control ~ate 69 having an output 69b coup].ed by a conductor 71 to the shi:ft xegister data input terminal 62b so that the informa-2S tion ultimately stored in the shif-t register can be re-c; r-: - .
culated. The gate 69 is controlled by the "programmed"
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- ~7 ~
output g6b o:E '-he "1" marker sensi.ng means 80. Accordingly, when the timer is in the "automatic" mode of operation the gate 69 will conduct to permit the re-circulation of the markers within the shift register. ~Iowever, before -the "automatic" mode of operation of the timer is established, the gate 69 will not conduct and the shift reyis-ter 62 receives signals at i.ts data ;nput termlnal 62b from the clrcu.;.t to be descri.bed, to provide "1" or "0" marker setting signals thereat.
The shift register 62 will be assumed to be of a type where a "1" shift pulse will shift a particular "0"
or "1" signal at the da-ta input terminal 62b to the output of the firs-t stage of the shift register. The shift pulse input terminal 62a is connec-ted to the output 66a of an "OR" gate 66 which has one input 66c extending to the 30 ninute pulse output of the timing circuit 73 so that this pulse is fed to the shift register ever~ 30 minutes in real.
time when the shift register is to be synchronously shifted.
Another input 66b of the "O~" gate 66 extends to the output 51a of an "AND" gate 51 whose input 51a e~tends to the line 49' extening to the ou-tpu-t of the debouncing circuit 4%.
The "AND" gate 51 has another ;nput 51c which extends to the "pulse enable" output 40h of the control circuit 40 to recelve an enable voltage during review and all manual pro~
:; 25 gram states e~xcept the MPE mode of operation as sho~n in .1~.~.- '' .
:
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~6;9~0 Fi(l. 6B, so tha-t the shift regis-ter re~ceives puls~s from the debouncing circuit 48 except ~.~hen set-ting present time.
The "OR" gate 66 has an input 66d extendi.ng to the output 70a of an "AND" gate 70 which effects the rapid feeding of shift pulses (called rapid time advance or RTA
pulses) during the re~s~nchronizing of the shi~t register 62 to be described after the completion of either a review or a manual program mode of operation of -the timer. The "AND" gate 70 thus has an input 70c extending to the out-put 7~a of an 80KEIz oscillator 74 which operates e~ceptduring "stand-by" opera-tion. The "AND" gate 70 has another input 70b coupled by a control line 40g' to an RTA enable output ~sOy of the control c;.rcuit 40 which produces a "1"
signal at the transition of the various manual program and review modes o~ operation back to the "automatic" mode of operation of the timer. The "AND" gate 70 also has an input ;~ 70d connected by a conductor 80 to -the ou-tpu-t o~ an i.nverter 78 whose input is connected to the output of an offset counter 64.
20~ The output of "OR" gate 66 also feeds the c]ock input terminal 64a of the offset coun-ter 64. The offset counter is reset to zero upon the entering of "present time", whereas the shift register 62 is reset during "program re-set" of the -timer, which it can be seen from Fig. 6A occurs when the timer is operated to :the 'Inot programmed" mode of . , ~
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a~.g -- ' opera-tion. The sh;.ft re~i.ster 62 in a sense is a pulse counter because the first "ON" marker entered into the out-put of the first stage of the shift regi.ster will assume a position in the 48 stages thereof dependiny upon the number of shift pulses fed thereto since the "ON" marker is fed thereto. It is apparent -that the difference in the count in the shift regi.ster and offset counter at the time the first "ON" marker is en-tered into the shift register will be an offset count number e~ual to the number oE half hour intervals which have occurred between "present time"
and the time the first "ON" marker is manually set into the shift register (since the shifted position o~ an ON marker f is the count of the shift reyi.ster reer.red to).
During a time in-terval when a manual programming ~ 15 is taking place and the "OR" gate 66 receives i-ts pulses ;~ ~ from the output of the debouncing circuit 4g, this ofEset wlll be mai.nta~ned, and so when the first entered "1" marker reaches the last stage of the shift register 62, -the marker ~: ~ in~the last stage of the shift register not representing 20 the desired light conditlon for present time is then shifted to a positi.on where the last stage represents the storage :` ~
location for present time. This is achieved by rapidly feeding shift pulses to the shift register 62 and to the : clock input of the offset counter 67 until the count in the offset counter reaches 48. The sensing of a l'l't marker in ~ ~: : ` ' .,.. ,, : ~ .
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., . . . , :
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S~
- so -the last S-tacJe o:E the shi~-tregister by "1" marker sensiny means 86 feeds a pu:lse to "programmed" line 86b' which operates the timer into the "automatic" mode. Whenever, the "au-tomatic" mode is entered -the RTA enable line 40g' is S energized to enable the gate 70 to feed the 80 KHz output to both the shi*-t reyister and ofEset counter to ad~ance the markers and count therein until the oEfset counter reaches its maximum count. This results in a "1" output thereof whlch disables gate 70. The shiEt register is simi-larly re-synchronized by the oEfset counter when the au-to-matic mode of operation is re-established when a review mode of operati.on is terminated..
When the "1" marker sensing means 86 senses the presence oE a "1" marker at the output terminal 62d o:E the shift regis-ter for the first time, the resul-tant "1" output of the sensing means i.s inverted by inver-ter 92 to disabl.e coritrol gate 90 which controls the feeding of ma.rker signals to the shift register. This "1" output is also fed to the : : input 69c of the control gate 69, whose input is connected 20 ~to the :shift re~ister output 62d and whose output is con-nected to the data input termi.nal 62b o:E the shiEt register, to enable the re-circulation of the markers in the shift reglster when the "automatic" mode of operation oE the timer is initiated.
It will be recalle~ that, during a manual ~:
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programming or review mode of operation where control knob 12 is not rotated to all of the clifferent possible detented positions for feeding markers into the shift register or readiny markers from the outpu-t of the shift regis-ter so that -the user does not complete a manual programminy or manual review Mode of operation, the shift register 62 will be automatically advanced to a point where the first enter-ed "1" ON rnarker is located at a storage location repre-senting present time by a re~synchronization operation as just described. ~his means for automatically advancing`
the markers in the shift reyister 62 when such manual pro-gramming or review mode of operation is no-t terminated by the user is accomplished by the circuit loyic now to be descri.bed. Thus, each time the control knob 12 is depressed or advanced one posi-ti.on, the timing circuit 73 is reset for establishing a new timing period for the various time--out periods re~erred to. If the control knob 12 is not again~ operated for a period of five minutes during manual programmlng and 40 secoDds during program review, a "1"
signal appears on the output 73c of the timing circuit 73.
: `
~; ; This line extends to the control circui.t input 40p of the oontrol circuit 40, which will then generate a "1" signal whl~ch returns the timer to the "automatic" mode of operation resulting in the generatlon of a "1" signal on the "rapid time advance enab].e" line 40g' leading to gate 70 which ~;`"` ~
3L.~ SO
opens to fced the 80 K~lz pulses to the shift regis-ter 62 and offset coun~er 64, to eEh ct the shifting of the shift regis-ter 62 by the re-synchronization operation previously explained. ' Now that the description of the simplified block diagram of Figs. 4~ and 4B have been completed, reference will now be made to Fiys. 5A, 5B and 5C, considered as a who]e, where a breakdown of the details of some of -the con-trol elements shown as single b]ocks in Figs. 4A and 4B
just described will be expanded to include more details oE the same.
Figs. 5A, 5B and 5C
The timing circuit 73 is shown in Fig. 5C. This circuit receives a 60 cycle square wave ou-tput from the Schmidt trigger aircuit constiLu-ting pulse shaping means 57.
~l~his output is coupled by a line 58 to the inpu-t 73m of -the tlming circuit 73 to synchronize -the operation of the same.
s previously indicated, the timing cixcuit 73 has a nwnber of sections thereof which produces at the various ou-tputs 73a, 73b and 73c a "1" signal at various time-out periods respectively greater than 0.8 seconds, 40 seconds, and five minutes, and a "0" signal when these sections of -the timer are reset before thls per~od is aver. The tlme-out ~eriods occur from apoint beginning with ei-ther the depression of 25~ the control knob 12 or the rotation thereof one de-ten-ted .~ : : ~ :
-: :, ~ : : .
~ ::
, llOEi9~
position. .~s timing i.nputs for -~he timing circult 73 there are provicled connections to "divider reset" and "d:ivider enable" control llnes 40a' and 40b'. Dlvider reset line 40a' extends from the input 40a of the control circuit 40 to the input 73k of the timing circuit. One case where a momentary "1" signal appears on this line is when the timer is charged from the "manual programmed enable" mode to the "manual pro-yram not initiated" mode of operation. The "divider enable"
control line 4Ob' extends between the control circuit out-put 40b and the.input 73L of timing circui~ 73. Steady "1"
signals appear on this line at the various times identifi.ed in the table of Fig. 6B.
The timi.ng circui-t includes a cascaded series o dividers 73--1, 73-3, 73-5, 73-7 and 73-11 where the outpu-t 1~ of one divider .~eeds the input of the next divider to provide : ~ a variety o diiferent -time-out periods beginning wlth the si.mu]taneous resetting of all of the same when a reset pulse appears on "divider reset" line extending from the logic : ~:
~ matrix 41 to the control circuit output 40a and then to ~: ~ , . .
2U tlming clrcuit terminal 73k, in turn, connected to the reset :: inputs 73-1~, 73-3b, .... 73-llb of these divi.der ci.rcui-ts.
::
:
~ The pulse input 73 la to the flrst divider 73-1 thereof is ; ~ :
shown connected by lines 73m and 48' to the 60 Hz square wave output of Schmidt trigge.r circuit 57. The outputs of the divider clrcuits 73-1, 73-3, 73-5 and 73-7 respecti.vely , , .
~ ~ .
.
e~tend to the inputs 73-13a, 73-15a and 73-17a of "NOR"
gate 73-13, 73-15 and 73-17. The outputs of these "NOR"
gates e~tend respec-tively to the clock .inputs 73-19a, 73-21a and 73-23a of divider ci.rcuits 73-19, 73-21 and 73-23. The outputs o:E these latter divider circuits are connected by feed-back conductors 73-25, 73-27 and 73-29, respectively, to the inputs 73-13b, 73-15 and 73-llb o~ the "NOR" gates 73-13, 73-15 and 73-17. The divider circuits 73-19, 73-21 and 73-23 have "reset" input terminals fed 10 from a comrnon reset llne 73-31 extending from the output ~.
of an "O~" gate 73-33. The lnputs 73-33a and 73-33b of the "OR" gate 73-33 respectively are connected to the lines 54 ,~
:~ and 49 respec-tively extending to the output of the "OR"
gate S2 and the output of debouncing circuit 48 so that these ~: 15 l~nes receive pulses each time the control knob 12 is either ~:~ depressed or detented one position.
The various divider circui.ts 73-19, 73-2]. and 73-23 are pulse counting circults which receive pulses at :their clock inputs which will not .result in full counts of ~the divlder oircuits if control:knob 12 is depressed or rotated in succession at tlme intervals less than the various time-out periods involved so that under these circumstances the outputs thereof will never reach a "1" state. Converse-~ ly,.the outputs o~ these divider circuits will reach a "1"
: 2S s-tate at the:timing periods involved if the pexiods between : ::
:
,: , : .
-, - , ~995~
successive depressions or rotations o~ the control knob 12 is greater -than the particular time-out peri.ods involved because ~hen the feedback circuits to -the inputs of the "NOR" gates 73 13, 73-15 and 73-17 will cause the count cycle to be terminated when the divider outputs reach the full count "1" state. The time-out circuit jusk described provides the super short time (SST), short time (ST) and medium time (MT) timi.ng periods previ.ously described and identified in appropriate columns of the table o~ Fig. 6A.
The time-out opera-tions for producing the LT play period oE 30 minutes and the regular 30 minute pu:Lses will now be descri.bed. This circuit includes an "AND" gate 73-9 having an input 73-9a connected to the output of the divider ; 73-7 and an input 73-9b connected by control lines 71' ; lS extending to the tlmer lnput 73L, in turn, connected by con-trol line ~Ob' extending to the "divider enable" control ::::` circuit output ~Ob. As shown in the table of Fig. 6~, a divider enable output of the logic matrix 41 occurs at that time shown~in the flow diagram of Figs. 2A and 2B when a '; ~:: ~
30 minute ti.me-out peri.od is desired~ When the 30 minute pulse is needed ~or timing purposes, the "AND" gate 73-9 will then be enabled by the "divider enahle" signals so that the output of the divider 73-11 will produce one pulse every 30 minutes fed to the timer circuit output 73e.
, ~ .: 25~ To produce the single 30 minute "play" period :~; pulse, the first 30 minute pulse becomes effective as it is ~:
: ` :: : :
, . :: ~ , , , ' :` ` ' ' " , ~ , ~ ' :
:, `` ~ , ' , ` ~ ` . ~ `
' ' , ' . : ' ' ~ ' r~
fed to the se-t input 73-36a of a set-reset bistable circuit 73-36 to set the same. The reset inpu-t 73-36b oE set-reset bistable 73~36 i.s connected by a line 73-38 to the output of the power on-to-off sensing circuit 55 shown in deta;.l in Fig. SC, which produces a momentary pulse when power is first applied to the timer. It is thus apparent that the set-reset bist.able ci.rcuit will produce a "1" output only after the first 30 rninute "play" period described, and will not regenerate this si.ynal until a power interrupting oper-ation takes place.
~ eference should now be made to the power ofE-to-on sensing circuit 55 in Fiy. 5C. This circuit i.ncludes a pair of .rectlfiers 55-1 and 55-2 connec-ted in series be-tween the positive ou-tput of the DC power supply 30 and the lS ungrounded termlnal of a resistor 55-3 whose other terminal is grounded. Thejuncture between the rectifier 55-2 and the resistor 55-3 is connected to the .inpu-t of an inverter .~ 55-~ whose output is connec-ted to -the "set" input o~ a .
: set-reset bistable circuit 55-5. The "reset" input of th.is blstabLe is connected by a conductor 73h' to the 2 pps. out-: . ; put 73h of the ti.ming circu.it 73.
: When the.timer condition setting control arm 15 :: : ::
is~moved from the "OFF~CLE~R" to the "ON" position, the timer is powered up for the first time. The output of the DC
:
power supply capacltor 30h will then charye up to its .
:
:
, - ~ . .. .
, 5~
ma~c;.mum voltacJe o~ ~I vol-ts. Before t:llls voltage ]-las ~eached a value where the rectifi.ers 55-1 ancl 55-2 s-tart conducting, the lnput to an inverter 55-4 will be a "0"
signal to produce a "1" state in the output thereoI~ which 5 will set the set-reset bistable 55-5 to provide a "1" sig-nal at set~reset bis-table output 55b. When the voltacJe across DC power supply capacitor 30b reaches a value where the rectifiers 55--1 and 55-2 conduct, the voltac3e drop appeariny then across the resistor 55-3 generates a "0"
10 state slynal in the output of inverter 55-4 so that the next reset pulse fed to the "xeset" input of the bistable 55-5 w.ill reseL the same. Since no :Eurther voltacJe occurs ]n the input c;;rcuit to the bistable, it remai.ns in a reset stc~te unti]. power is again d:isconnecte~l :Erom the timer sys~
15 tem.:
rl'he power--out tlmer circuit 63 which p~oduces a "standby" s.;.gna:L which de-ene.rgizes di.:Eferent par-ts oE the ;circuit dur:ing a loss o:f: power to the timer ls shown in de-~:
: tai.l in Fig. 5A. As:there shown, the circuit incl.udes a 20~ div~de by 4~096 div~der circuit 63-]. having a "r`e~set" input 63-]a connected to the output o:E a positive or ne~ati~fe edge one-sh~o-t multlvibrator 63-2 wl?ose inpu-t is connectea by : the aforementioned conduct:or: 61 to tha square wave output ~: ~: : : -: of the Schmidt trigger circUit 57. The divider circult 25~:63-1 has a clock inpu-t 63-lb connected to the output of a .:
"NOR" gate 63-3 havlng one input 63-3b colincc-Led to -the ou-l:-:: : , :
:
~: . : . `` ' ' ' ' ' : .' -', .: .
' . : : ~:::.. : : :
.
: . . .. :
::
-- 58 -- ~
pul_ of t}te 80 IC~I~ oscillator 74 and an :illpUt 63-3c con-nected to~t-11e ou-t of the divi.cler circuit 63-l so that when 4096 pu]ses from the oscillator are Eed thereto and counted ~hereby, a "l" signal appéars in the divider circuit output which is conver-ted -to a s-teady "0" signal at the "NOR" gate output which holds the clock inp~lt at ground potential, pre-venting fuxther response to pulses fed thereto.
BeEore any loss of power to the timer, the re-peated 60 Hz pulses fed to the reset input 63-la prevents the divider circuit from counting 4096. Upon loss of power to -the timer, the reset pulses disappear so the divider circuit receives 4096 pulses and locks-up with a steady signal in the output thereof. ~.rhis "1" signal produces a "stand~by" signal which is fed to the disa'~le input of ~: ~ ].5 ~the 80 K~I~ oscillator 74 to turn the same ofE and is fed to : other parts of the timer system to disable the same as pre-v;.ously descrlbed, e.~cept for the shift register 62 and : associ.ated circuits which main-tain the markers -therei.n.
Reference should now be made to the voltage chanc3e 2~0 pulse circuit 58 shown in Fig. SA, which is the cirauit which produces a positive pulse each time the 3-way swi.:tch wiper ::
~ 25C ` 15; moved~:be-tween contac-;:s 25a and 25b. It wi.ll be re-:
called~tihat the voltage appearing~on the stationary contact 25a which extends~t,o the;:.inpu-t 58a of the voltage change ~: 25 ~pu1ser~:clrcuit 58 will~ be:a 60~Hz voltage when the wip2r 25c . . - - -: ~- . . :- : . . .
~ s~3 -enc~a~es the sam~ and no vol-ta~Je whell the wiper is diconnec--t.ed ther~ om. ~'he input 58a of the circui-t is connect:ed to one end o* a series circuit comprisin~ resistors 58-1 and 58-2 whose other end is grcunded. A capacitor 58-3 is shown connected across the resistor 58-2. A 60 Hz Vol-. tage applied to the input 58a of the circuit 58 will produce a similar waveform vo].tage across the resistor 58-2 whi.ch voltage .is fed to the reset input of a divider circuit 58-5 to prevent the circuit from responding to any pulses fed thereto. The output oI the divider circuit 58-5 then remains in a "0" state. The divider circuit 58-5 has a clock input exl:end:i.ng to the Ol.ltpllt of a "NO~I' gate 58 7 having one oE
i.ts inputs 58-7a connected -to the line 61 extending to the 60 pps output o.E the Schmidt tri.gger circui.t 57. If the di~ider circuit 58-5 i.s not reset because the 3-way s~itch wipe:r 25c i.s moved to contac-t 25a, the divider circuit will : coan-t the pulses fed to the~clock input thereto, aild when a count o~ 4:is reached khe signal on -the ou-tpu-t 58-5 -thereo*
:will change:from a "0" to a "1" signal condition. T.his "1"
20~ signa~l condit.ion lS fed kack ~y a conductor 58-6 to a second :.:
input 5B-7b of the "NOJI" gate 58-7 which will then provide a~steady "0" s.ignal condition ~t the output thereo* to p.re- -vent~any ~urther count pulses *rom entering -the divider.
This charge ln a posi.tive airectlon ~rom a 1l0-l to ":l" signal ~:
: 25: condition at the ou-tput of ~he divide.r circui.t 58-5 is ... . . .
~ . ` ' . ' ~ . . ~: . - :, : . - .
converted to a s;n(,31e positive pulse by a positive edge OIIC'-ShOi multivi.brator S8-8 the iIlpUt of which is connected to tlle d:ivider circuit Oll'tpU't. The output of this positi.ve edge one-shot Multivibrator 58-8 is connected to an "OR"
5 gate 58-,10, whose output is connected through -the output 58b of th~ circuit 58 to the input 52b of the "OR" yate 52 which feeds the common line 54 which a:Lso receives the pulses, result.ing from the clepression of the control knob 12~
When the signal output condition of the divider 10 circuit i.s initially in a locked-in "l" state, it i5 switched to a "0" state by the re-appearance of a 60 Ilz i.nput from -the 3-way switch 25 wlien wiper 25c is moved to contact 25a.
This resets and change.s the "l" i.nput of tlhe divider cir-cuit back to an "0" st~te. This outpu-t change i5 COrlVerted lS to a positive pulse by a negative edye one-sho-t multivi.bra~
tor~ 58-8', whose input is connected to the divider circuit ; output. This positive output pulse of the negative ec~ge one--shot mult;vibrator' 58-8' is connected to said "OR" gate 58~10 wh~.oh feeds this posltive pulse to the line 59 through "OR" ., , '20 ~ yate 52.
Fiy. SA shows the control term.;nal 10c of -the power Lriac l0 coupled~ by conductor ~100 to the on-off control line 0t' connec'ted t:o output 40f of the control circuit 40. The output ~0t oi the control ciruoit 40 is connected to tlle Ollt-25; put;;]02a~ of a set-reset bistable 102 (I;`ig. 5B) hav;.ng a set ~ ' .
~ 61 -input 102b ex-tellding to the Olltput of a neg-~`tive edcJe one-shot multivibrator 104, and a reset i.nput terminal 102c extending to th~ output o:E an "OR" yate 106. The bistable output 102a has a "1" power triac turn-on signal when the bistable is set and a "0" power triac turn-off signal when the bistable is reset.
The "OR" yate 106 has an inpu-t 106a extend.ing to the "standhy" output of the power--out timer 63 which feeds a continuous "1" reset signal to the reset termi.nal 102c of ].0 the set-reset bistable 102 when power is out so that set-reset bistable remail~s continuously in a reset condition, which assures that the power -tri~c 10 remains non-conduc-tive.
:~ The "OR" yate 106 has another input 106b extending to -the ; . Q' output of a toggle bistable circuit 108 which is alter-15 ~nate].y operated between set and reset conditions by -the eeding of successive "1" signals to toygle bis-table input `: :
~108c. When the togyle bistable 10~ is xese-t, the Q' outpu-~
thereof will have a "1" signal;thereon and when this bistable is sel:, the Q' output thereof will have a "0" signal there-70~on, which will then permit the set reset blstable 102 to be set. The input 104b o~ negative edge one-shot multivi-brator 104 is connected to -the "zero crossing siynal" input 0g of control circuit 90. Th:is terminal is connected by ~; an input line ~0g' to the juncture of DC po~-~er supply recti-~:: :
2S fier 30a and resis-tor 30c. When the triac 10 is ini~ially non-conduc~t:ive, the voltage at the juncture of rect-fier 30 :
~:' - ~ ,:' ; ' ':
:
3~
- ~2 -and resi~-;tor 30c re].ative -to yro~ d will be the positi.ve OUtpll t o:E the power supply. In a. cycle o~ t.he app:Lied AC voltage on power line 9 when the vol-tage thereof be-yins to increase from 0 in a positive dixecti.on the voltage S on the non-conducting trlac load termi.nal lOb w:ill also increase in the same direction and -th:is positive-going vol-tage is coupled through the power supply conl:rol means 30d to charge OL- maintain the charge on the capacitor 30b and rectifier 30a will then become conductive. Conduction of rectif:i.er 30a applies ground to the f;.rst previously positive con-trol line 40g connected to the previously un-grounded side of capaci-tor 30b. This negative-c3O1ng voltage pxoduced at the beg:ininillg of a posi.tive-going ha:l.f cycle of the vol.-tage or power line 9 when triac 10 is non-conductive - L5 is fed by line 40g to the input of the negative edge one-.. shot mul.ti.v:ibrator 104 to produce a 11 signa:L at the out-put 104a thereof whi.ch sets the set-reset his-tabl.e 102.
rherea~ter the power Lriac i.s rendered conducti.ve each hal~
cycle o:F the applied AC vo.1.tage s-tart.i.ng a few degrees 0 after the applled AC vol-tage~pdsses through zero and ending : : when the:current~flow therethrough drops below a holding :
current value near zero.
The O~ gate 112 has an input 112a extending to ~ the output ~lOc of a positive edge one-shot multivi.brator llO and an input 112a extending to l:he output :llOc of a .
nec3a-ti.ve edge one-shot multiv.ibrator 110'. The one--shot multivi.brato.rs 110 ancl 110' have inpu-ts l:LOa and llOa' fed from a common i.nput line 4Om' ex~endiJIg throuyh the control circuit input 40m and conductor 67 to the output 62d o~ the shift register 62. Thus, whenever the output condition of the last stage o.~ the Sili~t register changes fr~m an "O"
to "1" signal state, the positive edge one-shot multivibra-tor w:ill produce a positive pulse, if tllis circuit lS en--abled to operate, and whenever the output condition of the last stage of the shi~t regi.ster 62 changes from a "1" to a "O" state, the negative edge one--shot ~ultivibrator 110' w;.ll produce a posi.tive pulse when this circuit is enabled to opera-le. The outputs o:~ the one-sho-t multivib.rators 110 and 110' will then appear at the output of the "OR" gate 112 to toggle the toggle bistab~e 10~ aa long as these one--shot multivi.brat.ors are enable -to operate. The one-shot multivibrator 110 and 110' have enable input termi.nals llOb and llOb' respective:l.y extellding to the outputs of "AND"
gates 111 and 111' having inputs llla and llla' connected :
by a common conduotor to the "Auto" output o~ the logic matr.;.x 41. From the -table of Fig. 6B, i-t will be noted :
that a stea~y "1" signal will appear at this ".~uto" ou-tput when the timer is operat:ed in an "automa-tic" mode oE opera--tion. The o-tller input lllb of "AND" gate 111 is connecl:ed to~the Q' output of the toggle bis-table 108 and the other :
:~ : - , ~: , . .
.
6~ -ou-tput l:llb' of l:he "~ND" ga-te 1]1' is connec-ted to the ~
output o~ tl-,e tog~]e b:istable 108. It is -thus apparent that the positive ecl~e one-sho~ muJ.tivibra-tor 110 will be enabled -tooperate when the Q output of the toggle bis-table 108 is in a "1" state, whi.ch occurs when the power triac is non-conductive. Similarly, the negative edge one-s~ot multi-vib.rator 110' is enable for operation ~hen the power triac .is conductive. With this circuit logi.c, each transition in the output o~ the shift register 62 will result in a rever-1~ sal of -the state of opera-tion of the power triac 10, except when the circu;.t had been previously overriden by the de-pressi.on of the control knob 12 which independently toggles the bistable 108 as previ.ously explained. The operatioll of che toggle bi.stable 108 overridden by the clepression of the lS control knob will automat:ically be re-established in the ; subsequent transition of -the output oE the shift register . w.`nich can be effeGtive -to change the opera-tive s-tage oF the power trlac 10.
The "OR" gate 112 has an input 112c extendiny to .
~: 20 .the~output of "AND" gate 114 havillg one input 114a extendiny ~; to~the "pushbutton" line 54' ~Ihich has a "1" signal thereon momentarlly as the control knob 12 is depressed. The other input 114b of "~" gate 114 extends to the "pushbutton en-: ~ ~ able" output of the logic ma-tri.x 41. As shown in Fig. 6B, ~ 25~ this line has a continuous "1" signal tbereon, except wllen : , ~ . .
' the ti.mer i.s i~l a "manl.lal program enable" or a "revie~l enable" mode of operation so tha-t except Eor tl1eSe modes of operatlon of the timer, each time the con-trol knob ~.2 i.s operated, it will develop a "1" si.gnal at the outpu-t oE
the "~ND" gate 11~ which is fed through the "0~" gate 112 to toggle the toggle bis-table 108 to tu.rn the triac 10 on or off.
To this end, "~ND" gates 117 and 117' have .inpu-ts 117a and 1:17a' connected to the "load li.ght bistable" out--put of the logic matrix 41 which, as can be seen erom table 6A, produces a momentary "1" sicfnal when the timer is re-turned to an "automatic" mode of operatlon. The "AND" gate 117 has i.nput 117b connected to the output of an inverter 113 whose input is connec-ted to the control circuit i.nput 40m by cont.rol line 67 to the output 62b of the shi:Et re-gister 62. The "AND" gate 117' has an input 117h' connected to -t.he con~rol c;irc;lit input 40m connec-ted by line 67 to ; the output 62b of the shift register 62. It can now be seen that the logic of the connections to the "~ND" gates 20 ~117 and 117' is such dS to produce a momentary l'l" signal upon the return of the timer to an automatic mode of opera-tion when the marker in the last stage of the shi:Et re-gister does not correspond to th~ conductive state of tlle triac or~ the proper outpu-t condition o:E the to~gle bistable 25~ 108:which enables the proper multivlbrator 110 or 110' to - : ~
.
, ., :-.
respolld to the next transit:ioIl of the shift reyister out--put fxom a "0" to "1" or from a "]" -to a "0" state.
The only other circui.t details shown in FiCJS. 5R, 5B and 5C which have not already been described are the "~D" gates 120 and 122 in ~ig. 5s which control the feed-.;.ng of the ].ED indicator conlrol signals appearing on the "pu].se" and "flash" terminals 40cl and 40c of the control circuit 40. I'hus, "AND" ga-te 120 has one input 120a connec-ted to the "pulse" terminal 40j which receives a pulse cach tlme the control knob 12 is ro-tatecl and an input 120b con-nected to the "LED pu].se" output of the logic matrix 41.
The table in Fig. 6B indicates the i.nstances when a contin- !
uous LED pulse enab].e signal .is generatecl.
The "AND" gate :L22 has an input 122a extendiny :).5 to the "LED flash" output of the logic matrix which, as shown by Table 6B produces a steady "1" signal when the Llmer~is in a "not procJrammecl" or "manua]. program enable"
mode of operation. The "AND" ga-te 122 has another input 122b exl-endlng to the 4 yps llne extending from the timer 20~circuit 73.
Fiy. 5B shows~the logic matrix ~1 clS a single block.
To~avoid a needless encumbrance of this specifica-tion and drawlngs,~Lhe~details of all of various logic circuit ele-rnents ,ormlng ouL of the matrlx are not shown. IIowever, 25~ these elements are ade~ua-tely identified by the control means ~:
, - - , .
. , : ~: -.
~: ., '.
~-oxes i.n the flor.1 di.acJram of l~'ig. 2, as we].l as J~he lo~ic ma-tri.x o~jerati.on tables of Figs. 6~ and 6B which identify all of the varl.ous input and outpu-t sicJnals to and from the logic matrix as wel1. as -the state detecting and sta-teVtran~
sition operations performed by the logic matrix.
It should be apparent -that the present invention is an excee(7.ingly unic~ue, "peop].e oriented" timer system whi.ch simpli:fies the operation of the timer, especially the programming and program review thereof.
.It should be understood that numerous modifica-tions may be made in the most preferred form of the inven-tion described without deviating from the broader aspects thereo:E .
.
~ ~ .
:: ::
::
:~
.
` , . ' ' . : ' ~. ... ' ,:
After "en-tering present time" the system permits rotation of the time dial to the first desired ON time. This se-quence of ti.me dial knob action is thus always -the same, ~:~ namely to rotate the time dial knob from an entered pre-J5~ ~sent time setting at the desired time of the beginning of :: an "ON" time peri.od and then to depress the same to first enter~an "ON" -time. Thi.s operation is repeated -to set and enter the beginning of the first "OFF" period.
Accordingly, this method of programming is easie.r, 20~ it is~believed, because it permits the user to think s~uentially oE (1) "present time", ~2) the firs-t desired ON time and (3) the firs-t desired OFF tirne, (~) the second desired~ON~time, (5:) the second desired OFF time, etco ~ un-~: ~: . :
til he~has set as many ON an.d OFF periods as desired.
25:~ ~ The time dlal knob is arranged so that :it can be . ~
~ , ~ . ~ : '' .:' ' ' ' `
-turned in one direction only, -that is, in the direction that advances the indicated time. When presen-t time is in-dicated on the time dial knob, it must first be depressed to "enter" present -time.- This action switches the shift xegister clock input from a real time pulse source to the output of a pulse switch ope.rated by movement of the dial knob to each shiEt detected positi.on thereof. There is no res-tric-tion on how much the time dial knob can be rotated after present time is entered. It can be rotated one step -to the first ON time or many complete revolutions to the first ON time. This lack o:E restriction also aids the user ~n separating the actions oE setting and en-tering "present time" from the desired fi.rst ON and OFF times.
. It wi.ll be recognized that the above method of programming as so far described will result in the shi.f-t reg;.ster having s-tage locations containing markeLs corres-ponding -to the desi.red ON or OFF condition of the controlled deviGe at the t:imes i.ndieated on the t:ime di.a.1 knob. ~Iow-:: :
ever, when a full 24 hour period has been programrned in -the 0 example program being described, the last location of the shift register will correspond wi-th the -t.ime indica-ted on the di-al knob when the firs-t ON marker was stored therein, xather than presen-t time, since it is the appearance of a :
1" marker in -the las-t storage location of -the shift re-gister tha-t signdls cornple-tion of a program c~cle with the~
programming format just described. In accordance with :
: . .:. . ,.
~ 9~5~3 anc)ther featllre of the invention, means are provided for automatically advancing the shift reyister so that i-t will be au-toma-tically advanced until the last storage location ^ corresponds to the -time indica-t~d when "presen-t time" was S entered. rrhis provicles au-tomatic synchronization of the shift registe~r locations with real time. At the same time that this is done, the shift register clock input is switched back to the synchronous real time counter output.
Thus the user is freed from any need to synchronize his pro~
gram with real time beyondthe initial entry of present time.
The stated feature that the shift register's last storaye location will contain the marker corresponding to the first ON time assumes that t.he user has completed a 24 hour proyram cycle by rotating the time dial described which encompasses only ]2 hours throuyh two complete revo-.
lutions after entering the irst "ON" marker. It is quite possible if not likely, however, that he may not have clone -this. For instance, he may have entered presellt -time at 2:00 PM, then entered a 5:30 PM ON time and 11:00 PM OFF
time. Since this may complete his desirecd program he may nec3lect to rotate the time dial further. In anticipating of this posslb~ y, in accordance with another ea-ture o the invention, m~ans are provided in the timer which, after the entry of present time and at leas-t a single ON time ~ollowed by an OFF time "wait" five or other number o~
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5~3 minutes mode of opera~ion is established to allow for fur-ther proyramming, if desired.-. ~fter this time period has lapsed, ~his means -then comple-tes the program with all sub~
sequent timing intervals OFF, and au-toma-tically synchronizes S the shift register with real -time jus-t as if the user had completed -the program by rota-tion of the time dial knob.
The problem of reviewing the program and return-ing the sh:ift register in synchronism with real ti.me also i.nvolves human engineering . The review mode of the timer should be possible at any time. In accordance witll another feature of the invention, to read ou-t the state of the storage locations of -the shif-t register i-t is necessary on]y to clock it through a comple-te program cycle wi-th the time dial knob af-ter presen-t time is set on the time dial knob and to observe the con-trolled device for an ON or OFF
condition at the times indicated on the dial. In order that the storage locati.ons be properl.y identified with :their real times it i.s necessary to set the time dial k.nob :: to the correct presen-t ti.me so that this ti.me will corres-20~ pond wlth the last storage location. Then, all the markson the time di.al knob will corresponcd with the proper storage loca-tlons in the shift register ~or the programmed : ~ markers. The review mode is-thus star-ted by an enter present time operatibn, namely by pressing the -tlme dial ~: 5 knob after setting the~s:ame to the correct present time. ~ .
9~
Thls switches ~he shi~t regi.ster cl.ock i.nput from the real time counter output to a pulser swi-tch output. The -time dial knob can then be rotated through a complete cycle to observe the sto.red program. The cycle can be repeated in-delinitely by continuing to rotate the -time dial knob. To terminate the review mode the user simply depresses the time dial knob a second time. When the time dial knob is depressed to term.inate the review mode, -the shift register is automatically clocked by exactly the number of pulses required so tha-t -the last storage location thereof will contain -the same marker that was present when the review m~de was initiated. Thus, the shift register is automati-cally resynchronized witll .real til~e. Upon -terminati.on of :~: the review mode the tlmer is placed back into the automa-tic mode and the lnd;.cator light cornes on steady. ~lowever, ; ~ to assure that the t;.mer ~`7ill not be le:Et in the review mode :.indefin:itely if the user fails to termina-te review, means is~provided which automatically termina-tes the review mode in approximately 40 seconds if no pulse is received from ~ : ~
the: pulser~switch during that period. It can be seen that the automa~ti.c resynchronization of the shift register with : : real t~ime upon the term;.nation o~ a review mode ma}ces it mposslble for the user to substantially disturb the pro-gram as a~resu1t of having reviewed the program.
With the constraint in the preferred form of the ~:
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invention p],aced upon tlle number of indicator l;.yhts (one) and controls (-two~ avaLlable to -the USeL as explained pre-viously, it became important to use the indicator lamp in a manner that would provide the most useful inEormation to ; 5 he user. (In the timer disc]osed in our application Serial No. i~L-}5~, a red light ls energized during programming and a green light is energized with the ligh-t circuit being controlled.) In accordance with another feature of the in-vention, only one indicator light is provided which has a flashing condit.ion when the timer is on and there are no prograrn mar]cers stored in memory. Since a flashing light is known to at-tract more attention than a steady li.ght, ~, this condition was selected to signal tha-t there is no pro~
.
gram stored in the timer's memory and timed operation will ` 15 not occur. This feature is partlcularly useful to call the ' : userls attention to the need to reprogram the timer after : a prolonged power failure. (Ano-theL featuLe of our :inven-~: tlon is that a power failure of less than a given time like 5 minutes will not cause loss of memory.) A s-teady-on con-dition of.the indicator light is used to indicate that the timer has been progra~nmed and is in the autornatic mode.
:
. Means:are ~rovided that permits -the timer to be in its automatic mode only if a 2~ hour program has been completely ~, stored in the memory. Thus the steady-on condition indica-tes : :
,:~ 25 both that there is a.complete program in the memvry and the .. , ~
' '~ :tlrner is in the automa-tic mode. ,The steady~on condition :
:
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enables the user to ~ulckly check his t.imer pri.or to leav-ing his dwell.ing since -that is when he is most concerned with having aUtOmat.lC operation of lighting.
It will be noted that t,he time dial knob is active in clocking the shi~t register only when the timer is being asynchronously (rapidly) pxogrammed or -the program is being reviewed~ In accordance with a specific aspect oE the in-vention, to provide the user with feedback that tel].s him the time dial knob is active, a brief pulsi.ng of the indi-cator light occurs with each step of the time dial knobrotation. Also, it is preferred -that the asynchronous (rapi.d) program mode is activated only if:
(1) the indicator l.ight had previousl,y been flashing -to indicate that the shift 15 ~ register storage loca-tions had been cleared and was read,v to accept a new program; ., (2) the time dial knob had been moved (to set present time); and (3) the time dial knob had been depressed 20 ~ ' to "enter" present time.
: The timer disclosed in our application Serial YS, ~
~No. ~74~, can be~programmed automatically by the pattern ~of operations of the depressible time con-trol knob during ::
the first 24 hours after the timer is turned or by 25 aSyll hronous manual prograrnming by using the time dial ::
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sc~
knob as descri.bed~ Thls rec~uires mealls for selecting automatica:l.ly the real time programming mode i~ the manual programmincJ mode is not selected. It should be noted that the reason for providing the real-time program mo-le is primarily because man~ persons find timer programming a clifficult task. This is true whether it is a simple mechanical -timer with a rotating clock face or a digital time piece such as an a].arm clock or wristwa.~ch To make certain any person, even a small child, could proyram the timer of this invention, -the real-time proyram mode was rnade -the easiest to use. To accomplish this, the real-time program mode is automat:ically entered when the power switch is moved from the OFF/CI.L~R position to the ON posi-tion.
Thus, to progr~m the timer the user merely turns lt on and ]5~ uses thé depressihle timer dia]. knob as a contact push-button for turni.ng on and off the light circui-t involved ~-for ~ pe~iad oE 2~ hours from the time tha-t the ].igh-t ci.rcuit is ~irst deenergized.
In accordance with an important feature of the 20~ pre.sent invent.ion, prior to the first time tile liyht cir-cuit is turned on, the indicator light will be flashing to - ~ndicate that there are no program markers in the memory and automa-tic operation is not possible. ~pon turning the ~;~ light circuit involved on for the first time the indicator : 25 iaMp will go out as in the case during the manual : !
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~ : 3 ~ ~ :
.. ' ~i . ' ' : ' : , ,.",;,, 5~
progranmm:i.rlg, si.gnifyiny the start oE a 2~ hour real-time proyram entry period. ~t the end oE the 24 hour period the proyram is comple-te and the timer is automatically placed into the automa-tic mode. Then the lndica-tor ligh-t comes steady-on to signal automatic operation is now possible and serves as a convenient signal that the 24 hour xeal -time program has been entered :into the memory.
Since -the real time program mode is so eas:ily entered, it was judged to be impor-tant to prevent the user from being "locked" into this rnode when it was not really his intention. rrhis would mos-t likely occur, for instance, riyht after the user had installed the timer. (It is anti-cipated that the timer will mos-t often be installed by the homeowner.) Immedia-tely upon ins~allation it will be -the most natural action for the user to test -the ti.me.r by de-pressing the time dial knob to see if he had normal manual control o:E the llght. The probability is hlgh that he will ~, want to enter a progr~m immediately using the time dial ~: ,knob. Therefore, in accordance wi-th another feature of -the 20~ invention, means is provided to prevent the real time pro-:
gram mode from being "locked-in" un-til the l.ight circui-t : : . is energizèd for at least one-half hour. This pxovides a :: .
half-hour "play period" during which the user may turn the . light circuit on and off withou-t yetting locked into the .
2S real time program mode. ThUS, each time the light is turned -:, , - :
- 1.9 -off in -the firs-t hal~-hour -the tlmer will revert to a "not proyrammed" mode and the indicator ligh-t will resume ~lash-ing.
It should be noted, also, that the timer reverts S to a non-programmed and light c:ircuit opening mode when power is restored following a prolonged power failure ~.i.e. greater than 5 minutes). In accordance with ano-ther feature of the invention, a power failure of less than 5 minutes will not cause loss of memory because such a loss de-eneryizes most of the timer circuits except those needed to maintain the rnemory through a voltage s-tored across a slowly dischargi.ng capacitor in the DC power supply. In ~ pr;.or ar-t timers, when tempoxary loss of power occurs and ;~ the light circuit becomes enery:i~ed again, the user is not usually aware that the pxevious timer se-ttincJs are no-t any-more operable at the time settings i.nvolved. With the pre-sent invention, the loss o:E t:he markers is indicated ~y a flashing light, indicatiny the need for reprogramming.
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Reversion to the "no-t~proyrammed" mode and automatic entry 20~ into the real--time proyram mode also of~ers the advantaye :; ~that the timer will be reprogrammed au-tornatically through norma1 household activity. Thus, a power failure ~hich occurs~when the persons who normally program the timer , ~ (or instance, the parents of small children) are away from : .
~ ~ 25 home for a prolonyed period, need not deprive the family of .
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the bene~it o:E automat;.c ligh-t operation ~ecause the person ;.n char~e of the children i.s unable to reprogram the timer.
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The above and other advantages and features of the invention will become apparent UpOII making reference to the specification to follow, the claims and the draw-ings . ,, .
esc_ipt _n of Dr~ s Fig. ~ is a perspective view of a light switchlO station in a home or -the like, which station includes a conventional dual s~itch aovering wall switch cover plate be~hind which is mounted at one side o:E -the plate a conven-tional toggle switch with its control arm protruding throug-one~vertical slot 1n the pla-te, and behind and over which ~ : :
lS~ at the other side of the plate is mounted -the tim~r of the invenLi.on wi.-tll`the several controls therefor occupving an :: ~ : :
area over and beyond the other ver-tical slot of the cover plate~(not~shown)~ through which slot the controls pass to the rear of the plate;
20~ Fi.y. 2 ls an~exploded view oE the diEferent basic parts making~up the -timer partially shown in Fig. l;
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Figs. 3~ and 3B together form a logic flow~and ;control diagram whioh indicates how the various modes of operation of~the timer are obtained in response to the tim-iny~of the operation of the various controls shown in Fig.l~
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F:i.gs. 4~ and ~B together form a ~ox diagram of the basic control elements of the timer of the present in-vention and the power circuit controlled -thereby including a lighting circuit, a three-way switch in series l:he~ewith and a power tr.iac forming part of and controlled by the other portions of the timer of the invention;
Figs. 5~, 5B and 5C together form an overall more detailed box diagram corresponding to that shown in Figs.
4A and 4B, except that some of the con-trol elemen-ts shown in simp.1.ified form in Figs. 4~ and 4B have been shown in more detail; and Figs. 6A and 6B are tables illustrating the var-ious inputs and outputs to and from the logic circuit matrix shown as a single block in FicJ. 5B, the dif:Eerent lS operating modes of the timer identified in Fig. 3A and 3B
:~ .
.and the input signals to which the matrix responds to pro-uce these operatiny modes, are the output signa:ls ~ener-~ated by the matrix for each operating mode and eachope~rating mode transition involved.
20~ ~ of the Invention . Timer Descri.ption From . User7s Standpoi_ (Fi.gs. l and 2 Referring now to ~igs. l and 2, there is shown a typlcal dual switch station wall switch cover plate l which S~ i5 mo.unted over a wall swi:tch opening normally accommodating .
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5~
- ~2 -two -toggle swi-tches. As illustrated, -the cover plate l has on one side thereof a vertical toggle arm--rece:iving slot 5 through which projects the usual toggle switch arm 6 ~or operating a switch unit mounted behind the p]ate upon a S metal strap tnot shown), as is conventional. The toggle switch arm 6 controls a light c;rcuit differen-t from that controlled by the timer to be described. The timer of the present ;nvention illus-tra-ted generally by reference numeral 7, has portlons bo-th mounted upon and behind the cover plate l. The cover plate is anchored in place in a conventional way by a pair of anchoring screws 3a-3a above and below the plate slot 5. The timer has a front housiny sub-assembly 7A with a control pane] 8 upon which various manually operable controls are accessible. Anchoritlg screw 3a' anchors -the timer front housing sub-assembly 7A and the cover plate 1 to a metal strap 10 (Figure 2). ~nother screw 3a", accessible when one of -the controls ;s pulled from the control panel ~ and passing through -the other ver-ticàl cover plate slot 5', also helps to anchor the cover , ~ . .
plate l and the front housing sub-assembly 7A of the timer.
The screws 3a' and 3a" thread into threaded holes 11 and 11' in the Eron-t wall of a timer rear housing sub-assembly 7R (Fig. 2).
; One oE the timer controls re~erred to is a :: :
~ 25 ro~tatable and depressible time dial knob 1~ (sometimes re-: ~ :
-~ ferred to also as a time interval setting means). This ~ ~ .
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s~
kno,.b is supported so it has 24 discrete positions and each discrete pos:.ition thereof brings a new half-hour ti.me set-ting opposite an index mark 13 Oll the panel 8. The knob 12 is press-fitted over a depressible shaf-t 12b projecting from the rear housing sub-assembly 7B and passing through cover plate slot 5'. Also, the shaft 12b or knob 12 is rotatable in only a clockwise direction. The knob 12 has on the side thereof hour .indicating indicia and mar];ers 12a, there being lZ such markers representing 12 hours of the day, and half hour~i.ndicat;.ng markers 12a' mid-way between the hour indicati.ng markers. The markers 12a and 12a' are i.ndividually positi.onable oppos.ite the index mark 13 on the pan~l 8 t:o identify the begi.nni.ng o:E the various halE-hour : time intervals during which the light ci.rcuit con-trolled by the timer i.s to be energized or de-enercJized in accord-.
~ ance w:ith a light control program established by the ti.mer.
;::
When the knob 12 is rotated through a first 12 houx period, an:"~M'' or "PM" marker 14' previously visible in an opening .
: 14 in the control panel g will change to the other of same, 20 ~so that the paIticular "AM" or "PM" hour of the day is ind.i-cated~ ~The rotatable tlme dial knob 12 is also a depressible member so~as to act as a power on-off switch control and as :~ ~ a turn-on and turn-of~ marker signal generating control ~ during the lnitial programming of the timer. After the knob ; 25 12 is initially.rotated to a present time setting and de~
` pressed once to "enter" present time, each subsequellt .
~1 6i~ r~
- 2~ -depression will generallly alternately energize and de-enerylze the ligllt;ng circuit involved and, during initial pro~rammincJ of the timer, will set or re-tain a turn-on or turn-off marker in the timer memory.
There is also exposed on the front of the panel 8 a timer cond;.tion settlng arm 15 which is movable between two stable extreme positions within a horizontal slot 16 in the panel 8. The arm 15 extends from a shiftable plate 15a in the front housing sub-assembly 7A which has a slot lSb receiving a switch actuatincJ arm l5c projecting forward-: ly from the rear housing sub-assembly 7B. The extreme left-hand positi.on o:E arm 15 is in "OFI~/CI,EAR" position where the timer i.s turned o~f and the pc>wer circuit involved is completely interrupted by an air gap. When the arm 15 is in its extreme right-hand position, -the timer is in an "ON"
posi.-ti.on to be programmecl i.n the m~nner to be described and, after completion o~ programming, unless the knob is depLessed :~ in a special manner to be described, the light circuit in-volved is energized by the markers stored in the timer ~ 20 memory, unless such automatic control is overridden by de-;~ pression of the knob 12 ~/hich will reverse the condition of the light circuit involved.
. When the -timer of the preferred exemplary form of the invention being described is initially installed, as just indicated, -the user will Eirst move the timer condition ~:
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set-tiny arm 15 to the "OFF/CLr`~R" position. If this arm is posi-tioned thusly ror at least S seconds and then moved to the far right-hand "ON" position, this will initiate a re-setting operation of all of the circui-ts that need to be xeset, and ini.tiates a basic "play" period, which is assumed to be 30 minutes (but could be a much shorter period like 20 minutes or so). A LED indicator 17a (shown in ~ig. 3A), vi.sible through a lens 17 aligned therewith through an emp-ty screw-receiving opening 17' in the plate 1, will preferably flash at -this point in the operation of the timer to indi-cate a "not programmed" mode of operation of the timer.
When starting this "play" period, the LED indicator goes : off and any depressi.on of the knob 12 which is not combined . w.ith a previous rotat-ion thereof will have to ef:Eect on the . lS programming of the unit, but will only be effective in rendering conductlve or non-conductive a power triac 10 : (Fig. 4A) controlled by -the timer. If the depression o the : :
~:
knob 12 turns the ligh-t circuit on and the light remains on for the duration of -the "play" period, the previously men-20~ tloned real time-programming of the timer takes place. If : : .
~ the knob 12 is depressed to turn the liyht circuit off be- . .
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fore the play period is over, the timer returns to its "non-programmed" mode of operatio~. Then, when the knob 12 is ~rotated to a given detented time setting position referred ~; 25 to~as~a présent ~ime setting, and the knob is depressed to -:
: "enter" present time, this initiates manual prog.ram modes ~ ~ .. ' :
.
of operation to be described, where the s-torage locations in the timer rnemory are accessed manually as the knob is ad-vanced each one-halE hour position. Upon entry of a manual program mode of operation, the LED indicator light goes off, except that the LE~ lndicator will pulse once as the knob 12 is advanced each detented posltion thereof The manual programming of the -timer is effected by the user rotating the knob 12 to all of the various hour o:E half hour time setting positions beyond the firs-t turn-on period and depressing the knob 12 once at each timesetting where a change in the light condition is desired a-t the time setting involved. The first depression of the knob 12 after present time is entered wi]l turn the light circuit involved on. ~t tha-t point in time and as the knob is fur-ther advanced to each subse~uen-t one-halt hour se-t-ting, and ON "1" mar]cer is entered into a storage location of the timer memory assigned to the time intexval involved.
When the light circuit is turned OFF by the depression oE the knob 12, an OFP "0" marker is entered into the appropriate storage Location of the timer memory. Each subsequent one ; half hour advancement of the knob will continue to enter "0" marker :in the corresponding storage locations until the knob is once again depressed. ~f the user rotates the-knob 12 two full revolutions throughout all of -the 24 hour posi-, ~ . :
tions from the point he has depressed the knob 12 to energize .
; the llyhting circuit for the first time and he has depressed '~ ' , , : ,' -5~3 the knob once again to rurn -the circuit off, or he has carried out additional pairs of successive knob depressions so that he ends up with the circuit off, then all the proper programmi.ny markers will have been entered into memory and an automatic programming mode of operation will come into being, and the LED indicator comes steady-on.
If the user within a medium time (MT) selected as 5 minutes after each advancement or depression of the knob 12 from the t.ime he "entered" present time depressed the knob 12 only once so as not to complete the identification of one ON -time interval, the -timer returns to a "not-pro-grammed" condition. If he has depressed the knob 12 twice to identify one ON time interval, bu-t does not rotate knob 12 to all the ~8 half-hour settings from the first ON markex : 15 setting, the manual programming mode of opera-tion wi.ll . automatically be completed by the automatic entry o:E "0"
markers in the remaining unaccessed storage locati.ons, so .
~ that the timer becomes fully programmed and is in an automa-`: :
: tic operating mode.
; 20~ : It sho~lld be recalled that when the timer condi-:
tion setting arm 15 is moved from the "OFF/CLEAR" position to a "TIMER-ON" position for the first time, and the 30 minute play perlod ex~ires, if the knob 12 is not subse-.
quently rotated within a 2~ hour period, the storac3e :
locati..ons of memory are synchronously accessed in real time ::
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to provide automatic rea.1. time proyramminc3 of the timer where each depression of the knob 12 to turn the l.l~ht circuit involved in the normal manner on or off will enter or retain an ON "l" or OFE "0" marker in the timer memory.
After completion of a real time 24 hour pro~ramrning of the timer, the timer is in an au-tomatic operatinc3 mode where the light circuit involved is controlled automatically in accordance with the markers in memory, even if the opera-tor does not do anything else to the timer. This real time programming permits anyone to pro~ram the timer with no effort heyond turni.ng the timer to ON.
If the user desires to disable the automatic operation of the timer without los;.nc3 the markers in memory, he depresses the knob 12 1n a disti.nc-tive mannex, ].ike two fast depressions thereof less than .8 seconds apart (or once for a prolonged peri.od). ~hen si.ngle short depressions O e the knob 12 will turn the l.i~ht circuit on and off in a . normal manner. ~'he automatic mode of operation of the ~: ~ tlmer is: re~established by a~ain operating the knob in the ~ 20 distlnctive manner referred to.
; One important feature of the present invention is ;~ the ab~ility of the timer to ho1d i.ts memory even if there should be a loss of power for not more than about 5 minutes.
~: ~ If there:is a loss of power Eor less than about 5 minutes, 25~ a DC power supply capacitor will hold a sufficient charge ~ ~ ~ . , ., ,. ' 5~
to be able -to ~nergi7.e the memory maintaining portion of the timer, and circuit disabli.n~ means are brough-t into p]ay when power is los-t to disconnect the DC power supply from the portions of the timer not needed to maintain memory.
If power is interrupted for more than about S minutes, memory is lost and this will be i.ndicated by the flashing of the LED indicator which shows. that the timer has returned to a "not-programmed" mode of operation.
Operation of Timer Explained From I,o~_ _low and Control Dlagram of F.i~ 3A and 3B
:, The various modes of operation oE the timer in the preferred form of the i.nvention are illustrated in Figs. 3 and 3B which, for the mos-t part, is self explanatory. The nomenclature and abbreviations of the different modes of ].5 operation needed to bes-t understand the logic circuit ma-trix tabl~e of Figs~ 6P~ and 6B are shown in Fi~s. 3A and 3B. As there shown, when the timer condition settin~ arm 15 i9 first moved to the l'oN" position from the "OFF/CI.EAR" posi-. :
tion under circumstances where memory has been lost or had ~not been establi.shed, the timer is in what is referred to : :: ; as~a "power up" (PU) mode of operation identified in block A representi.ng -the control means which effects this control.
Control B then causes the time.r to enter the "not-pro-grarnmed"~tNP) mode of operation previously described where ~: 25 -the~LED indicator 17a 1ashes. For the next 30 minutes, ..:: .
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as long as t.he knoh 12 is not rotated in a cloc]cwise direc--tion, (coun-terclockwise ro-tation thereof causes slipping of the knob and no de-tented rota-tion of the knob shaft) a "pla~" period takes p].ace where the knob 12 may be depressed successively to turn the light circuit on and off a-t ~7ill .
The firs-t time the knob 12 is depressed under -these condi-tions, control means M causes the timer -to enter a "learn enable" (I.E) mode o:E operation where the LED indicator turns o:Ef. At the end of the "play" period, or a-t any time during the "play" period when the last depression of the knob 12 turns the light circuit off, control means B causes the timer to return to the NP mode of operation. After this 30 m:il~ute p.~ay period, beclinning with the tirne that the control knob 12 is thereaf-ter first depressed to turn the lS ligh-t ci.rcuit on, con-trol means N causes the timer to en-ter the "learn" (LPN) mode of opera-tion when the L~D indicator is o:Ef. As the control knob 12 is depresscd -th.roughout: the following 24 hour period from the ti.me the push hutton 12 :.
: was first depressed after the 30 minute play period is over, : 20 liyht turn-on and turn-of markers are set in the storage :
locaLions of a memory identified wi.t.h the particular tim-; ing interval involved. During this period the d:ifferent .
storage loca-tions o memory assigned to the various time intervals are accessed synchronously. ~t the end of this 24 hour period, ~ontrol means J causes the timer automa-tically ~.~
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:~3l6~9,~S~
to enter an "aui,omatic" (~'rO) mode of operation where the LED indicator comes steady-on. ~t any time duriny -this ~UTO mode of operation, as previously indicated, if the con-trol knob 12 should be depressed once, this will temporar .ily override the automatic control over -the light circuit at that particular time, and reverse the condition of the li.ghts involved. If the knob 12 is depressed again, the condition of the lights will return to the same condition for which the au-tomati.c control thereof ~lould become re-establis}led. (Permanent override of the automatic controli5 onl~ achievecl by the aforesaid distinctive depression of the knob 12. This is achieved by contro]. means P shown n Fi~. 3A.) If it ~s desired -to dete.rrnine the actual pattern ;~ 15 of -turn-on and turn~off markers which are sl,ored in the storaye locati.ons of the memory, the timer can be operated in ~vhat is referred to as "revie~ enable" ~Rr~) and "revi.e~"
(REV) modes of operation shown in the con-trol means-indica~
. ting boxes K and L in Figs. 3A ~nd 3B where the synchronous 2:0 accessing of the memory storage loca-tions is texminated.
;; Tha RB mode of operation is entered by control : means K when the user first advances the control knob 12 to bring the hour or half hour marker 12a or 12' opposite the . index mark 13 which iclentifies present time. The LED indi-:
~ 25 cator is-then steady~on. When the user then depresses knob .
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~.~,6~g~
12 he~ "enters" presellt time, and control means L causes -the timer to en~er the RF.~' mode of operat-ion. Then, as the control knob 12 is advanced in a clockwise direction to each detented one half hour -time posi.tion to bring the var~
ious markers 12a and 12a' opposite the index mark 13, a stoxage location accessing pulse is generated and the marker stored ;.n each accessed locati.on for the time interval i.nvolved is i.dentified by the actual state of the light circuit for the time interval involved. To re-enter the AIJTO mode of operation from the REV mode of operation, it is only necessar~ to depress the control knob 12 once. .
Also, if the user forgets to depxess the control knob 12 to en-ter the automatic mode of operation beyond a basic timing period, which was selected as a short timing (ST) 15~ period referred to as 40 seconds, then AUTO control means J .
:causes -the timer to return to the said Au~.ro mode of opera-: tion from either the REV or RE modes o operati.on. ~s ~:~ previously e~plained, the manual program modes of operation :: :
of the timer are entered from the 'Inot-programmed" (NP) 20 :mode by first rotating the control knob 12 clockwise at least one posit1on where a control means C causes the timer to ~: :
enter what is refe~red to as a "manual program enabled"
: (MPE) mode of operation, where -the LED indicator continues ~` : to flash. The control knob 12 is rotated in a clockwise direction to bring the marker 12a or 12a' representing : .
. - :~ . , . ' :```
present time oppos:i-te the index mark 13, after which the user depresses tl1e control knob 12 once to enter present tlme. Then, control means D causes -the timer to enter what is r~ferred to as a "manual program not initiated" (MPNI) mode of operation. (The LED indicator pulses once as the control knob 12 is moved to each detented positlon thereof.) -After such a present time setting and enteriny operation, as previously indicated the next depression of the control knob 12 ~lil]. be effective in first turning on the light circuit involved and enteriny a turn-on marker into the storage location which is accessed, as determined by the number of pulses which are generated by the control knob 12 '~
since the present time settlng.
The first ligh-t circui-t turn-on depression of the knob 12 after the knob is advanced -to a time setting i.denti-fying the beglnning oE an ON time interval causes control : means E to oper,lte the timer in a "Manual program initia-ted"
MPI) mode of operation. As the control knob is furthex advanced clockw1se ater the first on-time set-ting, ON
~: , 20~:~markers are entered into the various storage locations of . the timer memory as each detented posi.tion of the control :: : ~ : :
knob generates a pulse to access a new storage location, and~a control means F causes the timer to enter a "manual program not-validated (MPNV) mode of opera-tion. The control ;~. ; 25 :knob 12 is advanced by the user to the time set-ting .
:
: ~: ~: ~ - . , ~- .
.: ' , : ~
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95~
- 3~ -ident;.fying the encl of an ON time interval, which .is the beginni.ncJ of a desired OFF time inte val. If, by mistake, the user should rotate the control knob quickly beyond the . various possible marker setting positions thereof before he depre.sses the control knob 12 to enter a first OFF marker, control means D will respond to -this mistake by re-turn-ing the mode of operation of the timer to the "manual pro-c3ram not initiated" mode of operation~ Ho~ever, if the user correctly depresses the control knob 12 to turn the light circuit off and to insert an OFF marker into the timer memory starting at the previous time setting of the control knob involved, then control means G operates the ,~
-timer in a "manual program transition" (MPT) mode o opera~
tion. If the user depresses the control knob 12 ac3ain lS w~thout rotating the knob, in effect to cancel the "OFF"
marker Which he has just set, control means F will then return the timer to the "manual. procJram not vali.dated" mode of~operation. However, ~f he rotates the knob 12 for fur-t~her entry of a lrst OFF marker/ then control means ~1 op--20 ~:erates the:time.r in a "manual program validated" (~PV)mode of operation where the timer will be automatically or~manual~ly operated into a completed program or "auto-mati~o": (AUTO) mode of opera-tion in the manner to be des-: ~ :
cr:i~bed.
~ ~When the timer lS in the "manual program validatedU
mode of opera-tlon, the user can enter other ON and OFF
markers at deslrable time set-tings by depresslng the con-trol knob 12 to -turn the lighting circuit ON, followed by rotation of the control knob 12 of the time settlngs for which an ON time interval is desired, and similarly can depress the control knob 12 -to en-ter OFF markers in the storaye locations identified by -the rotation o:E the control knob 12, to complete a desired pattern of O~ and OE'F time inter~als for the lightiny circuit involved. When the control knob 12 is manually rotated -to a time setting which completes marker entries in all of the storage locations, a control means I wlll operate the timer in a "pre-auto"
(PE) mode of operation. ~fter a short period of -time yreater than about one second, as or exarnple, a period r; greater than 0.8 seconds, the control means J will opera-te the timer in the "autornatic" mode of operation. If the "pre-auto" mode of operation is enlered by the use-c advan-ciny the control knob 12 quickly up throuyh and beyond the point where~the 1st ON marker is added to the last storage 20 ~1Ocatlon o~ the tlmer memory, the automatic control means J will not respond to the extra control pulse generated hy the~advancement of the control knob 12 beyond the point where the last marker is en-tered in the last available storaye ~location of memory~. If the -timer had then been ln .
~ 25~ an "automatic" mode of operation, then the control means ~
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:
would have xe~ponded to -this exl-ra pulse by shif-ti.ng the timer into a "review enable" mode of operation previously descrlbed, an obviously undesirable mode of operation ~hen the control knob .is spun cluickly to complete a manual pro-gramming operation..
Some o the control means shown in Fig. 3A and 3B respond automatically to.the passage of various time intervals, to shift the mode of operatlon of the -timer from one mode to another. ~hus, when the timer is in the MPNV, MPI or MPNI modes of operation, and the timer has not been advanced t:o the "manual program transition" mode of ; operation referred to with;n a medium time (MT) lnterval selected to be five mi.nu-tes since the knob 12 was last ro-tated or depressed, control means B will cause the timer to return:to the "not programmecl" mode of operation. A.l.so, :
: when the timer is in e;.ther the "manual program -transit:ion~' or::the "manual proc~ram validated" mode of operation, and .
~ nothing is done by the user to advance the timer to the :
"automatic" or "pre-auto" mode.s of opera-ti.on of the timer, : 20;~ within the five minute t:~me interval described (i.e. since the last:rotation or~depression of the control knob 12~
then control means~ will au~omatically shift the tim~r into the "automatic" mode of operation by entering or re- ~
taining OFF ma~kers in the remaining unaccessed storage --locations of the timer memory~ Also, when the~ timer is in the "manual proyram enable" mode of operation entered by the .
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~, .
~9~0 set-tiny o:~ knob 12 to present -time, if the knob 12 is not depressed to "enter" presen-l: -time within ~0 seconds, con-trol means B returns the timer to the "no-t-prograrnmed" mode of operation.
Description of Simplified Block and C.irGuit Diagram of Fic~s. 4A and ~B
... .
As shown in Fig. 4A, the circuit controlled by the -timer shown is a lighting circuit energized :Erom a pair of ll0 volt, 60 cycle power lines 9-9'. The timer also derives its energi~ing power ~rom these power lines 9-9' but indirectly therefrom in a manner to be described. The power line 9 is shown exl:ending to a pair of spaced stationary contacts 23a-23b which can be bxi.dged by a wiper 23c whose position is determined by tlle movement o~ the timer condi-~: l5 tion setting arm 15. The contacts 23a-23b are bridged by the~wiper 23c when -the arm 15 is moved to the right~hand "ON" posltion. A conductor 24 extends ~xom -th.e stat:iollaxy :~ :
: :~ contact 23b to one of the load terminals l0a of the power ~ : triac I0 whose other load terminal l0b is connected by a :
20 ~conductor 9" to a 3-way switch 25. I~7hile -the present inven-tion:is operable without the presence o~ such a 3-way :swi~ch, it is extremely useful i:E the presen-t invention can be incorporated lnto any~wall switch station position which may already be wired ,in series with a 3-way switch. The : ~: ~ : :
~ :25 loc~ic of the presen-t inve~tion is designed to accommodate : . :
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5~
hoth pro~ra~ing and ligllt turn-on ancl turn-off operations through operation o~ either the 3 way switch or the control knob 12. (The 3-way swi-tch controlled aspect of the inven-:ion is a sole invention of I,ouis Schornack.) The 3-way 5 switch 25 has a wiper 25c movable between a stationary con-tact 25a and 25b. A jumper 25d is shown interconnec-ting the stationary contact 25b with the wiper 25c. A conductor 26 extends between the wiper 25c and one or more lighting devices on lamps connected in parallel, iden-tified as lighting means 11 in Fig. 4A. The stationary con-tact 25a is connected to a pulse generating circuit to be later des-cribed which generates a pulse each time the wiper 25c is moved between the contacts 25a and 25b.
The ~C volta~e utilized to energize the various circuits to be described is obtaincd from a DC power supply 30 whlch must ob-tain its energization from across the load terrninals lOa and lOb of the power triac 10, since there is only one direct connection to a power line available in any wall switch opening in which the present invention is desir-20 ~ably mounted. (It should be understood, however, tha-t the ---;
present invention is also applicable to timer applications .
~:: :: :
~which are table mounted or mounted in some other location ~;~ than a wall switch box, in which case accesss -to both power lines 9 and 9' would normally be available.) 25The po~er trlac 10 is controlled in a well known -~ manner wherein a control terminal lOc thereof is connected : ~ , : .
' ~ :
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to a source of current which can render the power triac 10 conduc-tive generally at a pOillt within several degrees after the ~.,ime the applied AC voltage passes through zero each half cycle involved. However, this short period dur-ing which the power triac 10 is non-conductive is suffi- .
cient to provide a voltage drop across the terminals of the power -triac -to energize the DC power supply which charyes a capacitor 30b through one or more rectifiers like 30a shown i.n Fig. 4A. (There are a number of such prior art DC power supplies which can be used.) As shown - in Fi.g. ~A, a conductor 32 connected to the triac load ter-minal lOa extends to the junc-ture of rectiEi.er 30a and a terminal of a resistor 30c whose o-ther terminal is connec-~ ted to one of the plate terminals of capacitor 30b whose : lS other plate terminal is grounded. The anode of rectifier 30a is shown connected to ground. The ungrounded plate of ~ ~ capaci.tor 30b is shown connected through a suitable control circuit 30d to the other load terminal 10b of the power triac 10. Suffice it to say, the DC power supply develops .
~ 20~ across the capacitor 30 a charge sufficient to enexgi.ze all :
: the circuits referred to, and to energize at least the memory portions of the circuit to be described for at least : ~ :
. : about 5 minutes should power be completely interrupted for :~ :
such a period. Th.is is useful in accordance with one of the aspects of the .inven-tion where, upon a less than 5 ~' minute time power failure, the progran~ing of the timer is :: ~ ' `
,:
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~9~
- ~o -not lost because of ~he selected ellergization of only the memory retaininc3 circuits. A V-~- DC voltacJe output termi-nal 32 is shown connec-ted ~o the ungroun~l 3 plate of the capaci.tor 30b. (For a very useful DC power supply ener-gized in the manner described, reerence can be made to d os~ ~rl/ed~y ~i~g U~S.~ ~c~ ~ri~r~ No./~ e~ d~2~, 19~
When the t.imer condition setting control arm 15 is on "OFF/CLEAR", the wiper 23c bridges a pair o:E ccn-tacts 23a' and 23b'~ The contact 23a' is shown connectedto the con-tact 23b previously described and the contact 23b' i.s shown grounded. It .is apparent, there~ore, that when .
the wiper 23c bridges tile contacts 23a' and 23b', the resis-tor 30c is connected dlrectly across the capacitor 30b to ~orm an air gap interruption of the power circuit requ.ired for UI. approval oE the timer and to discharge the capaci-tor 30b to de-energi~e the enti.re timer sys-tem.
As previously indlcated, as the con-troL knob 12 . is advanced each detented posit.ion, a storage location ac-,, 20' cessing pulse is generated, and as the control knob 12 is depressed, a slgnal is generated to set a turn-on or turn-: off marker in an appropriate storage locat.ion of a memory which, in the most pre~erred ~orm of the invention, is a shift register to be. described which has 48 stages in the case where we have 48 one half hour marker accepting time ~ , .
:: :: .. , . . : :
..
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,.
5~
intexvals wlthin a 24 hour period. While these pulses and signals can be generated in a variety of ways, in Fig. 4A
the control knob 12 is shown connected to a shaft 42 carryiny a ratchet 44 along tlle periphery of which slides a sprlng ~5. The spring 45 acts as a detenting spriny so that the control knob has the 24 discrete positions with-in one clockwise revolution thereof, and in the pre~erred form of the invention also acts as a control arm for.caus-ing a pulse generator 46 to generate a pulse each time the detent spring 45 slips off the highest portion of a detent tooth and falls within the bottom of the recess between successive teeth.. (It will be recalled that the contro].
knob 12 on the sha.Et is rotatable in only a clockwise direction so that the shaft 42 can only be rotated in a clockwise direction~) This pulse generator 46 may prefer-ably comprise a pie~.oe~ectric elemen-t which is unstressed sllddenly as the detent sprlng falls of:E the end of a ratchet tooth, to generate an initially large amplitude : gradually decaying amplitude sinusoidal-like waveform which lS; converted to a single pulse by any sui-table "debouncing"
circuit 4B known in the art. Such a pulse generating cir-cuit is desirable because it cannot generate a Ealse pulse of any signifi.cant amplitude~by vibrations or teasing the : knob, as is readily possibIe with pulses Eormed by making - . .
~ 25 or breaking contacts. The output 48b oE the debouncing : ~ . :, :
:-- . ~.:
9~
circuit 48 is coupled by a control line 49 to the "pulse"
input 40j of a control circuit 40, and the input 73j of timing means 73 (Fig. 4B) and also by a control line 49i (Fig. 4Aj of the input 51b of an "~ND" gate 51 which con-trols the asynchronous accessing of the storage locations of the timer memory, namely the shift register 62 in Fig.
4A. Control circuit 40 may comprise logic circuit elements as well as a logic matrix controller 41 (Fig. SB~, the operation of which is illustrated by the charts shown in Figs. 6A and 6B and by the flow diagram of Figs. 3A and 3B.
The end of the shaft 42 bears against an outward-ly spring-urged movable contact 50c~ ,When the control knob 12 is depressed, the movable contact 50c bridges a , pair of stationary contacts 50a and 50b to couple the out-~ put of the DC power supply to a conductor 53 extending to the input 52a of an "OR" gate 52, whose other input 52b is connected by conductor 60 to khe output 58b of a voltage change pulse~ circuit 58 shown.in detail in Fig. 5A to be described. The voltage change pulser circuit 58 has an input 58a connected by a conductor 56 to the stationary contact 25a of the 3-way switch 25. As previously indica-ted, as the wiper 25c of the 3-way switch is moved between '.
engagement with the'stationary contacts 25b and 25a, the : voltage conditions at the stationary contac-t 25a will shift between a condition where it recelves a 60 cycle voltage to a condition where it receives no voltage. The voltage -.:
.
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s~
- ~3 -chancJe pulser c:ircuit 58 is one wherein, upon each change of condition of the inpu-t vol-tage, it will generate a positive pulse a-t -the outpu-t terminal 58b fed -to "OR"
gate 52, thereby duplicatiny the signal conditions pro-duced by the successive depression of the con-trol knob 12.
Accordingly, as the control knob 12 is depressed or w.iper 25c of the 3-way switch 25 i5 moved from one contact posi-tion -to another, a positive pulse ~ill appear at the output of the "OR" gate 52 which is connected by a conductor 54 to the con-tro:L circui-t 40 to effect ON and OFF marker setting and power triac turn-on and turn-off operations.
I-t is apparen-t from our previous description of the basic modes oiC operation of the logi.c flow and cont:rol circuit diagram of Figs. 3A ancl 3B that -there is provided a means for generatincJ a signal, such as a momentary pulse, when the power is initi.all.y applied to the timer. To this end, an init;,al power-oE:r~-to-on s~nsing circui,t 55 (Fig.
4B) is provided (whi.ch is shown in more detail in Fig. SC) which has an input 55a connected to -the ~C ou-tput of the V~ terminaI of the DC power supply 30. ~s the capacitor 30b of the DC power supply charges up to its normal maxi.mum voltage (of about ~4 vol.ts), a single pulse appears at the power-up reset output 55b of the sensing circuit 55, which ; pulse is coupled by a conductor 57 to powex-up reset inpu-t ~ 25 40k of control circuit 40. This pulse initiates the : - ~ .
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9~S6~
"power-up" mode of operation of the timer.
~ s previously indica-ted, means axe provided for disabling the higher current-draininy portions of the timer when power on ~C lines 9-9' disappears. This means is a power-ou-t timer circuit 63 (l~ig. 4A) whieh has a disable input 63a connected by a conductor 61 -to the output 57b of pulse shaping means 57 whose input 57a is connected to load terminal lOb of the power triac. The 60 cysle ~C voltage always present on this terminal when power is on will be converted to a 60 eycle sc~uare wave si~nal by pulse shapiny means 57. When power goes out, the power-out timer 63 becomes operative to produce a "1" stand-by sig-nal at its output 63b for the five minutes or so cluring whieh the eharge on capacitor 30b of the DC power sup~ly remains at an operating level. Th;s signal is connected by a conduc-tor G7 to the "disable" inpu-t 74B of an oscil-ld-tor 74, and to input 40w of the control circuit 40 Fig. 4B)~ which, among o-ther -things, renders the power : .
triae eontrol c:ircuit to be described inoperative. These 20 ~ reLatively large power drawing circui-ts are de-ener~ized by this stand-by signal during a 5 minute power s-tand-by mode of opera-tion of the timer where the markers are re-tain~ed in memory.
It will be recalled that the eontrol circuit 40 ~; 25 funotions in response to the relative spacing between var-IOUS signals generated by the eontrols of the timer. For .
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~ 5 _ example, the mode of opera-tion of the -timer changes to a timer-off mode if the control knob 12 is successively de-pressed in a time less than 0.8 seconds. Similarly, certain operating modes are automatically changed when "automatic" mode or the "manual program transition" mode is not reached within 5 minutes. To this end, Fig. 4A
shows the conductor 5~ extending from the ou-tput of "OR"
yate 52 to input 73i of a timing circuit 73 (Fig. 4B).
Also, the conductor 49 e~tending from the output o~ the debouncing circuit 48 connects to input 73j of the timing circuit 73. This timing circuit is also the source o~
var:ious timing pulses, such as a 30 minute pulse which occurs every 30 minutes. This 30 minute pulse appears at an output 73e of -the tirning circuit 73. The timing circui-t 73 also is shown having SST, ST, MT and LT output terminals 73a, 73b, 73c and 73d at which respectively a "0" signal is present when the tlming measurement involved is below the time indicated on the lines e~tending from these outpu-t terminals and a "1" signal is present when the -timing meas-:
urement involved is greater than the time indicated. The manner in which these timing signals operate is shown by Fiy. 6A and was descrlbed previously in connection with Figs. 3A and 3B.
In Fiy. 4B, the LED indicator 17a is shown con-25 ~nect~d between ground and the output 84a of an"AND" gate 8 - . . : .
;' ' :'. ' '' ~
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having an :inpu-t 84c coupled to the output of an inverter 83 whose input is conn~cted by l;.ne 61 to the "stand~by"
output 63b of the power-out timer 63 so that "AND" yate 84 is closed during "stand-by" operation. (I-t will be 5 assumed that all i'ANr)"gates operate on the principle that all inputs must have a "1" state signal for there to be a "1" operating output state signal.) The "AND" gate 84 has anothér inpu-t 84b ex-tending I:o the output 81d o:E an "OR"
gate 81 having inpu-ts 81a, 81b and 81c respec:-tively ex-10 tendiny to "flash", "pulse" and "steady-on" outpul:s 40c, 40d and 40e o.1~ the control circuit 40. The signal appearing at the various inpu-t -terminals 81a, 81b and 81c of "AND"
gate 84 ~i.ll respec-tivcly be signals which will produce flashing, pulsing, or a steady-on condition of the LED indi-15 cator 17a except duriny "stand-by" opera-tion.
Fig. 4A shows the shif-t regis::er 62 as a 48 stage shi:E-t regi.s-ter having shi.ft pulse, data input, and reset input terminal 62a, 62b and 62c, respectively. Also, the shift register has a Q48 output terminal 62d (which repre-.
20 sents an output oE the las-t 4~th stage of the shift register).
The ~output terminal 62d of the shift register 62 is connec-ed by d cond~uctor 67' to the input 69a of a control ~ate 69 having an output 69b coup].ed by a conductor 71 to the shi:ft xegister data input terminal 62b so that the informa-2S tion ultimately stored in the shif-t register can be re-c; r-: - .
culated. The gate 69 is controlled by the "programmed"
.- : , . . : ~ :
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- ~7 ~
output g6b o:E '-he "1" marker sensi.ng means 80. Accordingly, when the timer is in the "automatic" mode of operation the gate 69 will conduct to permit the re-circulation of the markers within the shift register. ~Iowever, before -the "automatic" mode of operation of the timer is established, the gate 69 will not conduct and the shift reyis-ter 62 receives signals at i.ts data ;nput termlnal 62b from the clrcu.;.t to be descri.bed, to provide "1" or "0" marker setting signals thereat.
The shift register 62 will be assumed to be of a type where a "1" shift pulse will shift a particular "0"
or "1" signal at the da-ta input terminal 62b to the output of the firs-t stage of the shift register. The shift pulse input terminal 62a is connec-ted to the output 66a of an "OR" gate 66 which has one input 66c extending to the 30 ninute pulse output of the timing circuit 73 so that this pulse is fed to the shift register ever~ 30 minutes in real.
time when the shift register is to be synchronously shifted.
Another input 66b of the "O~" gate 66 extends to the output 51a of an "AND" gate 51 whose input 51a e~tends to the line 49' extening to the ou-tpu-t of the debouncing circuit 4%.
The "AND" gate 51 has another ;nput 51c which extends to the "pulse enable" output 40h of the control circuit 40 to recelve an enable voltage during review and all manual pro~
:; 25 gram states e~xcept the MPE mode of operation as sho~n in .1~.~.- '' .
:
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~6;9~0 Fi(l. 6B, so tha-t the shift regis-ter re~ceives puls~s from the debouncing circuit 48 except ~.~hen set-ting present time.
The "OR" gate 66 has an input 66d extendi.ng to the output 70a of an "AND" gate 70 which effects the rapid feeding of shift pulses (called rapid time advance or RTA
pulses) during the re~s~nchronizing of the shi~t register 62 to be described after the completion of either a review or a manual program mode of operation of -the timer. The "AND" gate 70 thus has an input 70c extending to the out-put 7~a of an 80KEIz oscillator 74 which operates e~ceptduring "stand-by" opera-tion. The "AND" gate 70 has another input 70b coupled by a control line 40g' to an RTA enable output ~sOy of the control c;.rcuit 40 which produces a "1"
signal at the transition of the various manual program and review modes o~ operation back to the "automatic" mode of operation of the timer. The "AND" gate 70 also has an input ;~ 70d connected by a conductor 80 to -the ou-tpu-t o~ an i.nverter 78 whose input is connected to the output of an offset counter 64.
20~ The output of "OR" gate 66 also feeds the c]ock input terminal 64a of the offset coun-ter 64. The offset counter is reset to zero upon the entering of "present time", whereas the shift register 62 is reset during "program re-set" of the -timer, which it can be seen from Fig. 6A occurs when the timer is operated to :the 'Inot programmed" mode of . , ~
: .
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5~
a~.g -- ' opera-tion. The sh;.ft re~i.ster 62 in a sense is a pulse counter because the first "ON" marker entered into the out-put of the first stage of the shift regi.ster will assume a position in the 48 stages thereof dependiny upon the number of shift pulses fed thereto since the "ON" marker is fed thereto. It is apparent -that the difference in the count in the shift regi.ster and offset counter at the time the first "ON" marker is en-tered into the shift register will be an offset count number e~ual to the number oE half hour intervals which have occurred between "present time"
and the time the first "ON" marker is manually set into the shift register (since the shifted position o~ an ON marker f is the count of the shift reyi.ster reer.red to).
During a time in-terval when a manual programming ~ 15 is taking place and the "OR" gate 66 receives i-ts pulses ;~ ~ from the output of the debouncing circuit 4g, this ofEset wlll be mai.nta~ned, and so when the first entered "1" marker reaches the last stage of the shift register 62, -the marker ~: ~ in~the last stage of the shift register not representing 20 the desired light conditlon for present time is then shifted to a positi.on where the last stage represents the storage :` ~
location for present time. This is achieved by rapidly feeding shift pulses to the shift register 62 and to the : clock input of the offset counter 67 until the count in the offset counter reaches 48. The sensing of a l'l't marker in ~ ~: : ` ' .,.. ,, : ~ .
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., . . . , :
. .
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S~
- so -the last S-tacJe o:E the shi~-tregister by "1" marker sensiny means 86 feeds a pu:lse to "programmed" line 86b' which operates the timer into the "automatic" mode. Whenever, the "au-tomatic" mode is entered -the RTA enable line 40g' is S energized to enable the gate 70 to feed the 80 KHz output to both the shi*-t reyister and ofEset counter to ad~ance the markers and count therein until the oEfset counter reaches its maximum count. This results in a "1" output thereof whlch disables gate 70. The shiEt register is simi-larly re-synchronized by the oEfset counter when the au-to-matic mode of operation is re-established when a review mode of operati.on is terminated..
When the "1" marker sensing means 86 senses the presence oE a "1" marker at the output terminal 62d o:E the shift regis-ter for the first time, the resul-tant "1" output of the sensing means i.s inverted by inver-ter 92 to disabl.e coritrol gate 90 which controls the feeding of ma.rker signals to the shift register. This "1" output is also fed to the : : input 69c of the control gate 69, whose input is connected 20 ~to the :shift re~ister output 62d and whose output is con-nected to the data input termi.nal 62b o:E the shiEt register, to enable the re-circulation of the markers in the shift reglster when the "automatic" mode of operation oE the timer is initiated.
It will be recalle~ that, during a manual ~:
: , - . .
:: :
programming or review mode of operation where control knob 12 is not rotated to all of the clifferent possible detented positions for feeding markers into the shift register or readiny markers from the outpu-t of the shift regis-ter so that -the user does not complete a manual programminy or manual review Mode of operation, the shift register 62 will be automatically advanced to a point where the first enter-ed "1" ON rnarker is located at a storage location repre-senting present time by a re~synchronization operation as just described. ~his means for automatically advancing`
the markers in the shift reyister 62 when such manual pro-gramming or review mode of operation is no-t terminated by the user is accomplished by the circuit loyic now to be descri.bed. Thus, each time the control knob 12 is depressed or advanced one posi-ti.on, the timing circuit 73 is reset for establishing a new timing period for the various time--out periods re~erred to. If the control knob 12 is not again~ operated for a period of five minutes during manual programmlng and 40 secoDds during program review, a "1"
signal appears on the output 73c of the timing circuit 73.
: `
~; ; This line extends to the control circui.t input 40p of the oontrol circuit 40, which will then generate a "1" signal whl~ch returns the timer to the "automatic" mode of operation resulting in the generatlon of a "1" signal on the "rapid time advance enab].e" line 40g' leading to gate 70 which ~;`"` ~
3L.~ SO
opens to fced the 80 K~lz pulses to the shift regis-ter 62 and offset coun~er 64, to eEh ct the shifting of the shift regis-ter 62 by the re-synchronization operation previously explained. ' Now that the description of the simplified block diagram of Figs. 4~ and 4B have been completed, reference will now be made to Fiys. 5A, 5B and 5C, considered as a who]e, where a breakdown of the details of some of -the con-trol elements shown as single b]ocks in Figs. 4A and 4B
just described will be expanded to include more details oE the same.
Figs. 5A, 5B and 5C
The timing circuit 73 is shown in Fig. 5C. This circuit receives a 60 cycle square wave ou-tput from the Schmidt trigger aircuit constiLu-ting pulse shaping means 57.
~l~his output is coupled by a line 58 to the inpu-t 73m of -the tlming circuit 73 to synchronize -the operation of the same.
s previously indicated, the timing cixcuit 73 has a nwnber of sections thereof which produces at the various ou-tputs 73a, 73b and 73c a "1" signal at various time-out periods respectively greater than 0.8 seconds, 40 seconds, and five minutes, and a "0" signal when these sections of -the timer are reset before thls per~od is aver. The tlme-out ~eriods occur from apoint beginning with ei-ther the depression of 25~ the control knob 12 or the rotation thereof one de-ten-ted .~ : : ~ :
-: :, ~ : : .
~ ::
, llOEi9~
position. .~s timing i.nputs for -~he timing circult 73 there are provicled connections to "divider reset" and "d:ivider enable" control llnes 40a' and 40b'. Dlvider reset line 40a' extends from the input 40a of the control circuit 40 to the input 73k of the timing circuit. One case where a momentary "1" signal appears on this line is when the timer is charged from the "manual programmed enable" mode to the "manual pro-yram not initiated" mode of operation. The "divider enable"
control line 4Ob' extends between the control circuit out-put 40b and the.input 73L of timing circui~ 73. Steady "1"
signals appear on this line at the various times identifi.ed in the table of Fig. 6B.
The timi.ng circui-t includes a cascaded series o dividers 73--1, 73-3, 73-5, 73-7 and 73-11 where the outpu-t 1~ of one divider .~eeds the input of the next divider to provide : ~ a variety o diiferent -time-out periods beginning wlth the si.mu]taneous resetting of all of the same when a reset pulse appears on "divider reset" line extending from the logic : ~:
~ matrix 41 to the control circuit output 40a and then to ~: ~ , . .
2U tlming clrcuit terminal 73k, in turn, connected to the reset :: inputs 73-1~, 73-3b, .... 73-llb of these divi.der ci.rcui-ts.
::
:
~ The pulse input 73 la to the flrst divider 73-1 thereof is ; ~ :
shown connected by lines 73m and 48' to the 60 Hz square wave output of Schmidt trigge.r circuit 57. The outputs of the divider clrcuits 73-1, 73-3, 73-5 and 73-7 respecti.vely , , .
~ ~ .
.
e~tend to the inputs 73-13a, 73-15a and 73-17a of "NOR"
gate 73-13, 73-15 and 73-17. The outputs of these "NOR"
gates e~tend respec-tively to the clock .inputs 73-19a, 73-21a and 73-23a of divider ci.rcuits 73-19, 73-21 and 73-23. The outputs o:E these latter divider circuits are connected by feed-back conductors 73-25, 73-27 and 73-29, respectively, to the inputs 73-13b, 73-15 and 73-llb o~ the "NOR" gates 73-13, 73-15 and 73-17. The divider circuits 73-19, 73-21 and 73-23 have "reset" input terminals fed 10 from a comrnon reset llne 73-31 extending from the output ~.
of an "O~" gate 73-33. The lnputs 73-33a and 73-33b of the "OR" gate 73-33 respectively are connected to the lines 54 ,~
:~ and 49 respec-tively extending to the output of the "OR"
gate S2 and the output of debouncing circuit 48 so that these ~: 15 l~nes receive pulses each time the control knob 12 is either ~:~ depressed or detented one position.
The various divider circui.ts 73-19, 73-2]. and 73-23 are pulse counting circults which receive pulses at :their clock inputs which will not .result in full counts of ~the divlder oircuits if control:knob 12 is depressed or rotated in succession at tlme intervals less than the various time-out periods involved so that under these circumstances the outputs thereof will never reach a "1" state. Converse-~ ly,.the outputs o~ these divider circuits will reach a "1"
: 2S s-tate at the:timing periods involved if the pexiods between : ::
:
,: , : .
-, - , ~995~
successive depressions or rotations o~ the control knob 12 is greater -than the particular time-out peri.ods involved because ~hen the feedback circuits to -the inputs of the "NOR" gates 73 13, 73-15 and 73-17 will cause the count cycle to be terminated when the divider outputs reach the full count "1" state. The time-out circuit jusk described provides the super short time (SST), short time (ST) and medium time (MT) timi.ng periods previ.ously described and identified in appropriate columns of the table o~ Fig. 6A.
The time-out opera-tions for producing the LT play period oE 30 minutes and the regular 30 minute pu:Lses will now be descri.bed. This circuit includes an "AND" gate 73-9 having an input 73-9a connected to the output of the divider ; 73-7 and an input 73-9b connected by control lines 71' ; lS extending to the tlmer lnput 73L, in turn, connected by con-trol line ~Ob' extending to the "divider enable" control ::::` circuit output ~Ob. As shown in the table of Fig. 6~, a divider enable output of the logic matrix 41 occurs at that time shown~in the flow diagram of Figs. 2A and 2B when a '; ~:: ~
30 minute ti.me-out peri.od is desired~ When the 30 minute pulse is needed ~or timing purposes, the "AND" gate 73-9 will then be enabled by the "divider enahle" signals so that the output of the divider 73-11 will produce one pulse every 30 minutes fed to the timer circuit output 73e.
, ~ .: 25~ To produce the single 30 minute "play" period :~; pulse, the first 30 minute pulse becomes effective as it is ~:
: ` :: : :
, . :: ~ , , , ' :` ` ' ' " , ~ , ~ ' :
:, `` ~ , ' , ` ~ ` . ~ `
' ' , ' . : ' ' ~ ' r~
fed to the se-t input 73-36a of a set-reset bistable circuit 73-36 to set the same. The reset inpu-t 73-36b oE set-reset bistable 73~36 i.s connected by a line 73-38 to the output of the power on-to-off sensing circuit 55 shown in deta;.l in Fig. SC, which produces a momentary pulse when power is first applied to the timer. It is thus apparent that the set-reset bist.able ci.rcuit will produce a "1" output only after the first 30 rninute "play" period described, and will not regenerate this si.ynal until a power interrupting oper-ation takes place.
~ eference should now be made to the power ofE-to-on sensing circuit 55 in Fiy. 5C. This circuit i.ncludes a pair of .rectlfiers 55-1 and 55-2 connec-ted in series be-tween the positive ou-tput of the DC power supply 30 and the lS ungrounded termlnal of a resistor 55-3 whose other terminal is grounded. Thejuncture between the rectifier 55-2 and the resistor 55-3 is connected to the .inpu-t of an inverter .~ 55-~ whose output is connec-ted to -the "set" input o~ a .
: set-reset bistable circuit 55-5. The "reset" input of th.is blstabLe is connected by a conductor 73h' to the 2 pps. out-: . ; put 73h of the ti.ming circu.it 73.
: When the.timer condition setting control arm 15 :: : ::
is~moved from the "OFF~CLE~R" to the "ON" position, the timer is powered up for the first time. The output of the DC
:
power supply capacltor 30h will then charye up to its .
:
:
, - ~ . .. .
, 5~
ma~c;.mum voltacJe o~ ~I vol-ts. Before t:llls voltage ]-las ~eached a value where the rectifi.ers 55-1 ancl 55-2 s-tart conducting, the lnput to an inverter 55-4 will be a "0"
signal to produce a "1" state in the output thereoI~ which 5 will set the set-reset bistable 55-5 to provide a "1" sig-nal at set~reset bis-table output 55b. When the voltacJe across DC power supply capacitor 30b reaches a value where the rectifiers 55--1 and 55-2 conduct, the voltac3e drop appeariny then across the resistor 55-3 generates a "0"
10 state slynal in the output of inverter 55-4 so that the next reset pulse fed to the "xeset" input of the bistable 55-5 w.ill reseL the same. Since no :Eurther voltacJe occurs ]n the input c;;rcuit to the bistable, it remai.ns in a reset stc~te unti]. power is again d:isconnecte~l :Erom the timer sys~
15 tem.:
rl'he power--out tlmer circuit 63 which p~oduces a "standby" s.;.gna:L which de-ene.rgizes di.:Eferent par-ts oE the ;circuit dur:ing a loss o:f: power to the timer ls shown in de-~:
: tai.l in Fig. 5A. As:there shown, the circuit incl.udes a 20~ div~de by 4~096 div~der circuit 63-]. having a "r`e~set" input 63-]a connected to the output o:E a positive or ne~ati~fe edge one-sh~o-t multlvibrator 63-2 wl?ose inpu-t is connectea by : the aforementioned conduct:or: 61 to tha square wave output ~: ~: : : -: of the Schmidt trigger circUit 57. The divider circult 25~:63-1 has a clock inpu-t 63-lb connected to the output of a .:
"NOR" gate 63-3 havlng one input 63-3b colincc-Led to -the ou-l:-:: : , :
:
~: . : . `` ' ' ' ' ' : .' -', .: .
' . : : ~:::.. : : :
.
: . . .. :
::
-- 58 -- ~
pul_ of t}te 80 IC~I~ oscillator 74 and an :illpUt 63-3c con-nected to~t-11e ou-t of the divi.cler circuit 63-l so that when 4096 pu]ses from the oscillator are Eed thereto and counted ~hereby, a "l" signal appéars in the divider circuit output which is conver-ted -to a s-teady "0" signal at the "NOR" gate output which holds the clock inp~lt at ground potential, pre-venting fuxther response to pulses fed thereto.
BeEore any loss of power to the timer, the re-peated 60 Hz pulses fed to the reset input 63-la prevents the divider circuit from counting 4096. Upon loss of power to -the timer, the reset pulses disappear so the divider circuit receives 4096 pulses and locks-up with a steady signal in the output thereof. ~.rhis "1" signal produces a "stand~by" signal which is fed to the disa'~le input of ~: ~ ].5 ~the 80 K~I~ oscillator 74 to turn the same ofE and is fed to : other parts of the timer system to disable the same as pre-v;.ously descrlbed, e.~cept for the shift register 62 and : associ.ated circuits which main-tain the markers -therei.n.
Reference should now be made to the voltage chanc3e 2~0 pulse circuit 58 shown in Fig. SA, which is the cirauit which produces a positive pulse each time the 3-way swi.:tch wiper ::
~ 25C ` 15; moved~:be-tween contac-;:s 25a and 25b. It wi.ll be re-:
called~tihat the voltage appearing~on the stationary contact 25a which extends~t,o the;:.inpu-t 58a of the voltage change ~: 25 ~pu1ser~:clrcuit 58 will~ be:a 60~Hz voltage when the wip2r 25c . . - - -: ~- . . :- : . . .
~ s~3 -enc~a~es the sam~ and no vol-ta~Je whell the wiper is diconnec--t.ed ther~ om. ~'he input 58a of the circui-t is connect:ed to one end o* a series circuit comprisin~ resistors 58-1 and 58-2 whose other end is grcunded. A capacitor 58-3 is shown connected across the resistor 58-2. A 60 Hz Vol-. tage applied to the input 58a of the circuit 58 will produce a similar waveform vo].tage across the resistor 58-2 whi.ch voltage .is fed to the reset input of a divider circuit 58-5 to prevent the circuit from responding to any pulses fed thereto. The output oI the divider circuit 58-5 then remains in a "0" state. The divider circuit 58-5 has a clock input exl:end:i.ng to the Ol.ltpllt of a "NO~I' gate 58 7 having one oE
i.ts inputs 58-7a connected -to the line 61 extending to the 60 pps output o.E the Schmidt tri.gger circui.t 57. If the di~ider circuit 58-5 i.s not reset because the 3-way s~itch wipe:r 25c i.s moved to contac-t 25a, the divider circuit will : coan-t the pulses fed to the~clock input thereto, aild when a count o~ 4:is reached khe signal on -the ou-tpu-t 58-5 -thereo*
:will change:from a "0" to a "1" signal condition. T.his "1"
20~ signa~l condit.ion lS fed kack ~y a conductor 58-6 to a second :.:
input 5B-7b of the "NOJI" gate 58-7 which will then provide a~steady "0" s.ignal condition ~t the output thereo* to p.re- -vent~any ~urther count pulses *rom entering -the divider.
This charge ln a posi.tive airectlon ~rom a 1l0-l to ":l" signal ~:
: 25: condition at the ou-tput of ~he divide.r circui.t 58-5 is ... . . .
~ . ` ' . ' ~ . . ~: . - :, : . - .
converted to a s;n(,31e positive pulse by a positive edge OIIC'-ShOi multivi.brator S8-8 the iIlpUt of which is connected to tlle d:ivider circuit Oll'tpU't. The output of this positi.ve edge one-shot Multivibrator 58-8 is connected to an "OR"
5 gate 58-,10, whose output is connected through -the output 58b of th~ circuit 58 to the input 52b of the "OR" yate 52 which feeds the common line 54 which a:Lso receives the pulses, result.ing from the clepression of the control knob 12~
When the signal output condition of the divider 10 circuit i.s initially in a locked-in "l" state, it i5 switched to a "0" state by the re-appearance of a 60 Ilz i.nput from -the 3-way switch 25 wlien wiper 25c is moved to contact 25a.
This resets and change.s the "l" i.nput of tlhe divider cir-cuit back to an "0" st~te. This outpu-t change i5 COrlVerted lS to a positive pulse by a negative edye one-sho-t multivi.bra~
tor~ 58-8', whose input is connected to the divider circuit ; output. This positive output pulse of the negative ec~ge one--shot mult;vibrator' 58-8' is connected to said "OR" gate 58~10 wh~.oh feeds this posltive pulse to the line 59 through "OR" ., , '20 ~ yate 52.
Fiy. SA shows the control term.;nal 10c of -the power Lriac l0 coupled~ by conductor ~100 to the on-off control line 0t' connec'ted t:o output 40f of the control circuit 40. The output ~0t oi the control ciruoit 40 is connected to tlle Ollt-25; put;;]02a~ of a set-reset bistable 102 (I;`ig. 5B) hav;.ng a set ~ ' .
~ 61 -input 102b ex-tellding to the Olltput of a neg-~`tive edcJe one-shot multivibrator 104, and a reset i.nput terminal 102c extending to th~ output o:E an "OR" yate 106. The bistable output 102a has a "1" power triac turn-on signal when the bistable is set and a "0" power triac turn-off signal when the bistable is reset.
The "OR" yate 106 has an inpu-t 106a extend.ing to the "standhy" output of the power--out timer 63 which feeds a continuous "1" reset signal to the reset termi.nal 102c of ].0 the set-reset bistable 102 when power is out so that set-reset bistable remail~s continuously in a reset condition, which assures that the power -tri~c 10 remains non-conduc-tive.
:~ The "OR" yate 106 has another input 106b extending to -the ; . Q' output of a toggle bistable circuit 108 which is alter-15 ~nate].y operated between set and reset conditions by -the eeding of successive "1" signals to toygle bis-table input `: :
~108c. When the togyle bistable 10~ is xese-t, the Q' outpu-~
thereof will have a "1" signal;thereon and when this bistable is sel:, the Q' output thereof will have a "0" signal there-70~on, which will then permit the set reset blstable 102 to be set. The input 104b o~ negative edge one-shot multivi-brator 104 is connected to -the "zero crossing siynal" input 0g of control circuit 90. Th:is terminal is connected by ~; an input line ~0g' to the juncture of DC po~-~er supply recti-~:: :
2S fier 30a and resis-tor 30c. When the triac 10 is ini~ially non-conduc~t:ive, the voltage at the juncture of rect-fier 30 :
~:' - ~ ,:' ; ' ':
:
3~
- ~2 -and resi~-;tor 30c re].ative -to yro~ d will be the positi.ve OUtpll t o:E the power supply. In a. cycle o~ t.he app:Lied AC voltage on power line 9 when the vol-tage thereof be-yins to increase from 0 in a positive dixecti.on the voltage S on the non-conducting trlac load termi.nal lOb w:ill also increase in the same direction and -th:is positive-going vol-tage is coupled through the power supply conl:rol means 30d to charge OL- maintain the charge on the capacitor 30b and rectifier 30a will then become conductive. Conduction of rectif:i.er 30a applies ground to the f;.rst previously positive con-trol line 40g connected to the previously un-grounded side of capaci-tor 30b. This negative-c3O1ng voltage pxoduced at the beg:ininillg of a posi.tive-going ha:l.f cycle of the vol.-tage or power line 9 when triac 10 is non-conductive - L5 is fed by line 40g to the input of the negative edge one-.. shot mul.ti.v:ibrator 104 to produce a 11 signa:L at the out-put 104a thereof whi.ch sets the set-reset his-tabl.e 102.
rherea~ter the power Lriac i.s rendered conducti.ve each hal~
cycle o:F the applied AC vo.1.tage s-tart.i.ng a few degrees 0 after the applled AC vol-tage~pdsses through zero and ending : : when the:current~flow therethrough drops below a holding :
current value near zero.
The O~ gate 112 has an input 112a extending to ~ the output ~lOc of a positive edge one-shot multivi.brator llO and an input 112a extending to l:he output :llOc of a .
nec3a-ti.ve edge one-shot multiv.ibrator 110'. The one--shot multivi.brato.rs 110 ancl 110' have inpu-ts l:LOa and llOa' fed from a common i.nput line 4Om' ex~endiJIg throuyh the control circuit input 40m and conductor 67 to the output 62d o~ the shift register 62. Thus, whenever the output condition of the last stage o.~ the Sili~t register changes fr~m an "O"
to "1" signal state, the positive edge one-shot multivibra-tor w:ill produce a positive pulse, if tllis circuit lS en--abled to operate, and whenever the output condition of the last stage of the shi~t regi.ster 62 changes from a "1" to a "O" state, the negative edge one--shot ~ultivibrator 110' w;.ll produce a posi.tive pulse when this circuit is enabled to opera-le. The outputs o:~ the one-sho-t multivib.rators 110 and 110' will then appear at the output of the "OR" gate 112 to toggle the toggle bistab~e 10~ aa long as these one--shot multivi.brat.ors are enable -to operate. The one-shot multivibrator 110 and 110' have enable input termi.nals llOb and llOb' respective:l.y extellding to the outputs of "AND"
gates 111 and 111' having inputs llla and llla' connected :
by a common conduotor to the "Auto" output o~ the logic matr.;.x 41. From the -table of Fig. 6B, i-t will be noted :
that a stea~y "1" signal will appear at this ".~uto" ou-tput when the timer is operat:ed in an "automa-tic" mode oE opera--tion. The o-tller input lllb of "AND" gate 111 is connecl:ed to~the Q' output of the toggle bis-table 108 and the other :
:~ : - , ~: , . .
.
6~ -ou-tput l:llb' of l:he "~ND" ga-te 1]1' is connec-ted to the ~
output o~ tl-,e tog~]e b:istable 108. It is -thus apparent that the positive ecl~e one-sho~ muJ.tivibra-tor 110 will be enabled -tooperate when the Q output of the toggle bis-table 108 is in a "1" state, whi.ch occurs when the power triac is non-conductive. Similarly, the negative edge one-s~ot multi-vib.rator 110' is enable for operation ~hen the power triac .is conductive. With this circuit logi.c, each transition in the output o~ the shift register 62 will result in a rever-1~ sal of -the state of opera-tion of the power triac 10, except when the circu;.t had been previously overriden by the de-pressi.on of the control knob 12 which independently toggles the bistable 108 as previ.ously explained. The operatioll of che toggle bi.stable 108 overridden by the clepression of the lS control knob will automat:ically be re-established in the ; subsequent transition of -the output oE the shift register . w.`nich can be effeGtive -to change the opera-tive s-tage oF the power trlac 10.
The "OR" gate 112 has an input 112c extendiny to .
~: 20 .the~output of "AND" gate 114 havillg one input 114a extendiny ~; to~the "pushbutton" line 54' ~Ihich has a "1" signal thereon momentarlly as the control knob 12 is depressed. The other input 114b of "~" gate 114 extends to the "pushbutton en-: ~ ~ able" output of the logic ma-tri.x 41. As shown in Fig. 6B, ~ 25~ this line has a continuous "1" signal tbereon, except wllen : , ~ . .
' the ti.mer i.s i~l a "manl.lal program enable" or a "revie~l enable" mode of operation so tha-t except Eor tl1eSe modes of operatlon of the timer, each time the con-trol knob ~.2 i.s operated, it will develop a "1" si.gnal at the outpu-t oE
the "~ND" gate 11~ which is fed through the "0~" gate 112 to toggle the toggle bis-table 108 to tu.rn the triac 10 on or off.
To this end, "~ND" gates 117 and 117' have .inpu-ts 117a and 1:17a' connected to the "load li.ght bistable" out--put of the logic matrix 41 which, as can be seen erom table 6A, produces a momentary "1" sicfnal when the timer is re-turned to an "automatic" mode of operatlon. The "AND" gate 117 has i.nput 117b connected to the output of an inverter 113 whose input is connec-ted to the control circuit i.nput 40m by cont.rol line 67 to the output 62b of the shi:Et re-gister 62. The "AND" gate 117' has an input 117h' connected to -t.he con~rol c;irc;lit input 40m connec-ted by line 67 to ; the output 62b of the shift register 62. It can now be seen that the logic of the connections to the "~ND" gates 20 ~117 and 117' is such dS to produce a momentary l'l" signal upon the return of the timer to an automatic mode of opera-tion when the marker in the last stage of the shi:Et re-gister does not correspond to th~ conductive state of tlle triac or~ the proper outpu-t condition o:E the to~gle bistable 25~ 108:which enables the proper multivlbrator 110 or 110' to - : ~
.
, ., :-.
respolld to the next transit:ioIl of the shift reyister out--put fxom a "0" to "1" or from a "]" -to a "0" state.
The only other circui.t details shown in FiCJS. 5R, 5B and 5C which have not already been described are the "~D" gates 120 and 122 in ~ig. 5s which control the feed-.;.ng of the ].ED indicator conlrol signals appearing on the "pu].se" and "flash" terminals 40cl and 40c of the control circuit 40. I'hus, "AND" ga-te 120 has one input 120a connec-ted to the "pulse" terminal 40j which receives a pulse cach tlme the control knob 12 is ro-tatecl and an input 120b con-nected to the "LED pu].se" output of the logic matrix 41.
The table in Fig. 6B indicates the i.nstances when a contin- !
uous LED pulse enab].e signal .is generatecl.
The "AND" gate :L22 has an input 122a extendiny :).5 to the "LED flash" output of the logic matrix which, as shown by Table 6B produces a steady "1" signal when the Llmer~is in a "not procJrammecl" or "manua]. program enable"
mode of operation. The "AND" ga-te 122 has another input 122b exl-endlng to the 4 yps llne extending from the timer 20~circuit 73.
Fiy. 5B shows~the logic matrix ~1 clS a single block.
To~avoid a needless encumbrance of this specifica-tion and drawlngs,~Lhe~details of all of various logic circuit ele-rnents ,ormlng ouL of the matrlx are not shown. IIowever, 25~ these elements are ade~ua-tely identified by the control means ~:
, - - , .
. , : ~: -.
~: ., '.
~-oxes i.n the flor.1 di.acJram of l~'ig. 2, as we].l as J~he lo~ic ma-tri.x o~jerati.on tables of Figs. 6~ and 6B which identify all of the varl.ous input and outpu-t sicJnals to and from the logic matrix as wel1. as -the state detecting and sta-teVtran~
sition operations performed by the logic matrix.
It should be apparent -that the present invention is an excee(7.ingly unic~ue, "peop].e oriented" timer system whi.ch simpli:fies the operation of the timer, especially the programming and program review thereof.
.It should be understood that numerous modifica-tions may be made in the most preferred form of the inven-tion described without deviating from the broader aspects thereo:E .
.
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Claims (25)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A programmable electric timer including storage means having respective storage locations assigned to various time intervals where ON or OFF markers can be stored or retained to control a controlled means, manually operable programming means for setting or retaining said ON and OFF
markers in storage locations corresponding to the time intervals involved, said manually operable programming means including time setting means operable first to a "present time" setting and then to other time settings defining the beginnings of said various time intervals, and manually operable marker setting means for selectively setting or retaining an ON or OFF marker in a storage location identified by said other time settings of said time setting means, and responsive only to the next operation of said marker setting means after said time setting means is set to "present time" for operating the timer in a manual programming mode of operation where said markers subsequently will be stored in said storage locations of such storage means in accordance with the subsequent operation of said marker setting means and the storage locations identified by said other time settings of said time setting means.
markers in storage locations corresponding to the time intervals involved, said manually operable programming means including time setting means operable first to a "present time" setting and then to other time settings defining the beginnings of said various time intervals, and manually operable marker setting means for selectively setting or retaining an ON or OFF marker in a storage location identified by said other time settings of said time setting means, and responsive only to the next operation of said marker setting means after said time setting means is set to "present time" for operating the timer in a manual programming mode of operation where said markers subsequently will be stored in said storage locations of such storage means in accordance with the subsequent operation of said marker setting means and the storage locations identified by said other time settings of said time setting means.
2. The programmable timer of claim 1 wherein said storage means has respective storage locations assigned to various time intervals over a twenty four hour period and there is provided manually operable timer condition setting means operable to timer de-energizing and timer-on conditions, and there is provided means responsive to the completion of the entry or retention of ON and OFF markers in all of the storage locations of said storage means for operating the timer in an automatic mode of operation where said storage locations are synchronously accessed and the markers in the accessed storage location control the condition of operation of said controlled means.
3. The timer of claim 2 provided with indicator means, and indicator control means for establishing a first distinctive indication on said indicator means which indentifies a not-programmed condition of the timer when said timer condition setting means is initially operated to said timer-on condition, a second distinctive indication indicating that the timer is being programmed, and a third distinctive indication indicating that the timer is programmed and in said automatic mode of operation.
4. The timer of claim 1 further provided with mode modifying means responsive to the automatic mode of operation of the timer and to the subsequent operation of said manually operable time setting means to present time and to the operation of said manually operable marker setting means to enter said present time for disabling said synchronous storage location accessing means, establishing a review mode of operation of the timer accessing the storage locations identified by the time settings of said manually operable time setting means and operating controlled means into a condition communicated to the operator corresponding to the marker in the accessed storage location, and manually operable means for returning said timer from said review mode of operation to said automatic mode of operation.
5. The timer of claim 4 wherein there is provided additional means which automatically returns the timer from a review mode of operation to said automatic mode of operation if said returning means is not operated within a given time period.
6. The timer of claim 2 wherein there is provided means responsive during the manual programming mode of operation of the timer where there has been set at least one ON marker in a storage location and there has been set or retained at least one OFF marker in another storage location of said storage means but said manually operable time setting means has not been set to all the possible time settings thereof starting with the first ON marker setting to complete a manual programming operation for automatically completing the setting of OFF markers in the remaining unset storage locations of said storage means, to automatically complete a manual mode of operation and for then automatically returning the timer to said automatic mode of operation.
7. The timer of claim 4 wherein there is provided means responsive to the completion of the setting of said manually operable time setting means to all of the possible time settings thereof starting with the first ON marker setting for establishing a pre-automatic mode of operation of the timer for a very short time interval before said return to said automatic mode of operation, to permit said time setting means to be moved quickly through and beyond the last time setting without shifting the timer into set review mode of operation as a result of the further operation of said manually operable setting means.
8. The programmable timer of claim 1 wherein said manually operable time setting and marker setting means has a common rotatable and depressible control member rotatable to discrete positions representing various time settings establishing said present time setting and then said time settings defining the beginning of said various time intervals, permanently visible time setting indicating indicia along said rotatable member, and indexing means for identifying the time setting for each discrete position of said manually rotatable control member, said control means being responsive to the initial rotation of said manually rotatable member to a present time setting and the subsequent depression of said rotatable member which generates a present time entering signal for initiating a manual program mode of operation of the timer, said control means being subsequently responsive to the rotation of said rotatable member to various time settings and the depression of said manually rotatable member when said timer condition setting member is in said timer-on position for alternately entering or retaining said ON and OFF
markers in the storage locations corresponding to the time intervals identified by the time settings of said manually rotatable member.
markers in the storage locations corresponding to the time intervals identified by the time settings of said manually rotatable member.
9. The timer of claim 2 where said storage means in said automatic mode of operation is a continuously synchronously circulating shift register and has a number of stages therein equal to the number of said time intervals in a twenty-four hour period, a data input terminal for receiving ON and OFF marker signals initiated by the operation of said marker signal generating means, a shift pulse input terminal which receives synchronous shift pulses during said automatic mode of operation of the timer and shift pulses generated by the operation of said time setting means during the manual programming mode of operation of the timer, said storage locations assigned to a particular time interval and the markers therein being shifted one stage at a time as a shift pulse is fed to said shift pulse input terminal, said ON and OFF markers being set or retained in the first stage of the shift register; the timer being further provided with an offset counter which receives said shift register shift pulses to count the same and produce a control signal after each successive group of N shift pulses are fed to the offset counter after the same is reset, N being a number equal to the number of said time intervals in a twenty-four hour period;
means for resetting said offset counter when present time is entered by said operation of said manually operable marker signal generating means; means for removing any markers in said shift register prior to the beginning of said manual programming mode of operation; means responsive during manual programming to the shifting of the first set ON marker to the last stage of the shift register for returning the timer to the transition of the timer from said manual programming mode of operation to said automatic mode of operation for rapidly feeding shift pulses to said offset counter and to said shift register only until said offset counter reaches a maximum count of N shift pulses.
means for resetting said offset counter when present time is entered by said operation of said manually operable marker signal generating means; means for removing any markers in said shift register prior to the beginning of said manual programming mode of operation; means responsive during manual programming to the shifting of the first set ON marker to the last stage of the shift register for returning the timer to the transition of the timer from said manual programming mode of operation to said automatic mode of operation for rapidly feeding shift pulses to said offset counter and to said shift register only until said offset counter reaches a maximum count of N shift pulses.
10. The timer of claim 1 or 2 wherein there is provided means measuring a given time period after the entry of present time and beginning with the subsequent operation of said manually operable time setting means or marker setting means while the timer is in a manual programming mode of operation and until one ON and one OFF marker has been set or retained in said storage means and for returning the timer to a not-programmed mode of operation if at least one ON and one OFF marker have not been so set or retained by the end of such time period, and means for indicating said not-programmed mode of operation.
11. The timer of claim 2 including timing means for automatically setting the mode of operation of said timer to said automatic mode of operation a given time period after the first ON and OFF markers have been set or retained in said storage means, if said markers were not otherwise set or retained in the remaining unaccessed storage locations.
12. A programmable timer according to claim 1, further including means responsive after a given predetermined time period to the presence of at least one complementary pair of ON and OFF markers in the storage locations of said storage means so that at least one predetermined ON period is defined by the markers in said storage means for switching the mode of operation where said synchronous storage location accessing means accesses the markers stored in said storage means to control said controlled means in accordance therewith; and means responsive to the absence of at least one complementary pair of ON and OFF markers in the storage locations of the storage within a predetermined time period for altering the user that the timer has not been programmed by the entry of said at least one pair of complementary pair of ON and OFF markers.
13. The timer of claim 12 wherein there is provided means responsive to the operation of the timer to said auto-matic mode of operation for providing the user with an indication of such fact.
14. The timer of claim 12 wherein there is provided manually operable review mode entry and cancelling means for switching the mode of the timer selectively into a review mode of operation from said automatic mode of operation or from said review mode of operation back to said automatic mode of operation; means responsive to the operation of said timer to said review mode of operation for responding to the operation of manually operable time setting means for identifying the particular markers stored in the storage location of said storage means for the time intervals identified by the time settings involved; and timing means responsive to the failure of the user to operate said manually operable review mode cancelling means within a given time period for automatically returning the timer to said automatic mode of operation thereof.
15. The timer of claim 2 wherein there is provided means responsive in the automatic mode of operation of the timer and to the next first operation of said manually operable time setting means to present time and first operation of said marker setting means for operating the timer in a review mode of operation for identifying the particular markers stored in the storage location of said storage means for the time intervals identified by the subsequent time settings of said time setting means; means responsive to the next operation of said marker setting means for returning the timer to said auto-matic mode of operation; and timing means responsive to the failure of the user to operate said manually operable marker setting means to return the timer to an automatic mode of operation within a given time period for automatically returning the timer to said automatic mode of operation thereof.
16. A programmable timer according to claim 1 further including means following the completion of the setting or retention of said markers in all of said storage locations for operating the timer in an automatic mode where the storage locations are automatically and synchronously accessed to control the operation of said controlled means in accordance with said markers, automatic programming completion means which, upon the failure of the user to set or retain ON or OFF markers in all of the storage locations of said storage means after a given time period, automatically sets OFF markers in the remaining storage locations of said storage means and automatically operates the timer in said automatic mode of operation where said controlled means is controlled by the markers in said storage locations of the storage means assigned to the timer intervals involved.
17. A programmable timer according to claim 1 including means following the completion of the setting for retention of said markers in all of said storage locations for operating the timer in an automatic mode where the storage locations are automatically and synchronously accessed to control the operation of said controlled means in accordance with said markers, user operable mode changing means for changing the timer from said automatic mode of operation to a review mode of operation where said markers in said storage locations in said storage means are identified upon further operation of said time setting means and for returning the timer to said automatic mode of operation by operation of a manually operable means, and means responsive to the failure of the user within a given time to return said timer to said automatic mode of operation for automatically doing so thereafter.
18. The timer of claim 17 wherein said manually operable programming means includes manually rotatable time setting and depressible marker setting means, the depressible marker setting means being outwardly spring urged and thus momentarily depressible, said user operable mode changing means including means responsive to the rotation and unique depression of said rotatable and depressible means to operate the timer between said automatic and review modes of operation and where the position of said rotatable means determines the storage location accessed to determine the marker set therein.
19. A timer system according to claim 1, further comprising timer power input terminal means; first control means including repeat cycle synchronous storage location accessing and marker readout means for continuously accessing said storage location and feeding control signals to said controlled means in accordance with the markers in the accessed storage locations, and DC power supply means coupled to said timer power input terminal means and including energy storage means for storing up energy therefrom and providing at output DC terminal means thereof a DC voltage for energizing the various portions of said timer including said storage means and said first control means, means enabling said energy storage means to maintain for a given duration a sufficient output of DC voltage to maintain the markers in said storage means if there is no drain on said DC power supply means from said first control means; means responsive to the loss of power at said timer power input terminal means by de-energizing said first control means but continuing the connection of said DC power supply means to said storage means so that the markers are maintained in said storage means while there is minimum power drain on said DC power supply means.
20. The timer of claim 19 provided with means responsive to a prolonged power failure when said markers in said storage means become lost and to the re-establishment of power to said DC power supply means for providing an indication that the markers have been lost from said storage means so that the user is aware of the fact that the timer must be re-programmed.
21. A programmable electric timer according to claim 1, further including means following the completion of the setting or retention of said markers in all of said storage locations for operating the timer in an automatic mode where the storage locations are automatically and synchronously accessed to control the operation of said controlled means in accordance with said markers, said manually operable marker setting means being operable selectively in at least a first manner or a second manner, said timer including control means responsive to the initial
21. A programmable electric timer according to claim 1, further including means following the completion of the setting or retention of said markers in all of said storage locations for operating the timer in an automatic mode where the storage locations are automatically and synchronously accessed to control the operation of said controlled means in accordance with said markers, said manually operable marker setting means being operable selectively in at least a first manner or a second manner, said timer including control means responsive to the initial
Claim 21...continued.
operation of said marker setting means in said first manner for entering during initial programming ON
and OFF markers in said storage locations of said storage means determined by the settings of said time setting means mode changing means for changing the timer between said automatic mode of operation and a timer-off mode of operation where said markers do not con-trol the operation of said controlled means, said mode changing means including means responsive to each operation of said marker setting means in said other manner for switching the mode of operation of the timer between said automatic and timer-off modes of operation.
operation of said marker setting means in said first manner for entering during initial programming ON
and OFF markers in said storage locations of said storage means determined by the settings of said time setting means mode changing means for changing the timer between said automatic mode of operation and a timer-off mode of operation where said markers do not con-trol the operation of said controlled means, said mode changing means including means responsive to each operation of said marker setting means in said other manner for switching the mode of operation of the timer between said automatic and timer-off modes of operation.
22. The programmable timer of claim 21 wherein said controlled means is a power switch operable to power circuit closing and opening conditions, said marker setting means being a manually operable power turn-on and turn-off means operable successively to power on and power off conditions which normally operate said power switch to said power circuit closing and opening conditions; and there is provided manually operable timer condition setting means settable to at least timer-on and reset conditions; said storage means having respective storage locations assigned to various time intervals over a twenty-four hour period; turn-off means which is different from the manner in which it is operated for normally operating said power switch means for operating the timer in a timer-off mode of operation where the manually operable turn-on and turn-off means subsequently only control said power switch means, said means being responsive to a second distinctive operation of said manually operable power turn-on and turn-off means for returning said timer to said automatic mode of operation.
23. The programmable timer of claim 21 or 22 wherein said marker setting means in at least the timer-off mode of operation of the timer when operated also effects operation of said control means at least between said two conditions.
24. In a programmable timer for operating a controlled means under control of ON and OFF markers in storage locations of marker storage means, which storage locations are assigned to the various time intervals during which the controlled means may be in either of at least two possible conditions; said timer including synchronous storage location accessing means for accessing such storage locations at the beginning of said time intervals; manually operable ON and OFF signal generating means for generating ON and OFF
marker signals; and manually time setting means operable first to present time and then to other time settings, the other time settings defining the beginnings of said time intervals, the improvement comprising means responsive, at least in part, to the movement of said manually operable time setting means for initiating a manual programming mode of operation where ON and OFF markers are stored or retained in said storage locations of said storage means in accordance with the setting of said manually operable marker signal generating means; means responsive to the passage of a given time period since the last operation of said time setting means and the generation of at least one complementary pair of ON and OFF markers in the storage locations of said storage means so that at least one predetermined ON period is defined by the markers in said storage means, means for automatically switching the mode of operation of the timer from said manually programming mode of operation to an automatic mode of operation where said synchronous storage location accessing means accesses the markers stored in said storage means to control said controlled means in accordance therewith, and means responsive to the absence of said complementary ON
and OFF markers in the storage locations of the storage means within said given time period for alerting the user that the timer has not been programmed by the entry of said at least one pair of complementary pairs of ON and OFF markers.
marker signals; and manually time setting means operable first to present time and then to other time settings, the other time settings defining the beginnings of said time intervals, the improvement comprising means responsive, at least in part, to the movement of said manually operable time setting means for initiating a manual programming mode of operation where ON and OFF markers are stored or retained in said storage locations of said storage means in accordance with the setting of said manually operable marker signal generating means; means responsive to the passage of a given time period since the last operation of said time setting means and the generation of at least one complementary pair of ON and OFF markers in the storage locations of said storage means so that at least one predetermined ON period is defined by the markers in said storage means, means for automatically switching the mode of operation of the timer from said manually programming mode of operation to an automatic mode of operation where said synchronous storage location accessing means accesses the markers stored in said storage means to control said controlled means in accordance therewith, and means responsive to the absence of said complementary ON
and OFF markers in the storage locations of the storage means within said given time period for alerting the user that the timer has not been programmed by the entry of said at least one pair of complementary pairs of ON and OFF markers.
25. The timer of claim 16 wherein said automatic programming completion means operates only if there is at least one turn-on and one turn-off marker in the storage locations in said storage means to identify at least one ON
time interval.
time interval.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US132,008 | 1980-03-20 | ||
| US06/132,008 US4296247A (en) | 1979-04-02 | 1980-03-20 | 13,14-Dihydro-11-deoxy-11-hydroxymethyl-9-deoxy-9-methylene-19-oxo-PGF.sub.1 |
| US06/132,090 US4379245A (en) | 1980-03-20 | 1980-03-20 | Manually operable rotary pulse generating apparatus for pulse counting and similar applications |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1169950A true CA1169950A (en) | 1984-06-26 |
Family
ID=26830006
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000373577A Expired CA1169950A (en) | 1980-03-20 | 1981-03-20 | Power circuit control programmable timer |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1169950A (en) |
-
1981
- 1981-03-20 CA CA000373577A patent/CA1169950A/en not_active Expired
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