CA1161973A - Level control of digital signals - Google Patents

Abstract

ABSTRACT
A digital level control for varying the level of a linearly digitally encoded analogue signal. The linear pcm signal is digitally filtered to pro-vide an external gain control via a digital multiplier of the pcm signal.
The arrangement may be time shared between a number of channels to provide control on a per call basis to compensate for variations which occur in the course of cabling, switching and maintenance of transmission signal quality.

Description

[ 1 1~1~73 M.~. Ginyell~lA
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t LEVEL CONTROL OF DIGITAL SIGNALS
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,,'~,! ; ' BACKGROUND OF THE INVENTION
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~his invention relates generally to the field of ~`~?, ' telephony and to mulkiplexed PCM signal transmission :- and communication and particularl~ to digital filter-.~ 5 ing or multiplexed linear digitally encoded analog .d signals to prov.ide selective digital transmission ~evel control. The invention also relates to level control of linear PCM signals in trunk and subscriber carrier systems and digital switching systems.
Present transmission equipment utilized in systems ~''t , having a plurality of analog signal inputs which are translated into digital data signals require separate ~: analog LC:oractive filters fox each input channel to : bandpass limit the input analog signals prior to the 15 ~ digital encoding thereof. More particularly~ chan-~: : nel-bank equipment at telephone local and central : ~ offices must maintain high quality signal transmission and a constant signal level for each call transmitted, : regardless of the switching path of the call~ To do : 20 so, compensation must be provided or cabling losses and losses in the channel-bank equipment in maintain-ing signal quality. Prior art systems having analog filters per channel are both costly and non-uniform in signal output, and cannot be time shared among ~5 channels as can the digital level control of the present . invention. In modern telephone transmission equipment, : . incoming analoy speech signal~ ar~ bandpass ~iltered, . converted to pulse code modulated ~PCM) signals according to a compxes~ed law~ and ~ransmitted onto a span line.
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M.J. Cirlgell~
~evis:ion On the receive side, compressed PCM sl~nals are expanded and converted back to analog speech si~nals. Appropria~e multiple~xing and demultiplexing of channels in such systems still requires the analog filters per channel.
While the present invention is not limited to any particular digital encoding fonmat, a specific embodiment particularly useful in telephone is disclosed in which the sig-nals which are level controlled are lin~ar PCM (LPCM) signals derived from input analog signals which have 10 been pulse density modulated (PDM) and then translated from PDM to LPCM signals, A PDM signal is comprised of a ~ode in which the instantaneous amplitude of an analog signal is represented by the ratio of logical 'l's and '0'~ in a ~inary signal~
such that the average number of pulses in a given period is proportional to the amplitude of the analog signal being encoded. An analog-to-digital converter of the P~M
type is described by U~K. Patent No. 1,450,989. A PCM
signal is derived by sampling an input at regular inter-vals, quantizing the samples into discrete steps and generating therefrom a code pattern of a series of pulses.
A code translation arrangement for converting a PDM signal to a PCM signal is described by U.K. Patent No. 1,436,878 in which patent the PCM signal is linear. A linear PCM
Code (LPCM) is one in which a linear relationship exists :
- between the digitally encoded analog input and the digital s output. When PCM signals are transmitted over a span line, they are usuall~ compressed, i.e. made nonlinear to reduce the quantity of data txansmitted and to obtain an efficient signal to noise ratio.
In telephone channel-bank equipmen~! low pass filter-ing is required to keep out of band signals from occurring as in-band modulation products due to sampling, which would otherwise result in "fold-back" tones in the channel. High pass filtering may be required to reduce the 50 or 60 Hz power supply in~luence prior to compressecl PCM conversion to eliminate the high quantizing noise, which is generated . .
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by the 50 or 60 llz signal causing excursions into the higher quantization segments. A commonly required standard in modern telephone transmission is : 20 db of 50 or 60 Hz rejection prior to PCM compression, which is obtained by high pass filtering.
Programmable low pass and high pass digital filters of the prior art are described by United States Patent Nos. 4,002,989 and 4,002,988 respectively, and a signal processor with digital filter is described by United States Patent No. 4,016,410.
According to the present invention there is provided a subscriber carrier system for a plurality of time multiplexed communications channels, each of said channels being capable of transmitting a plurality of n-bit digital words, having a digital level control for providing a selective gain or attenuation of said n-bit digital words, comprising: analog to digital conver-sion means for converting analog input signals in a communication channel into said n-bit digital words, such that said n-bit digital words are linaarly related to said analog input signals; digital filter means having said n-bit words serially coupled thereto for filtering said n-bit digital words and for digitally multiplying said n-bit words with weighting coefficients, wherein said digital filter means comprises: first digital filter means for low pass filtering said n-bit digital words; and second digital filter means for high pass filtering said n-bit digital words; digital level control means for varying at least some of said coefficients to maintain a predetermined trans-mission level of said n-bit digital words; multiplexing means for time multi-plexing said plurality of n-bit digital words from said plurality of communi-cations channels into a serial data stream; and means for coupling said time multiplexed data stream to said digital level control means such that said digital level control means is time shared by sa:id plurality o:E communication channels.

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- I le~73 According to another aspect of the invention~ there is provided a telephone trunk system ~or a plurality of time ; multiplexed communications channels, each o said channels being capable of transmitting a plurality of n-bit digital words, having a digital level control for providing a selective gain or attenuation of said n-bit digital words~ comprising: analog to digital conversion means for converting analog input signals in a communication channel into said n-bit digital words, such that said n-bit digltal words are linearly related to said analog input signals; digital filter means having said n-bit words serially coupled thereto for filtering said n-bit digital words and for digitally multiplying said n-bit words with weighting coefficients;
digital level control means for varying at least some of said coefficients to maintain a predetermined transmission level of said n-bit digital words; multiplexing means for time multiplexing said plurality of n-bit digital words from said plurality of communications channels into a serial data stream; and means for coupling said time multiplexed data stream to said digital level control means such that said digital level control means is time shared by said plurality of communications channels.
An embodiment of the invention will now be described with reference to the accompanying drawings in which:-Figure 1 is a block diagram of the transmit portion of atelephone trun]c carrier system in which a plurality of analog channels of data are multiplexed into a LPCM code for compression and transmission over a telephone span line, and which incorporates the digital level control of the present invention.

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vls;Lon Figure 2 is a b.1.ock di~yr~m o~ the receive porticn of a ~elephone ~runk carrier sy~tem in which an incoming mul~iplexed PCM sign~l is ~igitally level c~ntrolled, demultiplexed~ and converted to analog.
Figure 3 is a simplified block diagram of a digital level control in accordance with the present invention.
Figure 4 i5 a block and logic diagram of the digital level control described with reference to ~igures 1 and 3.
Figure 5 is a block and logic diagram of the digital level control described with reference to figures 2 and 3O
DESCRIPTION OF THE PREFERRÆD EMBODIMENTS
~ eferring now to Figure 1~ one transmit channel of a multiple channel telephone communications channel bank is illustrated, although the described invention is applicable to communications systems generally and in particular to such systems having multiplexed data channels. Analog signals are transformer coupled to pulse density modulator 10 via subscriber line 12, which signals are analog speech signals having a signal level e~fected by transmission line ~onditions as aforedescribed. Pulse density modulator 10 is described in detail by the aforementioned U.K. Patent No. 1,450,989 and converts the incoming analog signals on each of twenty-four channels to a 4.032 megabit/sec. PDM
data streamO The use o~ pulse density modulation is illustrative.only, since other linear digital modulation techniques may be utilized~ such as delta modulation. The PDM code for each channel is coupled via line 50 to a PDM
to LPCM converter 14, ~hich is described in detail by the aforementioned U.K. Patent No. 1,436,878. PDM to LPCM
, 30 ~converter includes a digital filter which suppresses high frequency noise and produces a filtered signal which is sampled to select every mth group of n pulses. Thus, at the output of converter 14~ the 4.032 Megabit/second PDM
data stream of l-bit woxds is converted to a linear pulse code modulated signal o~ 32 Kilowords/sec. of 14-bik words ~ on line 16 and which are time multiplexed with a plurality :~ of other channels ~rom other PDM to I,PCM converters (illus-:' tra~ively ~ix) to derive a multiplexed LPCM code on line ,,, ~`

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18 which is coupled to a digital multiplier 20, which comprises a digital lo-~pass filter and shift register circuit which is time shared illustratively with three other like digital multipliers coupled to line 22 at multiplexing gates 24, and the LPCM code on line 22 is coupled to high pass digital filter and level control circuit 28 and all twenty-four channels multiplexed thereon are time shared by high pass digital filter and level control circuit 28.
Digital multiplier 20 is described in detail in United Kingdom Patent No. 1,476,603 M.J. Gingell-13 however, generally, multiplier 20 serially receives a plurality of n-bit digital code groups; of total bit length eorres-pondlng to one serial data word period. The set of serial data words, inputted at a predetermined clock rate, is then multiplied in parallel, i.e., simul-taneously, by a corresponding set of fixed coefficients being derived for one of the n-bit serial inputs. The weighted parallel n-bit codes are then added to obtain an output which may be 32 Kilowords/sec. of 21-bit words. The output is at the same clock rate as is the input.
After multiplexing illustratively with three additional multiplexors at multiplexor gate 24, the LPCM data on line 22 becomes a 8-Kilowords/sec. of 21-bit words LPCM data stream. This data stream is then high pass filtered and digitally level controlled by a combined high pass digital filter and level control circuit 28. It is to be understood tha~ the high pass filtering and level control function are combined for design economy, and could be separate.
The digital level control 28 is a digital multiplier and filter arrangement similar to that of multiplier 20, with the difference that instead of a matrix of fixed coefficients by which incoming code groups are multiplied as in mul-tiplier 20, the coefficient matrix of level control 28 is variable and derived either from a memory or other data source, which may be remote from level control 28, and coupled thereto via line 26. The high pass filtering provides 50 or 60 Hz rejection for all of the twenty-four channels. ~nvelope delay equalization may also be provided. 'l~e level control coefficients, in the illus~rated embodiment,are stored 5a ~ I ~ t~ ~ ~
M~ Ginyetl:l 14 evi~i~n ~6-in a ROM and accessed to provicle selec~lve attenuation and/or gain o~ the digitally encoded 21-bit words to maintain a systemwide transmissi~n level control on a per call basis, as is needed fox inter~acing with a telephone network. ~s illustrated by Figuxe 4~ the level con-trol is an integral part o~ the high pass filter. Timing, synchronization and 4.032 M~z clock ; signals are derived in conventional manner from a ; timing circuit 30 on lines 32, 34 and 36 respectively lG ~or all channelsO
The digitally filtered and l~vel controlled linear , PCM signals on line 38 are coupled to a compression network 40, of the compandor type to convert the linear PCM to compressed PCM in a known manner to reduce the quantity of data transmitted, for example, by deriving CCITT Standard A-Law 8-bit PCM compressed from the 21-bit PCM, and coupling same at a 1.54 M~lz rate o~
span line 42 in accordance with a compression algorith~.
Such compression law is described in CCITT Recommendative G711 Green Book Vol. 3 1972.
Referring now to Figure 2, the receive portion of the telephone trun~ carrier system of Figure 1 is illustrated.
The i ~ oming compressed PCM on line 42 is expanded from 8-bit~Kw/sec. in A-law companding ko a 8 Xw/S 21 bit bytes in expander 44 in well known manner and coupled out on line 45 as linear PCM to level control 46 for selectable adjustment of gain and attenuation characteristics of the signal. Level control 46 is similar to level control 28 on the transmit side~ except that no high pass filte~
is included in this example. Level control data may be remotely coupled to level control 46 via line 48 from a data bus, processor, or memory. The 32 Kw/sec 21-bit PCM on line 50 is demultiplexed at demultiplexing gates 52 into four lines, each of which is 32 Kw/sec 21-bit LPCM having 6 channels multiplexed thereon and which is ¢oupled to a digital multiplier 54.
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5~ ~ g73 M.~. Glnyell-14 T~evision ~`~ -7-Digital multiplier 5~ may be of like design as multiplier 20 on the transmit side, by which the multiplexed channels ~ in the applied 21-bit data words are multiplied in parallel } by a weighted constant coefficient matrix o the add and shift type to derive a low pass filtered output on line 56, which is then demultiplexed into six single channels at demultiplexing gate 58, each of which 24 channels i5 ~` coupled to a digital-to-analog converter 60 to convert the 32 Kw/sec. 16-bit ~PC~ words on line 62 to an analog sig-nal. Digital to analog converter 60 is preferably of the type whereby the sampling rate of the digital input thereto is increased and the number of bits per sample is decreased~
A digital to analog converter of this type is described in detail by U.K. patent 1,444~216. The referenced D/A con-verter employs interpolation to decode using a small number of most significan~ bits of the increased rate sample.
Thus, by performing the D/A conversion at an increased rate and feeding back and filtering the least significant bits as an error signal, an accurate D/A conversion is obtained. Before conversion to analog, a PDM signal is derived having a means density proportional to the analog ! signal represented by the LPCM code groups, which signal may be 4.032 megawords/sec. of l~bit words. Operationally, the LPCM code groups are interpolated, quantized~ rate multiplied, pulse density modulated and low pass filtered to derive the analog signal on line 64. After amplifi-~; cation at amplifier 66 the analog signal is transformer 3l coupled to the subscriber lin~ 68 for the intended channel~
! Timing is provided in conventional manner by timing circuit 70, which provides a 4.032 MHz clock on line 72, synchron-ization on line 74 and other associated timing signals via lines 76 and 78 to the various digital circuits, which are preferably of integrated cixcuit MSI and LSI design.
Referring now to Figure 3, a simplified block diagram is shown, illustrative of the level control portlon o~
high pass ~ilter and level control 2B describ~d with re~erenoe to Figure 1. ~ny number of input channels 1 ., . ' .
. , g 7 3 through N may be time multiplexed at multiplexor 80, limited only by the speed of the technology to time share the digital level control 82, when coupled thereto via line 8~ as LPCM words. In the described embodiment, 8 kilowords/
sec, of 21-bit words x 24 channels are coupled thereto via line 84. The channels are operated on serially, each being multiplied in turn by its respec-tive gain factor.
The 21 bit words are multiplied by coefficients assigned on a per channel basis, either in software or hardware and each coefficient appears in turn, in parallel form, at lines 1 through M from memory 86, which may be a ROM, RAM, PROM or other memory having a control port 88 by which an external control of the gain settings may be obtained. In the illustrated embodiment, M is eleven, i.e. the gain coefficient is ll-bit wide. Thus, in the 21X13-bit multiplier, the level control varies 11 of 13 bits of the coefficient in accordance with external or stored control to effect a 0-db to 3-db level change prior to compression. Multiplex clocking and strobe pulses are pro-vided via lines 90 and 92 respectively. Each of the variable or alterable coefficients is preferably but not essentially representative of a number having a value less than two.
Referring now to Figure 4, a schematic of the combined high pass fil-ter and digital multiplier 28 of the transmit portion of the transmission equipment described with reference to Figure 1 is illustrated.
n~enty-four channels of 21-bit words at an 8Kw/sec. rate (4.032 MBPS) are multiplexed at the data input 100 and coupled to a 21-bit by 13-bit multiplier 102.
The multiplier has three inputs 103, 104, 105. Data entering these inputs is multiplied respectively by coefficients aO al and a2. Coefficients al and a2 are fixed but aO is variable and supplied by the 32 word x 11 bit 7 ~
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ROM 112. The address supplied to the ROM determines the value of aO selected.
The multiplier computes the result No aO ~ Nl al + N2 a2 where Nl N2 and N3 are the serial data words entering at 103, 104 and 105. The result at 109 is-.

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1161g73 M. ;J. C~ing~
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passed in turn ~o two serial Ghi~t r~gis~exs 1~6 and 107 each o~ which are 21 bits x 24 channels long.
The outputs from these shi~ registers feed ~ack to the multiplier 102.
The signal output is ~ormed by adding the multiplier serial output word at 109 together with the serial word just leaving shift register 107 minus twice the word leaving register 106.
r The resultant digital ~filter has the tran~fer function G~Z) = aO ( - ~ -1 alZ _ a2z 23 where Z = eiWt = ~os wT ~ j Sin wt w -- 2~f T = l/:E5 is input signal frequency fs is sampling frequency (8klrZ in this case) With suitable choice for the values of al and a2 this becomes a high pass filter response with gain proportional to the value of aO.
As the data for each of the 24 channels passes in turn through the multiplier a different value of aO can _ be selected ~romf for examplef a RAM which contain 24 dif~erent addresses, one for each channel. The RAM can be addressed by a counter 111 which cycles through from 1 to 24 in synchronism with the channels passing through 25 ~ the multiplier.
~ eferring now to Fig. 2 which shows the receîve portion a le~el control 46 without the high pass is shown after the expander.
The level control is shown in more detail in Fig. 5.
The operation is substantially the same as the high pass ,~_- ~iIter without the additional inputs al and a2 and the ~ shift register.
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-- ~ nevi.siOn Time division multiplexed data enters the inpuk 200 of the multiplier 201 where it is multiplied by the coefficient aO selected ~rom ~he ROM 20~ by the addre.ss~
in this instance~ from a RAM 203.
JPM/mmg . . Date: October 23, 1978 i .i . ,' ' ~
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Claims (9)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A subscriber carrier system for a plurality of time multiplexed communications channels, each of said channels being capable of transmitting a plurality of n-bit digital words, having a digital level control for provid-ing a selective gain of attenuation of said n-bit digital words, comprising:
analog to digital conversion means for converting analog input sig-nals in a communication channel into said n-bit digital words, such that said n-bit digital words are linearly related to said analog input signals;
digital filter means having said n-bit words serially coupled thereto for filtering said n-bit digital words and for digitally multiplying said n-bit words with weighting coefficients, wherein said digital filter means com-prises:
first digital filter means for low pass filtering said n-bit digital words; and second digital filter means for high pass filtering said n-bit digital words;
digital level control means for varying at least some of said co-efficients to maintain a predetermined transmission level of said n-bit digital words;
multiplexing means; for time multiplexing said plurality of n-bit digital words from said plurality of communications channels into a serial data stream; and means for coupling said time multiplexed data stream to said digital level control means such that said digital level control means is time shared by said plurality of communication channels.

2. A subscriber system in accordance with claim 1, wherein said high pass filter means includes means for serially receiving said low pass filter-ed n-bit digital words and for digitally multiplying said digital words in parallel with weighting coefficients, at least some of which weighting co-efficients are fixed and some of which weighting coefficients are variable;
and control means for varying said variable coefficients to effect a pre-determined gain or attenuation of said n-bit digital words.

3. A subscriber system in accordance with claim 2, wherein said control means includes: a matrix of said weighting coefficients; memory means associa-ted with said matrix for varying said variable coefficients in accordance with information stored in said memory.

4. A subscriber system in accordance with claim 3, wherein said control means includes means for addressing said memory means to select said variable coefficients.

5. A subscriber carrier system, in accordance with claim 4, wherein said analog to digital conversion means includes: means for converting said analog input signals into a pulse density modulated code; and means for converting said pulse density modulated code into said n-bit digital words.

6. A subscriber carrier system in accordance with claim 5, further com-prising: pulse compression means for translating said n-bit digital words multiplied by said weighting coefficients into compressed PCM; and means for transmitting said compressed PCM onto a transmission line.

7. A subscriber carrier system, in accordance with claim 6 further com-prising: receiving means for receiving said compressed PCM from said transmis-sion line, said receiving means comprising: means for converting said compres-sed PCM to linear PCM n-bit words; digital level control means for selectively and controllably weighting at least some of the data bits of said n-bit words, and having an output; demultiplexing means for deriving a plurality of digital data channels from said output of said digital level control means; and digital to analog conversion means for convert-ing said demultiplexed data in each of said data channels into analog signals.

8. A subscriber carrier system in accordance with claim 7 wherein said digital to analog conversion means includes: means for converting said linear PCM n-bit words into a pulse density modulated code; and means for converting said pulse density modulated code into said analog signals.

9. A telephone trunk system for a plurality of time multi-plexed communications channels, each of said channels being capable of transmitting a plurality of n-bit digital words, having a digital level control for providing a selective gain or attenuation of said n-bit digital words, comprising:
analog to digital conversion means for converting analog input signals in a communication channel into said n-bit digital words, such that said n-bit digital words are linearly related to said analog input signals;
digital filter means having said n-bit words serially coupled thereto for filtering said n-bit digital words and for digitally multiplying said n-bit words with weighting coefficients;
digital level control means for varying at least some of said coefficients to maintain a predetermined transmission level of said n-bit digital words;
multiplexing means for time multiplexing said plurality of n-bit digital words from said plurality of communications channels into a serial data stream; and means for coupling said time multiplexed data stream to said digital level control means such that said digital level control means is time shared by said plurality of communications channels.