CA1145423A - Chip capacitor for compliance soldering - Google Patents
Chip capacitor for compliance solderingInfo
- Publication number
- CA1145423A CA1145423A CA000338300A CA338300A CA1145423A CA 1145423 A CA1145423 A CA 1145423A CA 000338300 A CA000338300 A CA 000338300A CA 338300 A CA338300 A CA 338300A CA 1145423 A CA1145423 A CA 1145423A
- Authority
- CA
- Canada
- Prior art keywords
- electrodes
- capacitor
- portions
- ceramic
- support means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 84
- 238000005476 soldering Methods 0.000 title abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 7
- 239000000919 ceramic Substances 0.000 claims description 21
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000007373 indentation Methods 0.000 claims 4
- 239000003985 ceramic capacitor Substances 0.000 claims 3
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 239000011800 void material Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 abstract description 14
- 230000035939 shock Effects 0.000 abstract description 4
- 230000006835 compression Effects 0.000 description 5
- 238000007906 compression Methods 0.000 description 5
- 239000011324 bead Substances 0.000 description 4
- 238000009740 moulding (composite fabrication) Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
- H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
- H01G2/065—Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Chip Capacitor for Compliance Soldering ABSTRACT OF THE DISCLOSURE
The present invention is directed to a monolithic capacitor adapted to be secured to a substrate by reflow soldering methods, characterized by the configuration of the capacitor causing the solder to form a compliant mechanical bond between the capacitor terminations and underlying sub-strate, whereby the likelihood of capacitor failure due to termal or mechanical shock is greatly reduced. The invention further relates to a mothed of making a capacitor of the type described.
The present invention is directed to a monolithic capacitor adapted to be secured to a substrate by reflow soldering methods, characterized by the configuration of the capacitor causing the solder to form a compliant mechanical bond between the capacitor terminations and underlying sub-strate, whereby the likelihood of capacitor failure due to termal or mechanical shock is greatly reduced. The invention further relates to a mothed of making a capacitor of the type described.
Description
~1L45~3 Background of the In~ention Field of the Invention The present invention is in the field of mono-lithic chip capacitors, especially chip capacitors adapted to be connected directly to circuit boards as opposed to capacitors having flexible leads extending therefrom.
The Prior Art .
Curren~ electronic de~ices are making progressively increasing use of chip capacitors because of their compactness ænd inherent reliability.
In accordance with a conventional means for employing such capacitors, the same are provided with two or more termina-tion portions at their end edges and are mounted directly to a substrate o~ alumina or epoxy-filled ~iberglass carrying conduc-tive lands on the surf&ce thereof. Reflow solder connectîons are -: . ~ ,, ~45~Z3 effected between the capacitors and the lands, the terminations being in diract contact with the lands. The solder provides both electrical and mechanical connections of the a.rticle to the sub-strate.
In the course of soldering, and in many instances in use, the device incorporating the circuit board and capa.citors are subjected to thermal excursions.
Due to the differential coef~icients of expa.nsion of the various connected materials and due further to ~he relative fragility of the capacitors, particularly at the interface be-tween the termination and the capacitor electrodes, a relatively high incidence of capacitor failure has been experienced despite the inherent reliability of the capacitor device. In order to obviate such failure, attempts have been made to introduce a com-pliant connection at the interface between the capacitor termina-~ tion and circuit board, such that the differential shrinkage and ; expansion of the components will not exert undue stresses on the fragile elements of the device but, rather, will be absorbed by~
flexure of the compliant connector. ~ ::
~ 20 While the utiliza:tion of such compliant connectors :~ provides a capacitor having an extremely high degree of reliabil-:
: ity, the application of the compliance member, such as a tab, or~
the like has added a significa.nt element of cost increase by vir~-tue of the presence of an additiona.l part, together with the operations necessary to the applying of the part.
An additiona.l loss in reliability of the capacitor is occasioned by the presence of voids in the area between the , : . .
... . :
~454Z3 capacitor electrodes and oppo~ing termination. Such voids ha~e been determined to be present in the capacitor body, in part as a result of the fact that the electrodes between the dielectric layers are o~ ~inite thickness. ~hus, when a unlt o~ compres-si~e force is applied, utilizing conventional techniques, across the opposed surfaces o~ the capacitor, grea*er pressures are developed in the areas of greatest thickness, e.g., the central area in registry with overlapped electrodes of opposite polar-ity, than in the margina} areas wherein no overlapping of the electrodes occurs. As a result of insufficient compression of the marginal areas, weak spots or voids are present extending ~rom the end of the electrodes terminating short of the end of the capacitor to the termination material at the end of the capacitor, resulting in a capacitor susceptible to voltage breakdown and/or degradat~on of insulation resistance, with consequent changes in value.
Summary Or the Invention The present invention may be summarized as directed to an improved monolithic chip capacitor wherein the reflow soldering step utillzed to connect the capacitor to the substrate provides a degree of compliance sufficient to render the capacitor highly resistant to damage under the influence of thermal shock, whether such shock is experienced in the application of the capac~tor to the substrate or in the subsequent utilization of the device incorporating the capacitor.
More partlcularly, the invention is directed to an impro~ed capacitor o~ the type described characterized in that the bottom or substrate-adjacent surface thereof includes an 3L1~5~23 integral depending support portion or portions which, when disposed against the board, lift the lateral termination ends of the capacitor incorporating the terminations a distance of from about 5 to 10 mils or more from the surface of the substrate.
When the termina.tion portions of a-capacitor as described are attached as by reflow soldering to the substrate, there is formed a vertical solder bead which, by virtue of the fact that the termination portions are spaced from the conductive lands carried by the substrate, enables the solder bead to a.ct as a compliant column or pillar, permitting compensation for dissimilar thermal elongation cha.racteristics of the ca.pacitor and the substrate to be absorbed by flexure of the column. The : compliance of the elongated solder column formed by lifting the termination aboYe the level of the substrate thus prevents ~`~
fracture, for exam~le, in the connection between the termination portions and the end edges of the electrodes.
The specific means for separating the termination : areas of the capacitor from the surface of the land may take various forms. In accordance with a preferred embodiment, a 20 : central platform of ceramic may bQ integrally molded on the , : :
bottom surface of the capacitor, which platform is of a height to lift the conductive terminations above the levels of the con- :
ductive lands on a substrate or circuit board when the plat~orm~
abuts the board~ The support means preferably is spaced inward- :
ly from the ends of the capacitor to which the termination ma~
terial is applied, a suffic~ient distance to assure that the re-flow soldering results in the formation of a vold in the area 5~23 between the conductive land and the support means, to avold com-promising the compl~ant characteristics of the solder bead.
In accordance with a further embodiment of the inven-tion, the support may comprise two or more ridges on the under-sur~ace of the capacitor which function in the same manner as the platform described above.
The invention will be illustratively described in conjunction with a simple capacitor device having two termina-tion portions, with multiple in~ernal electrodes.
In accordance with the preferred embodiment as des-cribed above, the support means is formed by compressing the marginal edges of the green ceramic of which the capacitor is formed~ prior to firing~ to a greater degree than the central ~ .
portion thereof, whereby there is derined below the bottom surface of the capacitor a depending platform or ledge, the noted practice having the additional advantage o~ compreseing the marginal areas between electrodes and termination to exclude the possibility of weak~spots or ~oids in such areas.
Accordingly, it is an ob3ect of the invention to provide an improved monolithic chip capacitor whereby a reflow solder-formed connection between the capacitor and a substrate will inherently possess a degree of compliance sufficient to preclude damage to the capacitor or to the connection between the capacitor and substrate, due to dif~erentlal tbermal co-efficients of expansion of the capacitor and the substrate~
: `
A further object of the invention is the provision of an improved capacitor wherein the solder connection ~ormed between the capacitor and substrate possesses a high degree of compliance.
Still a ~urther object of the invention is the pro-vision of a capaci~or of the type clescribed having a cost of production not materially different from conventional capacitors of the same type.
Still a further object of the invention is the pro-vision of capacitors of the type described having increased resistance to the for~ation of weak spots or voids in the margin areas adjacent the capacitor terminations.
Still a further object of the invention is the pro-vision of methods of manufacturing a capacitor of the type ~ ~
described. ~ -To attain these objects and such further obaects as may appear herein or be hereinafter pointed out, reference is made to the accompanying drawings, forming a part hereof, in which:
Figure 1 is a diagrammatic side elevational view o~
a capacitor in accordance with the invention applied to a sub-s~rate;
Figure 2 is a perspective view of the under surfacè
of the capacitor of Figure l;
Figure 3 is a disgrammatic isometric view of a form-ing die for fabrication of a capacitor in accordance with the lnvention;
..
~9;5~L23 Figure 4 is a diagrammatic isometric view of the partially formed capacitor;
Figure 5 is a perspective view of a capacitor in ac-cordance with a further embodiment of the invention, Turning now to the drawings, there is shown in Figure l a monolithic chip capacitor lO secured to an insulating substrate ll. Typically, the substrate may comprise alumina or epoxy filled glass fiber, both Of which materials have coefficie~ts of thermal expansion differing from the thermal coefficient of expansion of the capacitor. It should be recognized that the capacitor itself is comprised Of a plurality of layers of ceramic materials which are subject to fracture or separation should the capacitor be exposed to undue compressive or expan-sive stresses. Such stresses are present if, as is typical, the conductive capacitor termination formed at the marginal ends o~ the capacitor is secured directly against the conductive land formed on the substrate, locking the capacitor against substan-tial movement relative~to the substrate.
It will be appreciated that upon cooling of the com~
~;20 ponents after a solder bead has been formed, compressive or ex-pansive forces are inevitably developed, resulting from the differential thermal expansion factors. ~ ;
In accordance with the present invention, the effects of such stresses and, to a degree, mechanical shocks are miti-gated so as to avoid compromise of the capacitor or its connec-tion to the substrate by the provision of support means~ e.g.
the platform 12 disclosed in the preferred embodiment of Figures 1 7 ~
- ~
54~3 to 4, or the ridges 13 a.s disclosed in the embodlment of Figurè 5, which space the under surfa.ce 14 of the bottom of the capacitOr a dista.nce D from the substrate 11 of from about 5 to 1~ or more mils from the upper sur~ace 15 o~ the substrate., to ensure that a substantial expanse or vertical column 16 of solder will exis~ between the termination portions 17, 17 of the capa-citor and the substrate.
By the expedient of providing integral support means on the ceramic body which, while unconnected to the substrate lift the termination portions the aforesaid dista.nce above the substrate, there is assured the provision of a solder connection of su~ficient length to provide a relatively high compliance con~
nection between the ca.pacLtor and the conductive lands 18 of the ; ~ -substrate such as to cause mechanically generated stresses to be ~:
absorbed or compensated within the solder body rather than be~
ing transmitted to the capacitor at sufficiently high levels to cause capacitor ~ailure or cha.nge ln value.
~: It will be observed tha~ the compliance effect com~
; pensates both Ior relative extension and contraction of the subs~rate and capacLtor.
Referring now to Figure 3, there is diagrammatically~disclosed a method of ~orming the capacitor of Figures 1 and 2.
As is conventional~ the capacitor is comprised of a series of ~ ;~
ceramic layers 1 defining the dielectric components of the capa.citor and the encapsulation thereof.
Between the~layers L there are formed the electrodes E, Et, which electrodes~ althOugh formed as by screening of : `~
- 8 ~
~ ~ .
~45~2~
metal onto an associated ceramic layer, are of finite thickness.
The electrodes of one polarity, e.g. the electrodes E, run from marginal end 19 longitudinally, terminating at a position short of the opposite marginal end 20 of the capa.citor. In similar fashion, the electrodes E' of opposite polarity begin at a posi-tion coextensive with the marginal end 20 and terminate short of the opposite marginal end 19.
As will be readily recognized from the above described essentially conventional construction, by virtue of the finite, albeit small, thickness o~ the electrodes E, E', a series of voids V may exist in the areas between the ma.rginal end 20 and the electrodes E, and between the ma.rginai end 19 and the elec-trodes E'. In order to provide both the support-spacer means 12 shown in the capacitor of Figures 1 and 2, and a.lso to elimln-ate the voids which constitute areas of incipient capacitor failure, there is provided a die member or die construction which compresses the marginal portions M (being the portions ; where there is no overlap of electrodes of opposite polarity) ~: a greater degree than the central area wherein the opposite ~ ; 20 polarity electrodes overlap.
:~ . The die member, which has been diagrammatically il- :
lustrated may include a flat top pla.te 21 a.nd a ba.se plate 22 recessed as at 23 in the area in registry with the overlapping portions of opposite polarity electrodes. I~hen the die member ;
is closed, the green ceramic in the marginal portions as above defined will be compressed to a greater extent than, or at lea.st to an extent equal to, the compression applied to the central area resulting in a concomitant compression 0nd consequent elimination~
_ g -~S~Z3 of voids in registry with the marginal portions.
The de~ice a.t the same time forms the desired plat-~rm 12 which~ as noted above, wil:L function to space the sub-sequently formed end termination portions 17 a dista,nce above the level o~ the substrate when the capacitor is soldered to a circuit board or the like~ The method of forming the capacitor is thus functionally distinguished from conventiona.l manufa.c-turing processes wherein the entirety of the surfaces are com-pressed between flat platens, resulting in greater pressures in the area in reg~stry with the overlapping electrodes than in the thinner ma.rg~nal areas.
There is illustrated in Figure 4 a capacitor sub-assembly as removed from the die members 21, 22, illustrating the effects of additional compression in the margin areas and consequent elimination of the voids.
As will be understood by those skilled in the art, the ceramic member illustrated in Figure 4 will be fired, fol- ~
lowing which termination portions 17 will be applied, provid- :
: ing means for connecting electrodes of opposite polarity into the circuit.
In accordance with a, variation of the manufacturing procedure, the die portion 22 employed as the means of forming the under surface of the capacitor may incorporate a yieldablc e-astomeric layer on the surface engaging the green ceramic~ :
The resilience of the ela.stomeric layer will automatically ef-fect the desired additiona,l compression of the marginal portions, the total thickness of which marginal portions~ by virtue of :::
~5423 the absence of overlapping electrodes of opposite polarity, will, after compression3 be less tha.n the thickness of the central area whereat the electrodes overlap.
It will be understood that the die 22 may utilize one or both of the expedients of recess and the resilient layer.
It is further possible, where the composite addition~
al thic~ness of the overlapping electrodes is sufficiently great, to rely upon such addit~onal thickness in combination with a~
elastomeric die member to a.chieve the desired platform portion.
10As will be evident to those skilled in the art in the light of the instant disclosure, numerous varia.tions may be made in the concepts hereinabove set forth without depa.rt-~ng from the spirit of the invention. For instance, the con-figuration and number of ridges, steps or like support mea.ns employed on the under surface o~ the capacitor are not critical so long as the same satisfy the function of lifting the marginal ::- terminal edges o~ the capacitor to assure the existence of a sub~
:~ stantial span of solder between the termination ond the sub~
stra.te. m e support means are preferably spaced inwardly a:
20~ distance from the marginal edges to a.ssure that the solder does ;: :~
not ~low into the entire space between the land and the support:
portion, in which case there would be increased possibility of ::: :
, ~ , transmitting greater stresses to the capacitor.
Accordingly, the invention is to be broadly construed ::
within the scope of tbe appended claims.
::: :~
The Prior Art .
Curren~ electronic de~ices are making progressively increasing use of chip capacitors because of their compactness ænd inherent reliability.
In accordance with a conventional means for employing such capacitors, the same are provided with two or more termina-tion portions at their end edges and are mounted directly to a substrate o~ alumina or epoxy-filled ~iberglass carrying conduc-tive lands on the surf&ce thereof. Reflow solder connectîons are -: . ~ ,, ~45~Z3 effected between the capacitors and the lands, the terminations being in diract contact with the lands. The solder provides both electrical and mechanical connections of the a.rticle to the sub-strate.
In the course of soldering, and in many instances in use, the device incorporating the circuit board and capa.citors are subjected to thermal excursions.
Due to the differential coef~icients of expa.nsion of the various connected materials and due further to ~he relative fragility of the capacitors, particularly at the interface be-tween the termination and the capacitor electrodes, a relatively high incidence of capacitor failure has been experienced despite the inherent reliability of the capacitor device. In order to obviate such failure, attempts have been made to introduce a com-pliant connection at the interface between the capacitor termina-~ tion and circuit board, such that the differential shrinkage and ; expansion of the components will not exert undue stresses on the fragile elements of the device but, rather, will be absorbed by~
flexure of the compliant connector. ~ ::
~ 20 While the utiliza:tion of such compliant connectors :~ provides a capacitor having an extremely high degree of reliabil-:
: ity, the application of the compliance member, such as a tab, or~
the like has added a significa.nt element of cost increase by vir~-tue of the presence of an additiona.l part, together with the operations necessary to the applying of the part.
An additiona.l loss in reliability of the capacitor is occasioned by the presence of voids in the area between the , : . .
... . :
~454Z3 capacitor electrodes and oppo~ing termination. Such voids ha~e been determined to be present in the capacitor body, in part as a result of the fact that the electrodes between the dielectric layers are o~ ~inite thickness. ~hus, when a unlt o~ compres-si~e force is applied, utilizing conventional techniques, across the opposed surfaces o~ the capacitor, grea*er pressures are developed in the areas of greatest thickness, e.g., the central area in registry with overlapped electrodes of opposite polar-ity, than in the margina} areas wherein no overlapping of the electrodes occurs. As a result of insufficient compression of the marginal areas, weak spots or voids are present extending ~rom the end of the electrodes terminating short of the end of the capacitor to the termination material at the end of the capacitor, resulting in a capacitor susceptible to voltage breakdown and/or degradat~on of insulation resistance, with consequent changes in value.
Summary Or the Invention The present invention may be summarized as directed to an improved monolithic chip capacitor wherein the reflow soldering step utillzed to connect the capacitor to the substrate provides a degree of compliance sufficient to render the capacitor highly resistant to damage under the influence of thermal shock, whether such shock is experienced in the application of the capac~tor to the substrate or in the subsequent utilization of the device incorporating the capacitor.
More partlcularly, the invention is directed to an impro~ed capacitor o~ the type described characterized in that the bottom or substrate-adjacent surface thereof includes an 3L1~5~23 integral depending support portion or portions which, when disposed against the board, lift the lateral termination ends of the capacitor incorporating the terminations a distance of from about 5 to 10 mils or more from the surface of the substrate.
When the termina.tion portions of a-capacitor as described are attached as by reflow soldering to the substrate, there is formed a vertical solder bead which, by virtue of the fact that the termination portions are spaced from the conductive lands carried by the substrate, enables the solder bead to a.ct as a compliant column or pillar, permitting compensation for dissimilar thermal elongation cha.racteristics of the ca.pacitor and the substrate to be absorbed by flexure of the column. The : compliance of the elongated solder column formed by lifting the termination aboYe the level of the substrate thus prevents ~`~
fracture, for exam~le, in the connection between the termination portions and the end edges of the electrodes.
The specific means for separating the termination : areas of the capacitor from the surface of the land may take various forms. In accordance with a preferred embodiment, a 20 : central platform of ceramic may bQ integrally molded on the , : :
bottom surface of the capacitor, which platform is of a height to lift the conductive terminations above the levels of the con- :
ductive lands on a substrate or circuit board when the plat~orm~
abuts the board~ The support means preferably is spaced inward- :
ly from the ends of the capacitor to which the termination ma~
terial is applied, a suffic~ient distance to assure that the re-flow soldering results in the formation of a vold in the area 5~23 between the conductive land and the support means, to avold com-promising the compl~ant characteristics of the solder bead.
In accordance with a further embodiment of the inven-tion, the support may comprise two or more ridges on the under-sur~ace of the capacitor which function in the same manner as the platform described above.
The invention will be illustratively described in conjunction with a simple capacitor device having two termina-tion portions, with multiple in~ernal electrodes.
In accordance with the preferred embodiment as des-cribed above, the support means is formed by compressing the marginal edges of the green ceramic of which the capacitor is formed~ prior to firing~ to a greater degree than the central ~ .
portion thereof, whereby there is derined below the bottom surface of the capacitor a depending platform or ledge, the noted practice having the additional advantage o~ compreseing the marginal areas between electrodes and termination to exclude the possibility of weak~spots or ~oids in such areas.
Accordingly, it is an ob3ect of the invention to provide an improved monolithic chip capacitor whereby a reflow solder-formed connection between the capacitor and a substrate will inherently possess a degree of compliance sufficient to preclude damage to the capacitor or to the connection between the capacitor and substrate, due to dif~erentlal tbermal co-efficients of expansion of the capacitor and the substrate~
: `
A further object of the invention is the provision of an improved capacitor wherein the solder connection ~ormed between the capacitor and substrate possesses a high degree of compliance.
Still a ~urther object of the invention is the pro-vision of a capaci~or of the type clescribed having a cost of production not materially different from conventional capacitors of the same type.
Still a further object of the invention is the pro-vision of capacitors of the type described having increased resistance to the for~ation of weak spots or voids in the margin areas adjacent the capacitor terminations.
Still a further object of the invention is the pro-vision of methods of manufacturing a capacitor of the type ~ ~
described. ~ -To attain these objects and such further obaects as may appear herein or be hereinafter pointed out, reference is made to the accompanying drawings, forming a part hereof, in which:
Figure 1 is a diagrammatic side elevational view o~
a capacitor in accordance with the invention applied to a sub-s~rate;
Figure 2 is a perspective view of the under surfacè
of the capacitor of Figure l;
Figure 3 is a disgrammatic isometric view of a form-ing die for fabrication of a capacitor in accordance with the lnvention;
..
~9;5~L23 Figure 4 is a diagrammatic isometric view of the partially formed capacitor;
Figure 5 is a perspective view of a capacitor in ac-cordance with a further embodiment of the invention, Turning now to the drawings, there is shown in Figure l a monolithic chip capacitor lO secured to an insulating substrate ll. Typically, the substrate may comprise alumina or epoxy filled glass fiber, both Of which materials have coefficie~ts of thermal expansion differing from the thermal coefficient of expansion of the capacitor. It should be recognized that the capacitor itself is comprised Of a plurality of layers of ceramic materials which are subject to fracture or separation should the capacitor be exposed to undue compressive or expan-sive stresses. Such stresses are present if, as is typical, the conductive capacitor termination formed at the marginal ends o~ the capacitor is secured directly against the conductive land formed on the substrate, locking the capacitor against substan-tial movement relative~to the substrate.
It will be appreciated that upon cooling of the com~
~;20 ponents after a solder bead has been formed, compressive or ex-pansive forces are inevitably developed, resulting from the differential thermal expansion factors. ~ ;
In accordance with the present invention, the effects of such stresses and, to a degree, mechanical shocks are miti-gated so as to avoid compromise of the capacitor or its connec-tion to the substrate by the provision of support means~ e.g.
the platform 12 disclosed in the preferred embodiment of Figures 1 7 ~
- ~
54~3 to 4, or the ridges 13 a.s disclosed in the embodlment of Figurè 5, which space the under surfa.ce 14 of the bottom of the capacitOr a dista.nce D from the substrate 11 of from about 5 to 1~ or more mils from the upper sur~ace 15 o~ the substrate., to ensure that a substantial expanse or vertical column 16 of solder will exis~ between the termination portions 17, 17 of the capa-citor and the substrate.
By the expedient of providing integral support means on the ceramic body which, while unconnected to the substrate lift the termination portions the aforesaid dista.nce above the substrate, there is assured the provision of a solder connection of su~ficient length to provide a relatively high compliance con~
nection between the ca.pacLtor and the conductive lands 18 of the ; ~ -substrate such as to cause mechanically generated stresses to be ~:
absorbed or compensated within the solder body rather than be~
ing transmitted to the capacitor at sufficiently high levels to cause capacitor ~ailure or cha.nge ln value.
~: It will be observed tha~ the compliance effect com~
; pensates both Ior relative extension and contraction of the subs~rate and capacLtor.
Referring now to Figure 3, there is diagrammatically~disclosed a method of ~orming the capacitor of Figures 1 and 2.
As is conventional~ the capacitor is comprised of a series of ~ ;~
ceramic layers 1 defining the dielectric components of the capa.citor and the encapsulation thereof.
Between the~layers L there are formed the electrodes E, Et, which electrodes~ althOugh formed as by screening of : `~
- 8 ~
~ ~ .
~45~2~
metal onto an associated ceramic layer, are of finite thickness.
The electrodes of one polarity, e.g. the electrodes E, run from marginal end 19 longitudinally, terminating at a position short of the opposite marginal end 20 of the capa.citor. In similar fashion, the electrodes E' of opposite polarity begin at a posi-tion coextensive with the marginal end 20 and terminate short of the opposite marginal end 19.
As will be readily recognized from the above described essentially conventional construction, by virtue of the finite, albeit small, thickness o~ the electrodes E, E', a series of voids V may exist in the areas between the ma.rginal end 20 and the electrodes E, and between the ma.rginai end 19 and the elec-trodes E'. In order to provide both the support-spacer means 12 shown in the capacitor of Figures 1 and 2, and a.lso to elimln-ate the voids which constitute areas of incipient capacitor failure, there is provided a die member or die construction which compresses the marginal portions M (being the portions ; where there is no overlap of electrodes of opposite polarity) ~: a greater degree than the central area wherein the opposite ~ ; 20 polarity electrodes overlap.
:~ . The die member, which has been diagrammatically il- :
lustrated may include a flat top pla.te 21 a.nd a ba.se plate 22 recessed as at 23 in the area in registry with the overlapping portions of opposite polarity electrodes. I~hen the die member ;
is closed, the green ceramic in the marginal portions as above defined will be compressed to a greater extent than, or at lea.st to an extent equal to, the compression applied to the central area resulting in a concomitant compression 0nd consequent elimination~
_ g -~S~Z3 of voids in registry with the marginal portions.
The de~ice a.t the same time forms the desired plat-~rm 12 which~ as noted above, wil:L function to space the sub-sequently formed end termination portions 17 a dista,nce above the level o~ the substrate when the capacitor is soldered to a circuit board or the like~ The method of forming the capacitor is thus functionally distinguished from conventiona.l manufa.c-turing processes wherein the entirety of the surfaces are com-pressed between flat platens, resulting in greater pressures in the area in reg~stry with the overlapping electrodes than in the thinner ma.rg~nal areas.
There is illustrated in Figure 4 a capacitor sub-assembly as removed from the die members 21, 22, illustrating the effects of additional compression in the margin areas and consequent elimination of the voids.
As will be understood by those skilled in the art, the ceramic member illustrated in Figure 4 will be fired, fol- ~
lowing which termination portions 17 will be applied, provid- :
: ing means for connecting electrodes of opposite polarity into the circuit.
In accordance with a, variation of the manufacturing procedure, the die portion 22 employed as the means of forming the under surface of the capacitor may incorporate a yieldablc e-astomeric layer on the surface engaging the green ceramic~ :
The resilience of the ela.stomeric layer will automatically ef-fect the desired additiona,l compression of the marginal portions, the total thickness of which marginal portions~ by virtue of :::
~5423 the absence of overlapping electrodes of opposite polarity, will, after compression3 be less tha.n the thickness of the central area whereat the electrodes overlap.
It will be understood that the die 22 may utilize one or both of the expedients of recess and the resilient layer.
It is further possible, where the composite addition~
al thic~ness of the overlapping electrodes is sufficiently great, to rely upon such addit~onal thickness in combination with a~
elastomeric die member to a.chieve the desired platform portion.
10As will be evident to those skilled in the art in the light of the instant disclosure, numerous varia.tions may be made in the concepts hereinabove set forth without depa.rt-~ng from the spirit of the invention. For instance, the con-figuration and number of ridges, steps or like support mea.ns employed on the under surface o~ the capacitor are not critical so long as the same satisfy the function of lifting the marginal ::- terminal edges o~ the capacitor to assure the existence of a sub~
:~ stantial span of solder between the termination ond the sub~
stra.te. m e support means are preferably spaced inwardly a:
20~ distance from the marginal edges to a.ssure that the solder does ;: :~
not ~low into the entire space between the land and the support:
portion, in which case there would be increased possibility of ::: :
, ~ , transmitting greater stresses to the capacitor.
Accordingly, the invention is to be broadly construed ::
within the scope of tbe appended claims.
::: :~
Claims (7)
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. In a monolithic ceramic capacitor device comprising a ceramic body portion including a bottom surface adapted to abut a substrate carrying conductive lands, said device including internal electrodes and first and second rigid conductive termination portions at opposed ends of said body portion in electrical contact with said electrodes and inflexibly bonded thereto, said termination portions defining the sole output leads of said capacitor device, the improvement which comprises support means formed integrally with said ceramic body, said support means depending from said bottom surface a distance from about 5 to 10 mils, said support means being spaced inwardly along said bottom surface from said opposed ends having said termination portions and extending below said termination portions whereby, when said support means is engaged against said substrate, there is defined a void area between said substrate and said termination portions.
2. Apparatus in accordance with claim 1 wherein said support means comprises a central platform extending transversely of said capacitor device.
3. A device in accordance with claim 1 wherein said support means comprises a plurality of integral ceramic ridge portions extending parallel to each other and to said opposed ends of said body portion.
4. Apparatus in accordance with claim 1 or 2 wherein the spacing of said support means from said ends constitutes at least about 20% of the distance between said ends.
12 ?5. A method of manufacturing a monolithic ceramic capacitor device which includes a central area having internal partially overlapping electrodes of opposite polarity contained in a ceramic body forming a dielectric separator for said electrodes, said electrodes including outer end portions disposed at opposite ends of said body in contact with termination portions, said capacitor including a margin portion between said central area and each of said termination portions, said capacitor including a bottom surface for positioning adjacent a substrate, comprising the steps of:
aligning the outer end portions of first ones of said electrodes to define a first coextensive end at one end of the ceramic body, each of said first electrodes terminating short of the other end of the ceramic body;
aligning the outer end portions of second ones of said electrodes to define a second coextensive end at the opposite end of the ceramic body, said second electrodes interposing between said first electrodes, each of said second electrodes terminating short of the first coextensive end at the one end of the ceramic body;
interposing layers of ceramic between each of said first and second electrodes, thereby defining a series of aligned spaces inward of each of the opposed coextensive ends in the respective margin portions, the arrangement of said electrodes and ceramic layers forming a capacitor sub-assembly;
applying to said sub-assembly compressive forces exerted in a direction normal to the orientation of said electrodes to deform selective ones of said electrodes and ceramic layers into said spaces and to form indentations in said bottom surface, said indentations being in registry with the margin portions and extend-ing to said ends, whereby a portion of said bottom surface between said indentations is at a level below the level of said indenta-tions; and completing the cure of said ceramic body, and applying conductive coating at the opposed ends to form said termination portions.
aligning the outer end portions of first ones of said electrodes to define a first coextensive end at one end of the ceramic body, each of said first electrodes terminating short of the other end of the ceramic body;
aligning the outer end portions of second ones of said electrodes to define a second coextensive end at the opposite end of the ceramic body, said second electrodes interposing between said first electrodes, each of said second electrodes terminating short of the first coextensive end at the one end of the ceramic body;
interposing layers of ceramic between each of said first and second electrodes, thereby defining a series of aligned spaces inward of each of the opposed coextensive ends in the respective margin portions, the arrangement of said electrodes and ceramic layers forming a capacitor sub-assembly;
applying to said sub-assembly compressive forces exerted in a direction normal to the orientation of said electrodes to deform selective ones of said electrodes and ceramic layers into said spaces and to form indentations in said bottom surface, said indentations being in registry with the margin portions and extend-ing to said ends, whereby a portion of said bottom surface between said indentations is at a level below the level of said indenta-tions; and completing the cure of said ceramic body, and applying conductive coating at the opposed ends to form said termination portions.
6. The method in accordance with claim 5, including the step of applying said compressive forces against said bottom surface through the medium of a die member having raised portions in registry with said margin portions of said ceramic capacitor device.
7. The method in accordance with claim 5 including the step-of interposing a depthwisely compressible member against said bottom surface of said green ceramic prior to applying said compressive forces.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US96124778A | 1978-11-16 | 1978-11-16 | |
| US961,247 | 1978-11-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1145423A true CA1145423A (en) | 1983-04-26 |
Family
ID=25504239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000338300A Expired CA1145423A (en) | 1978-11-16 | 1979-10-24 | Chip capacitor for compliance soldering |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS5571018A (en) |
| CA (1) | CA1145423A (en) |
| DE (1) | DE2942704A1 (en) |
| FR (1) | FR2441912A1 (en) |
| GB (1) | GB2034521B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58196007A (en) * | 1982-05-12 | 1983-11-15 | 日本電気株式会社 | Ultrafine electronic part |
| US4618911A (en) * | 1984-11-19 | 1986-10-21 | Sfe Technologies | End termination for chip capacitor |
| JP2915716B2 (en) * | 1992-08-26 | 1999-07-05 | ティーディーケイ株式会社 | Electronic components |
| JP3747940B2 (en) * | 2004-06-03 | 2006-02-22 | 株式会社村田製作所 | Multilayer capacitor and manufacturing method thereof |
| JP4803451B2 (en) * | 2006-12-26 | 2011-10-26 | Ｔｄｋ株式会社 | Electronic component and its mounting structure |
| CN114241905B (en) * | 2021-12-04 | 2024-01-23 | 昆山国显光电有限公司 | Display module and display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1826276U (en) * | 1959-06-23 | 1961-02-09 | Messwandler Bau Gmbh | ELECTRIC FLAT-WINDING CAPACITOR, IN PARTICULAR FOR HIGH VOLTAGE AND HIGH CURRENT IMPACT DETECTION SYSTEMS. |
| GB1117437A (en) * | 1965-10-05 | 1968-06-19 | Gen Electric | Improvements in molded electronic component |
| FR1495139A (en) * | 1966-09-23 | 1967-09-15 | Gen Electric | Molded elements for electrical or electronic circuits |
| US3590348A (en) * | 1969-12-29 | 1971-06-29 | Erie Technological Prod Inc | Radial lead ceramic capacitor with integral standoff feet |
| JPS54105774A (en) * | 1978-02-08 | 1979-08-20 | Hitachi Ltd | Method of forming pattern on thin film hybrid integrated circuit |
-
1979
- 1979-10-16 GB GB7935834A patent/GB2034521B/en not_active Expired
- 1979-10-23 DE DE19792942704 patent/DE2942704A1/en not_active Ceased
- 1979-10-24 CA CA000338300A patent/CA1145423A/en not_active Expired
- 1979-11-15 JP JP14830879A patent/JPS5571018A/en active Granted
- 1979-11-16 FR FR7928339A patent/FR2441912A1/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| GB2034521B (en) | 1983-07-27 |
| FR2441912A1 (en) | 1980-06-13 |
| FR2441912B1 (en) | 1984-04-20 |
| JPS5571018A (en) | 1980-05-28 |
| DE2942704A1 (en) | 1980-05-29 |
| JPS6133246B2 (en) | 1986-08-01 |
| GB2034521A (en) | 1980-06-04 |
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