CA1123068A - Resistive pad - Google Patents

Resistive pad

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Publication number
CA1123068A
CA1123068A CA362,246A CA362246A CA1123068A CA 1123068 A CA1123068 A CA 1123068A CA 362246 A CA362246 A CA 362246A CA 1123068 A CA1123068 A CA 1123068A
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CA
Canada
Prior art keywords
switch means
resistor
resistive element
contacts
electrically connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA362,246A
Other languages
French (fr)
Inventor
Tom L. Blackburn
Otto G. Wisotzky
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GTE Automatic Electric Laboratories Inc
Original Assignee
GTE Automatic Electric Laboratories Inc
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Filing date
Publication date
Priority claimed from US05/636,018 external-priority patent/US4048576A/en
Application filed by GTE Automatic Electric Laboratories Inc filed Critical GTE Automatic Electric Laboratories Inc
Priority to CA362,246A priority Critical patent/CA1123068A/en
Application granted granted Critical
Publication of CA1123068A publication Critical patent/CA1123068A/en
Expired legal-status Critical Current

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Abstract

D-23,210 RESISTIVE PAD
by Tom L. Blackburn and Otto G. Wisotzky ABSTRACT OF DISCLOSURE
A resistive pad having an attenuation between input and output terminals (measured with respect to a reference point) that is variable in discrete steps, and having a net resistance between the input and output terminals. The pad comprises first and second resistive elements, with one of them electrically connected between the input and output terminals and the other of them electrically connected between the reference point and one side of the one resistive element. Pluralities of control resistors and bi-state switch means are electrically connected together in a prescribed pattern across first and second terminals of the first resistive element, where changing the state of at least a certain one of the switch means produces a step change in the net resistance measured across the first resistive element, which requires that changing the states of individual switch means produce different prescribed step changes in the decibel value of attenuation that are cumulative.

Description

--~ ~ 3~68 D-23,210 3 RELATE~ APPLICATIONS
4 This is a division of application serial number 266,552 filed November 25, 1976.

7 ~ACKGROUND OF INVENTIO~
8 This invention relates to gain control circuits, and more 9 particularly to a resistive pad that causes the decibel value of the net gain between input and output terminals thereof to vary in discrete steps 11 of substantially the same magnitude.
1~ Line amplifiers in telecommunication systems tyDically ha~e sorre ~3 form of manual gain adjustment for setting levels throughout a system.
14 Gain changes are normally provided in discrete logarithmic (decibel) steps of the same value for convenience. The prior-art line amplifier disclosed 16 in U. S. patent 3,778,563, issued ~ecember 11, 1973, "Voice Frequency 17 Repeater", by Donald L. Bise et al., uses a resistive L-pad on the input 18 of a fixed gain amplifier. Each section of this L-pad comprises a series 19 resistor between an inout line and the input of the amplifier, and a shunt resistor connected to one end of an associated series resistor. A
21 plurality of such sections may be connected in series without 22 substantially changing the input impedance of the amplifier. The decibel 23 values of attenuation per section of the pad therefore add up on a linear 24 basis. The attenuation of the input pad is decreased (i.e., t,he net gain
2~ is increased) by removing sections therefrom. This is accomplished by 28 closing one shunt screw switch to short-circuit the associated series 27 resistor and a~ the sarr.e time opening a series screw switch to 2~ open-circuit the associated shunt resistor. Thus, it is seen that at 29 least two screw adjuskments are required there for each step change in ~2 ~',' / D-23,210 ~ 3~

1 attenuation or gain. Sin oe the overall gain of this prior-art circuit is 2 adjusted by removing resistive elements from the input circuit thereof,
3 the amplifier following the pad is normally adjusted to have a relatively
4 high gain. Such a high-gain amplifier is inherently more susceptible to noise, oscillation, and inc~reased power drain than an amplifier normally 6 operating at a lower level of gain.
7 An object of this invention is the provision of an improved 8 resistive pad.

SUMMARY OF INVENTION
11 In accordance with this invention, a resistive pad having an 12 attenuation between an input and an output terminal, measured with respect 13 to a reference point, that is variable in discrete steps and having a net 14 resistance between the input and output terminals, comprises: first and second resistive elements; first means electrically connecting one of the 16 first and second resistive elements between the input and output terminals 17 and electrically connecting the other of the first and second resistive 18 elements between the reference point and one side of the one resistve 19 element; a plurality of control resistors; a pluralit~ of bi-state switch means; and second means electrically connecting the control resistors and 21 switch means together in a prescribed pattern across first and second 22 terminals of the first resistive element, the state of at least a certain 23 one of the switch means being changed to produce a step change in the net 24 resistance measured across the first resistive element, which requires that changing the states of individual switch means produce different 26 prescribed step changes in the decibel value of attenuation that are 27 cumulative.

29 '. `

31 ~ 3 ~

' Z3~6~3 D-23,210 1 ~
2 FIG. lA is a schematic circuit diagram of an amplifier stage 3 embodying this invention and including a pair of gain control circuits 51 and 52 which are associated with transistor Ql;
FIG. lB is a schematic circuit representation of the AC circuit 6 equivalent of the emitter circuit in FIG. lA including the gain control 7 circuit 52 which controls the effective emitter resistance of transistor 8 Ql and the gain of amplifier 45;
g FIG. 2A is a schematic circuit diagram of an alternate :
embodiment of the amplifier stage which was built and tested, the gain 11 control circuit 52' here being DC coupled to the emitter of transistor 12 Ql;
13 FIG. 2B is a schematic circuit representation of the AC circuit 14 equivalent of the emitter circuit in FIG. 2A ard is the same as that shown in F`IG. lB for the amplifier stage illustrated ir FIG. lA;
16 FIGS. 3A and 3B are a schematic circuit diagram and the 17 associated AC circuit equivalent of the emitter circuit of another 18 alternate embodiment of the amplifier stage wherein the gain control 19 circuit 52 also includes a pair of adjustment screws;
FIGS. 4A and 4B are a schematic circuit diagram and the 21 associated AC circuit equivalent of the emitter circuit of a further 223 alternate embodiment of the amplifier stage wherein the gain control 29 . ,~

31 ;

~ I

~ 3~
ll D-23, 210 1 ¦¦ circuit 52 here also includes a pair of adjustment screws;

? I:IGS. 5A and 5B are a schematic circuit diagram and ~he 3 associated ~C circuit equivalent of the emitter circuit of yet another alternate embodiment of the amplifier stage \~herein the gain control 5l circuit 52 includes three adjustment scre~s;
~ IGS. 6A and 6B are a schematic circuit diagram and the '~' associated AC circuit equivalent of the emitter circuit of another 2, embodiment of the amplifier stage which was built and successfully ~ operated in series with the circuit of FIG. 2A to provide a broader range ~ and larger number of steps of gain adjustment than are provided by the 1¦ circuit of ~IG. 2A alone;
1,~ IIG. 7 is a tabulation disclosing and summarizing the structure 1~-, and operatioll of the various embodiments of the amplifier stage which are illustrated in other figures here.
~51 The same and primed reference characters designate similar lG¦ elemcnts in ~he figures. Different reference characters are used to ~'~ designate otl)er elements such as the emitter resistors R10, R10', R23, l~j etc., ho~ever, to make certain and definite which ones of the corresponding 191 elemcnts are designated thereby.

.o() I
~1 ¦ DESCRIPTION OF PREFERRED E~lBODI~lENTS

22 Referring no~ to the preferred embodiment of this invention 2~ ¦ in ~IG. lA, the aTnplifier stage there comprises a transistor Ql having ,~ ¦ gain control circuits 51 and 52 associated \~ith the base and emitter electrodes, respectively, of the transistor for adjusting the net gain 26¦ of the stage. The circuit is preferably fabricated on a printed circu~it ~71 board, although it also may be formed on a ceramic substrate or by other ¦ appropriate techniques. An input signal on line 53 is coupled through ~9 the gain control circuit 51 to lines 54 and 55 and the base electrode of the transistor Ql. An amplified output signal is coupled on line 56 from 3~ I _ 5 _ '' ~l ~ ¦ Z 3 ~ 6 ~ D-23,210 l the collector electrode of Ql. The Ql base and collector electrodes are 2 connected to the positive terminal +Vs of a source of supply voltage 3 through bias resistor R8 and load resistor R9, respectively, whereas the ground terminal of the voltage source is connected through bias resistor R7 and emitter resistor R10 to the base and emitter electrodes, 6 respectively, of the transistor.
7 The gain control circuit 51 is essentially an L-pad comprising 8 the bias resistor R7 whic`n forms one leg of the L-pad; a plurality of 9 resistors Rl - R5 that are connected in series between the input line 53 and the Ql base electrode and which form the other leg of the L-pad; a ll plurality of screw-type switches S2 - S5 which are connected across 12 associated resistors R2 - R5, respectively; and a bridging resistor R6 13 which is connected between switch S5 and the node 57 between resistors Rl 14 and R2. The switches S are preferably similar to those illustrated in lS U.S. Patent 3,883,682, issued May 15, 1975, "Circuit Assembly", by Albert 16 W. Cagle, et al.
17 Each of the switches S comprises an aperture in a printed 18 circuit board; a plurality of spaced-apart electrically conductive l9 arcuate contacts adjacent to and spaced from the circumference of the aperture; and an electrically conductive flathead screw (not shown).
21 The switch S2, for example, has a pair of electrical contacts 61 and 22 62 which have a semicircular shape whereas switch S5 has three electrical 23 contacts 63 - 65. Reference being had to switch S2, the shank of a 24 screw is threaded into the aperture associated with this switch. The diameter of the head of the screw is sufficiently large to completely 26 overlap both of the contacts 61 and 62. When switch S2 is in the open 27 position, the screw is threaded out of the aperture sufficiently far 28 that the head thereof is spaced from and does not make electrical contact 29 with contacts 61 and 62. Switch S2 is closed by inserting the screw 3 fully into the aperture until the underside of the head thereof physically ''1`~'~, I D-23, 210 1 touches both of the contacts 61 and 62 so as to bridge the gap between 2 ¦ thesc spaced-apart contacts and establish electrical continuity 3 I therebet~een. Although switches such as S2 and S5 are shown in FIG. lA
having two and three contacts, respectively, screw switches having more than three contacts may be employed in alternate embodiments of the amplifier stage. The preferred emb~diment of the switch means here ; is an electrically conductive screw and associated spaced-apart conductors. .
The switch means S2, S3, etc. may also be straps, shorting plugs, ~ rotary switches having ~iper arms contacting a plurality of s~itch contacts, or other devices satisfying the same functions.
11 The L-pad of circuit 51 is essentially an attenuator which 12¦ increases or decreases the level of an input signal on line 53 by 13 ¦ selectively reducing or raising the value of net resistance between lines 1-~ ¦ 53 and 5~. This circuit 51 is employed here to produce small changes in 15 ¦ the net gain of the amplifier stage. l~hen all of the switches S2 - S5 lr) ¦ are open, the series resistance of circuit 51 is the sum of the resistances 17 ¦ of Rl - R5, and this circuit has a reference gain, for example, of 0 dB.
18 ¦ The gain of circuit 51 is increased one step by closing screw switch 52 19 ¦ to short-circuit R2 and reduce the series resistance in lines 53 - 54.
The circuit 51 gain is increased another step by closing only switch S3 21 ~ to remove R3 from the circuit and further reduce the series resistance of 221 the L-pad. The decibel values of the changes in gain produced by tllese 231 switclles are cumulative. Thus, when both S2 and S3 are closed, the 24 ¦ gain of circuit 51 is the sum of the gains produced by closing the 251 individual switches S2 and S3.
2~ ¦ Although the input impedance of amylifier 45 does not remai~n 27 ¦ perfectly constant when the series resistance of circuit 51 is varied, ~8 ¦ any error can be ignored for small changes in net gain. I~en the ~0 net gain change approaches 1 dB, however, (e.g., when S5 is closed to 3~ l 3~P6~

D--23, 210 1 remove 115 from the circuit) the elror is approximately O.l dB. This error ~, is colnpensated for in the circuit/in FIG. lA by adding the third contact 3 65 to S5 and connecting a resistor R6 between this switch S5 and node 57 ~L such that R6 bridges the series combination of resistors R2, R3, and R4.
lhis causes the net series resistance and the gain change provided by ,~ closing S5 to be more nearly equal to the desired value. ~lis same ,; ¦ correction technique may be applied to other switches where it is deemed ~arranted.
~ I In an embodiment of the amplifier stage that ~as built and lO ¦ successfullv oyerated, the decibel value of voltage gain of the circuit ~1 51 \~as increased in equal steps of 0.1 dB from 0 dB to 1.5 dB by 12 selcctively reducing the series impedance in the base circuit of Ql. The 13 operation of circuit 51 is summarized by listin~ the relative voltage 14 gains of this circuit and the correspondin~ ones of the s~itches S2 - S5 15 ¦ that are closed to provide such a gain, as follo~s: 0 dB with all s\~itches 16 ¦ open (no s\~itches closed); 0.1 dB for S2 closed; 0.2 dB for S3;
17 0.3 dB for S2 and S3; 0.4 dB for S4; 0.5 dB for S2 and S4; 0.6 dB for 1~ S3 and S4; 0.7 dB for S2, S3, and S4; 0.8 dB for S5; 0.9 dB for S2 and S5; etc. Tlle resistances of resistors in the circuit 51 that was ,O operated ~ere: Rl = 21.35 kilohms, R2 = 450 ohms; R3 = lO50 ohms; R4 =
21 1900 ohms; R5 = 3400 ohms; R6 = 31.6 kilohms, and R7 = 46.3 kilohms. The 22 contact 65 of switch S5 (\~ith S2, S3, and S4 open) and resistor R6 231 chan~e the series resistance betl~een nodes 57 and 58 from 3.4 kilohms 24 ¦ to 3.07 ~ilohms.
25 ¦ The gain of amplifier 45 (not including circuit 51~ is 20 proportional to the ratio of the load resistance and the emitter 2~ ¦ resistance for transistors havin~ high B. The error in this gain --2~ appro.Yi~nation is onl~ about 0.1 dB for a transistor ~ith a B Of '~1 50 an~ increases for lower values of B. If an open circuit is inserted 31~
3' ~ - 8 -~ ' ¦ D-23,210 1 1¦ bctween the nodes E and F in FIG. lA, the amplifier gain is proportional 2 ¦ to the ratio of the resistances of R9 and RlO. The effective emitter 3 ¦ resistance of Ql, and thus the amplifier gain, may be changed by 4 ¦ connecting various combinations of resistors in shunt with emitter
5 I resistor RlO. The gain control circuit 52 in F~G. lA employs a pair of r~ ¦ screw switclles S6 and S7 for adjusting the gain of amplifier 45 in .~ discrete steps having the same decibel value. This circuit 52 is employed 8 ¦ to produce large changes in the net gain of the amplifier stage, gain ~ ch~nges produced by individual sl~itches S6 and S7 being cumulative.
Thc gain control circuit 52 in FIGS. lA and lB comprises the 11 pair of scrcw s~itches S6 and S7 and a pair of resistors Rl2 and Rl3 12 wllicll are electrically connected together in a prescribed manner between 1~ nodes ~ and G. The switch contacts ll and 72 are directly electrically 1~L connected together. The contact 73 of S6 is connccted through R13 to ]5 node G whereas the contact 74 of S7 is directly electrically connected ]G thereto. Conversely, the contact 75 of S6 is directly electrically 17 ¦ connected to node F, t~hereas the contact 76 of S7 is electrically 18 ¦ connected thcreto through resistor Rl2. Node F is AC coupled to node E
1g and one sidc of emitter resistor RlO through DC blocking capacitor Cl.
Node G is coupled through resistor Rl7 to node D and the other side 21 of emitter resistor RlO, which is also connected to the ground reference 22 potcntial. The AC circuit equivalent of the emitter circuit of FIG. lA
23 is shown in E]G. lB
24 The AC opcration of amplifier 45 and gain control circuit 52 is summari7cd in rows l - 4 of the tabulation in FIG. 7. Column l 26 indicates the status of thc screw switches S6 and S7, i.e., whether a 2~ s~itch is closcd; column 2 indicates the effective emitter resistà'nce 2a R~E (bctwccn nodes D alld E) which is produced by the switchcs; columns 29 3 and ~ indicate corresponding decibel values (20 loglO G ) of voltage 31 l 3~ I 9 .Z3~6~ ~
D-23,210 1 ! gain and voltage ratios Gv = RL/RDE of the amplifier, respectively; and 2 1¦ column 5 lists normalized values of resistances of resistors ~Yhere 3!1 Rl = RlO = l ohm.
¦ Briefly, when S6 and S7 are both open tFIG. 7, row 1), the 51 O dB reference gain of amplifier 45 is determined by an effective emitter ~ resistance RDE ~hich is equal to the resistance of RlO. The O dB
7 ¦ reference gain is increased 2 dB by closing only S6 (FIG. 7, row.2).
¦ This gain change is accomplished by connecting the series combination ~ of resistors Rl3 and Rl7 in parallel with RlO to decrease the effective 1n~ emitter resistance RDE. The decibel value of voltage gain is increased 11 another 2 dB by opening S6 and closing S7 (FIG. 7, row 3) to connect 12 ¦ the series combination of resistors Rl2 and Rl7 in parallel with RlO
1~ to further decrease the value of the effective emitter resistance RDE.
Finally, the decibel value of voltage gain of amplifier 45 is again 151 increased by the same amount to 6 dB by closing both of the switches S6 15 ¦ and S7 to short-circuit resistors Rl2 and Rl3 and connect Rl7 in parallel 17 witl~ emitter resistor R10 (FIG. 7, row 4). Normalized resistance values 1~ of thc resistors are shown in column 5. Actual values of resistances 19 ¦ for these resistors may be computed as is well knolm in the art, e.g., ¦ by selecting values of RL and/or RlO and multiplying other resistances 21 by corresponding factors. Although 2 dB step changes in gain are 22 indicated for ~he circuit 52 in FIG. lA, other values of gain change 2~ ¦ may be obtained by selecting the resistance of one resistor and scaling 2a the resistances of the other resistors. A reference gain of other than ~5 O dB, e.g., to compensate for losses in the input circuit, may be obtained by making the resistance ratio RL/RDE other than unity.
2~The emitter circuit in FIG. lA includes a DC bloc~ing capacitor Cl between nodes E and F. Tl~e DC bias current through RlO sets the operating point of the amplifier. The effective AC emitter 31 ~ - lO -3.~ l il '1~.~3~6~ ~
¦! D-23 210 ¦ resistance in l`IG. lB deterlnirles the gain of the nmpllfier. In an alternate form of the structure coupling the circuit 52 to the emitter 3 1l resistor RlO, the capacitor Cl is replaced by a short circuit between ¦ nodes E and F, and node G is also connected through a bias resistor ` 5 ~not sho\~n) to ~ source of positive supply potential. In this alternate G circuit, the bias resistor corresponding to Rl7 bet~een ground and node ,l G, and the bias resistor betl~een node G and the supply voltage are selected to provide the same DC bias voltages at nodes E and G. Since ~ these nodes E and G are at the same DC potential, DC current will not flow through circuit 52. The same DC bias current l~ill flo~ through RlO
11 to set the operating point of amplifier 45, ho\~ever, even when values lX of resistance in circuit 52 are changed. This means that the operating 13 point of Ql \~ill be unaffected by resistance changes in circuit 52 so 14 as to prevent a shift in the output level of the amplifier. It is the effective AC emitter resistance that changes and determines the gain of 1~ amplifier 45. The AC equivalent of this alternate structure is the 17 same as that shol~n in FIG. lB ~here the resistance of the parallel 1~ combination of the two DC bias resistors that are electrically connected 19 between ground and node G, and between node G and the source of bias voltage, is equal to the resistance of Rl7.
21 An alternate embodiment of the amplifier stage which was built 2~ and successfully operated is illustrated in FIG. 2A. The circuits in 23 FIGS. lA and 2A are similar, differences being that the DC blocking 2~ capacitor Cl is omitted in FIG. 2A, that the load resistor R9' is connected to ground, and that the emitter resistor RlO' is connected 2~) through a DC bias resistor Rll to a source of negative supply voltage 27 -Vs. An AC b~ass capacitor C2 is connected bet~een node D' and ground 7 to effectivcly remove resistor Rll from the AC equivalent circuit in ~G FIG. 2B. A first bias resistor R14 is connected betl~een the node G' ~0 .~ , . , il l ~.2~8 D-23, 210 1 and the DC reference volta~e at node D' in FIG. 2A. A second DC bias 2 1 resistor Rl5 is connected bett~een node G' and ~round. The resistors Rl4 3 and Rl5 cause the DC bias voltages at nodes E and G' to be the same a value. As was statecl above, this prevents changes in the resistance of circuit 52', changing the DC bias level of amplifier 45' and
6 accomplishes the same purpose as the AC coupling capacitor Cl in ~IG. lA.
,; The AC circuit equivalent of the emitter circuit in FIG. 2A is illustrated ~, in FIG. 2B. Reference to FIGS. lB and 2B reveals that the emitter circuits in FIGS. l~ and 2A have the same AC equivalent circuits 1~herein thc resistor R17' has a resistance equal to that of the parallel 11 combination of resistors R14 and Rl5.
1~ The operation of amplifier 45' in FIGS. 2A and 2B is summarized 13 in ro~s 5 - 9 of FIG. 7. In this example, the quantities listed in 1~¦ columns 3, 4, and 5 of rows 5 - ~ represent actual values provided by the 15¦ circuit which was built and successfully operated (where the resistors had 16¦ resistance values listed in row 9). In this embodiment of the amplifier lï ¦ stage in FIG. 2A, the reference gain is 9.l dB instead of O dB in order 18 ¦ to compensate for loss in circuits preceding transistor Ql. Each step 19 ¦ change in voltage gain in column 3, lines 5 - 8, is approximately 2 dB.
2~ ¦ In an alternate embodiment of the circuit in FIG. 2A, the 21 ¦ resistor R10' is connected directly to the negative supply voltage -V , 22 ¦ and the resistorR14 is connected directly to a bias voltage source 23 ¦ instead of to the node D'. In another alternate embodiment of the circuit 2~ ¦ of FIG. 2A, an AC coupling capacitor is connected in the line between 25 ¦ nodes E and F'; the resistor Rl4 is connected in parallel with RlS
26 instead of to the node D'; and capacitor C2 and Rll may be omitted such 27 that the resistor R10' and node D' are directly connected to the '<
28 negative supply voltage -Vs. The AC circuit equivalents of both of`
29 these alternate embodiments of the circuit in ~IG. 2A are the same as that sho~n in F~G. 2B.

3,~ - 12 -.2 ~ 3 D- 2 3, 2 1 0 1 ~ Aoother embodiment of the amplifier stage employin~ a pair of scrcw switchcs and the AC circuit equivalent of the emitter circuit thereof are il]ustratcd in FIGS. 3A and 3B respectively. The operation of i switches S8 and S9 in controlling the gain of amplifier 45 is summarized 5¦¦ in lines 10 - 13 in FIG. 7 for incremental changes in gain of 1 dB. In G the alternate embodiment of the amplifier stage in FIG. 3A where coupling l capacitor Cl is replaced with a short circuit the line between nodes P D and G is replaced with an open circuit and the node G connected through 9 associated bias resistors to the positive supply voltage ~V and ground.
1~ An AC bypass capacitor similar to the capacitor C2 in FIG. 2A may be ].1 connccted between the node G and ground for effectively bypassing these 12 bias resistors such that the AC circuit equivalent of the emitter circuit 1~ ¦ for this alternate embodiment of the amplifier stage is the same as that 14 I in ~IG. 3B. If this AC bypass capacitor is omitted the AC equivalent circuit there includes a resistor between nodes D and G in FIG. 3B in lG place of the short circuit that is showrl there. lhe resistances of the 17 various resistors may then be computed by trial and error or with the 18 ¦ aid of a computer.
19 ¦ Another alternate embodiment of the amplifier stage is similar ts the circuit of FIG. 3A except that the resistor R22 is electrically ~1 connected between the contacts 77 and 78 of associated switches S8 and 2' ¦ S9 such that the emitter resistor R23 is normally electrically connected 2j j in parallel with the series combination of resistors R20 R21 and R22 ~l whcn S8 and S9 are open. ~e expressions for the effective emitter resistance RDE in this example are more complex than those shown in ~6 FIG. 7 lincs 10 - 13 for the circuit of FIG. 3A and require more complex 2~ analysis techniqlles to idcntify particular values of the resistors. ';
~ I A further altcrnate embodiment of the amplifier stage employing .
~`J ¦ only t~o scre~ switch mcans and the AC circuit equivalent of the emitter 0 I
31 ~ - 13-I

.

D-23, 210 ].1 circuit thereof are illustrated in FIGS. 4A and 4B, respectively. The 2 ~ operation of this circuit is summarized in lines 14 - 17 in FIG. 7 3 This embodiment of the amplifier stage may also be modified to eliminate the coupling capacitor Cl between nodes E and F in the manner described ~il above.
n The embodiments of the amplifier stages in FIGS. lA, 2A, 3A, and
7 4A employ only two screw switches to provide four different levels of voltage gain that are spaced apart by equal amounts. The number of ~ ¦ different levels of voltage gain and the range of adjustment provided 10 ¦ by the circuit may also be increased by increasing the number of screw 11 switches in the gain control circuit 52. An embodiment of the amplifier 12 stage employing three screw switches in the emitter circuit of amplifier 3 45 and provi.ling six different levels of voltage gain that are spaced 14 apart by the same amount, and the AC circuit equivalent of this emitter circuit are illustrated in FIGS. 5A and 5B, respectively. The operation 16 f this circuit is summarized in lines 18 - 24 in FIG. 7. The normalized 1'~ value of the resistance of R36 is computed by transforming back-to-back
8 ¦ delta resistive networks (which occur when switches S12 and S14 are 1~ closed~ into a pair of Y-networks which are then solved for R36. Although 20 ¦ circuits employing more than three s~itches may be designed for 21 providing amplifiers with greater numbers of different levels of 2~ equally spaced-apart voltage gain, the solution of such circuitsbecomes 23 increasingly more difficult.
2~1 Although tl~e step changes in gain in individual circuits in FIGS. lA, 2A, 3A, 4A, and SA are of the same value, and the gain changes 261 provided by individual screw switches are all cumulative, the elements 27 ¦ of gain contr~l circults 52 may be selected and arl~anged to provide~step 28 ¦ changes in gain which are not equal. By way of example, the resistors ~ and sl~itches in FIG. 6A are connected such that switches S15 and S16 .~,1 3~ ~ -14-3~

li D-23,210 1 jl provide gain cllanges of 1 and 8 dB, respectively (see rows 25 - 29 in .~ ¦ FIG. 7).
3 ¦ Ihe number of clifferent levels of voltage gain and the range f adjustlllent provided by a circuit embodying this invention may also be 5 ¦ increased by cascading the input gain circuit 51 and the amplifier 45 ~ with associated circuit 52, and by cascading amplifiers 45 including 7 associated gain control circuits 52. A relatively simple amplifier circuit providing 15 different levels of voltage gain that are spaced
9 apart by the same amount was obtained in an embodiment of the amplifier
10¦ stage that was built and successfully operated by cascading the amplifier 1]. ¦ circuits 45' in FIG. 2A and 45" in FIG. 6A. In the resultant circuit~
12 ¦ line 56 in FlG. 2A is essentially connected to line 55 in FIG. 6A. In 1~l this circu;t, the decibel value of the net voltage gain is variable from 1~ O to 15 dB in increments of 1 dB for selected combinations of the switches S6', S7', S15, and S16. This operation may be briefly summari~ed by lC) listing particular ones of the switches in FIGS. 2A and 6A which are 17 closed to provide particular decibel values of voltage gain ~where 18 S6' = 2 dB, S7' = 4 dB, S15 = 1 dB, S16 = 8 dB),as follows: O dB for a no switches closed; 1 dB for S15 closed; 2 dB for S6'; 3 dB for S6' ~0 and S15; 4 dB for S7'; 5 dB for S7' and S15; 6 dB for S6' and S7';
7 dB for S6', S7', and S15; 8 dB for S16; 9 dB for S15 and S16; 10 dB
22 for S6' and S16; 11 dB for S6', S15, and S16; 12 dB for S7' and S16;
2~ 13 dB for S7', S15, and S16; 14 dB for S6', S7', and S16; and 15 dB for 2:1 S6', S7', S15, and S16 being closed. The number of different equally spaced-apar~ levels of net voltage gain was further increased and the 2~ magnitude of the changes in gain decreased by operating these two amplifiers ~7 with the gain control circuit 51 in FIG. lA. The resultant amplifier 2~ st~ge provided rela~ive changes in gain from O dB to 16.5 dB in 0.1 `dB

3~1 I

j T~-23,210 ~ 6~3 ~

l ¦ Although this invention is described in relation to specific 2 ¦ preferred embodiments thereof, modifications and alternate designs will 31 occur to those skilled in the art. By way of example, a particular one of 4 the resistors in a gain control circuit may have a negative resistance.
If FIG. lA, the bridging resistor R6 in pad 51 may be connected to ~¦ another switch means, e.g., S3, or be in the line 66. Further, a switch 7 ¦ means may be connected across several series resistors and the same series 81 resistor may be one of groups thereof associated with different switch 9 ¦ means. Also, the resistances of the resistors in FIG. 3A, for example, lO ¦ may be selected to provide incremental step changes in voltage gain which ll ¦ are of a magnitude other than 1 dB. Although the values of voltage gain 12 ¦ in the drawings are shown as providing increases in amplifier gain by 13 ¦ connecteing resistors in parallel with emitter resistor R10, the gain of 14 ¦ the amplifier may also be adjusted by removing resistance from the emitter 15 ¦ circuit to increase the effective emitter resistanoe and to decrease the 16 ¦ gain of the circuit. The amplifier gain may also be adjusted by 17 ¦ connecting a gain control circuit 52 to any resistive element such as the 18 ¦ bias or load resistor that controls the gain of the associated transistor.
19 ¦ The resistors of the emitter gain control circuit may also be selectively 20 ¦ interconnected through multicontact rotary switches (not shown), having 21 certain contacts thereof connected to the resistors and other contact 22 thereof open circuited. Although a common emitter transistor amplifier is 23 shown in the figures here, a common base or common collector configuration 2~ or operational a~plifier circuit may be employed. Also, the gain control circuit 52 may be located in the base circuit of a transistor. And in a 26 resistive pad including means connecting Rl between input line 53 and ~7 output line 5~ , the control circuit 52 may be connected across R10 or Rl.
28 Alternatively, the circuit 52 may ~e connected across R7 in such a pad.
29 The scope of this invention is therefore determined from the attached claims rather than the above detailed description of e~bodiments thereof.

,,,," ..

Claims (13)

D-23,210 The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A resistive pad having an attenuation between an input and an output terminal, measured with respect to a reference point, that is variable in discrete steps and having a net resistance between the input and output terminals, comprising:
first and second resistive elements, each having a pair of terminals;
first means electrically connecting one of said first and second resistive elements between the input and output terminals and electrically connecting the other of said first and second resistive elements between the reference point and one side of said one resistive element;
a plurality of control resistors;
a plurality of bi-state switch means; and second means electrically connecting said control resistors and switch means together in a prescribed pattern across first and second terminals of said first resistive element such that changing the state of at least a certain one of said switch means produces a step change in the net resistance measured across said first resistive element, said pattern requiring that changing the states of individual switch means produce different prescribed step changes in the decibel value of attenuation that are cumulative.
2. The pad according to claim 1 wherein the AC equivalent circuit of said first resistive element and said pattern of control resistors and switch means comprises:
said first resistive element;
first, second, and third control resistors of said plurality thereof, each resistor having a pair of terminals; and first and second switch means of said plurality thereof, each switch means having at least three electrical contacts;
said first resistor having one terminal thereof directly D-23,210 electrically connected to one terminal of said first resistive element and having the other terminal thereof electrically connected through said second resistor and directly electrically connected to first contacts of said first and second switch means, respectively; the other terminal of said first resistive element being directly electrically connected and connected through said third resistor to second contacts of said first and second switch means, respectively; the third contacts of said first and second switch means being directly electrically connected together;
electrical contacts of a particular switch means being electrically short-circuited together when it is in a closed state.
3. The pad according to claim 2 wherein changing the states of said first and second switch means produces step changes in the decibel value of attenuation that are of substantially the same magnitude.
4. The pad according to claim 1 wherein the AC circuit equivalent of the parallel combination of said first resistive element and said pattern of control resistors and switch means comprises:
said first resistive element;
first, second, and third control resistors of said plurality thereof, each resistor having a pair of terminals; and first and second switch means of said plurality thereof, each switch means having at least three electrical contacts;
one terminal of said first resistive element being directly electrically connected and connected through said first control resistor to first contacts of said first and second switch means, respectively;
the other terminal of said first resistive element being connected through said second control resistor and directly electrically connected to second contacts of said first and second switch means, respectively;
the third contacts of said first and second switch means being D-23,210 electrically connected together through said third resistor; the electrical contacts of a particular switch means being electrically short-circuited together when the associated switch means is in a closed state.
5. The pad according to claim 4 wherein changing the states of said first and second switch means produces step changes in the decibel value of attenuation of substantially the same magnitude.
6. The pad according to claim 5 wherein each of said first and second switch means comprises a screw switch having at least said three switch contacts which are electrically conductive and spaced apart around the circumference of an aperture in a substrate and an electrically conductive screw having a head thereof that extends over at least a portion of each of said switch contacts and which short-circuits the latter together when said switch is closed.
7. The pad according to claim 1 wherein said pattern of control resistors and switch means, and said first resistive element comprise:
said first resistive element;
first, second, and third control resistors of said pluralities thereof, each resistor having a pair of terminals;
a first screw switch means of said plurality thereof, said first switch means including at least three electrically conductive switch contacts which are spaced apart around the circumference of an aperture in a dielectric substrate supporting said resistors and resistive elements and including a first electrically conductive screw having a shark threaded into the aperture and having a head which overlaps at least a portion of each of said contacts of said first screw switch means; and a second screw switch means of said plurality thereof, said second switch means including at least a pair of electrical contacts spaced apart about the circumference of an aperture in the D-23,210 dielectric substrate supporting said resistors and including a second electrically conductive screw having a shank threaded into the second aperture and an electrically conductive head overlapping at least a portion of the two contacts of said second screw switch means;
one terminal of said first resistive element being directly electrically connected and connected through said first resistor to first contacts of said second and first switch means, respectively; the other contact of said second switch means being electrically connected through said second resistor to the second contact of said first switch means and to one terminal of said third resistor; the other terminal of said first resistive element being electrically connected to the third terminal of said first switch means and to the other terminal of said third resistor;
the electrical contacts of a particular screw switch means being electrically short-circuited together when the associated screw switch means is in the closed state.
8. The pad according to claim 1 wherein the AC circuit equivalent of said first resistive element and said pattern of control resistors and switch means comprises:
said first resistive element;
first, second, and third control resistors of said plurality thereof, each resistor having a pair of terminals;
first switch means, of said plurality thereof, having at least a pair of contacts; and second switch means, of said plurality thereof, having at least three electrical contacts;
one end of said first resistive element being directly electrically connected and connected through said first control resistor to first contacts of said first and second switch means, respectively;
the other contact of said first switch means being electrically connected through said second resistor to a second contact of said second switch D-23,210 means and to one terminal of the said third resistor; the other terminal of said first resistive element being directly electrically connected to the third contact of said second switch means and to the other terminal of said third resistor; the electrical contacts of a particular switch means being electrically short-circuited together when the associated switch means is in a closed state.
9. The pad according to claim 8 wherein changing the states of said switch means produces step changes in the decibel value of the attenuation of substantially the same magnitude.
10. The pad according to claim 1 wherein the AC equivalent circuit of said first resistive element and said pattern comprises:
said first resistive element;
first, second, third, fourth, fifth, and sixth control resistors, of said plurality thereof, each having a pair of terminals;
first and second switch means, of said plurality thereof, each having at least three electrical contacts; and third switch means, of said plurality thereof, having at least four electrical contacts;
one terminal of said first resistive element being electrically connected through said first and second control resistors to one contacts of said first and second switch means, respectively; the one contact of said first switch means also being connected through said third control resistor to the first contact of said third switch means;
the other terminal of said first resistive element being electrically connected through said fourth resistor, through said fifth resistor and directly electrically connected to the second contacts of said first, second, and third switch means, respectively; the third contacts of said first and third switch means both being connected through said sixth resistor to the third and fourth contacts of said second and third switch means, respectively; the electrical contacts of a particular switch means D-23,210 being electrically short-circuited together when it is in a closed state.
11. The pad according to claim 10 wherein changing the states of said switch means produces step changes in the decibel value of attenuation of substantially the same magnitude.
12. The pad according to claim 1 wherein the AC circuit equivalent of said pattern of control resistors and switch means together with said first resistive element comprises:
said first resistive element;
first, second, third, and fourth resistors of said plurality thereof, each resistor having a pair of terminals; and first and second switch means, of said plurality thereof, each having at least three electrical contacts;
one terminals of said first resistive element and said first control resistor being directly electrically connected and connected through said second control resistor to first contacts of said first and second switch means, respectively; the other terminals of said first resistive element and first control resistor being electrically connected through the series combination of said third and fourth control resistors and through said third control resistor to second contacts of said first and second switch means, respectively; the third contacts of said first and second switch means being directly electrically connected together;
the electrical contacts of a particular switch means being electrically short-circuited together when it is in a closed state.
13. The pad according to claim 12 wherein changing the states of said switch means produces step changes in the decibel value of attenuation of substantially the same magnitude.
CA362,246A 1975-11-28 1980-10-10 Resistive pad Expired CA1123068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA362,246A CA1123068A (en) 1975-11-28 1980-10-10 Resistive pad

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US636,018 1975-11-28
US05/636,018 US4048576A (en) 1975-11-28 1975-11-28 Transistor amplifier stage with selectively adjustable gain control circuit
CA266,552A CA1107824A (en) 1975-11-28 1976-11-25 Transistor amplifier stage with selectively adjustabale gain control circuit
CA362,246A CA1123068A (en) 1975-11-28 1980-10-10 Resistive pad

Publications (1)

Publication Number Publication Date
CA1123068A true CA1123068A (en) 1982-05-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CA362,246A Expired CA1123068A (en) 1975-11-28 1980-10-10 Resistive pad

Country Status (1)

Country Link
CA (1) CA1123068A (en)

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