CA1121002A - Control system including built in test equipment for harness interface testing - Google Patents
Control system including built in test equipment for harness interface testingInfo
- Publication number
- CA1121002A CA1121002A CA000309012A CA309012A CA1121002A CA 1121002 A CA1121002 A CA 1121002A CA 000309012 A CA000309012 A CA 000309012A CA 309012 A CA309012 A CA 309012A CA 1121002 A CA1121002 A CA 1121002A
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- CA
- Canada
- Prior art keywords
- signal
- signals
- providing
- controller
- control system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000012360 testing method Methods 0.000 title abstract description 23
- 239000000700 radioactive tracer Substances 0.000 claims description 26
- 238000012795 verification Methods 0.000 claims description 16
- 230000004044 response Effects 0.000 claims description 3
- 238000012423 maintenance Methods 0.000 abstract description 5
- 239000004020 conductor Substances 0.000 description 15
- 108091006146 Channels Proteins 0.000 description 13
- 238000012545 processing Methods 0.000 description 11
- 230000000875 corresponding effect Effects 0.000 description 8
- 238000001514 detection method Methods 0.000 description 5
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 238000012544 monitoring process Methods 0.000 description 5
- RZVHIXYEVGDQDX-UHFFFAOYSA-N 9,10-anthraquinone Chemical compound C1=CC=C2C(=O)C3=CC=CC=C3C(=O)C2=C1 RZVHIXYEVGDQDX-UHFFFAOYSA-N 0.000 description 4
- 230000001276 controlling effect Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000009420 retrofitting Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 101150087426 Gnal gene Proteins 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 238000013024 troubleshooting Methods 0.000 description 1
- 238000010200 validation analysis Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
- G05D1/00—Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots
- G05D1/0055—Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots with safety arrangements
- G05D1/0077—Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots with safety arrangements using redundant signals or controls
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/55—Testing for incorrect line connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/58—Testing of lines, cables or conductors
- G01R31/60—Identification of wires in a multicore cable
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
- G01R31/67—Testing the correctness of wire connections in electric apparatus or circuits
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Aviation & Aerospace Engineering (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Automation & Control Theory (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Testing And Monitoring For Control Systems (AREA)
Abstract
Disclosure 245-770020 CONTROL SYSTEM INCLUDING BUILT IN TEST EQUIPMENT
FOR WIRING HARNESS INTERFACE TESTING
ABSTRACT OF THE DISCLOSURE
A control system features built in test equipment for wiring harness interface testing, i.e., testing critical wires leading to the system from external signal sources, for reducing maintenance costs and for insuring critical wire validity of line replacement units.
FOR WIRING HARNESS INTERFACE TESTING
ABSTRACT OF THE DISCLOSURE
A control system features built in test equipment for wiring harness interface testing, i.e., testing critical wires leading to the system from external signal sources, for reducing maintenance costs and for insuring critical wire validity of line replacement units.
Description
This invention relates to control systems and particularly to control systems of the type hav-ing a built in test equipment capability whereby the wiring interface from external signal sources to the system is easily and economically tested.
Prior Art Control systems include controllers and analog and discrete input and output signal chan-nels associated therewith. The control systems operate in response to signals from external signal sources which are frequently llne replacement units (LRU's). When systems of this type are used for flight control purposes it becomes necessary to guard against faults on critical wires included in the wiring harness connecting the signal sources to the system. Additionally, it is desirable that the need for total wire separation be eliminated when retrofitting aircraft to reduce th~ retrofitting cost. Further, it is desirable to reduce mainten-ance costs by reduced on-ground wiring trouble-shooting, and through integration with existing flight monitoring implementatious. Still further, adequate means must be provided to insure critical wire validity after LRU replacement for reducing maintenance time and maintaining Federal Aviation Administration (FAA) certification and such other certification as may be required for the flight control system. Prior to the present invention `
the above noted functions could only be performed by extensive ground based testing which is costly and time consuming.
J
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SUMMARY OF THE INVENTION
This invention relates to a control system of the type responsive to a plurality of signals from external signal sources for providing a control function, comprising: wiring harness means includ-ing a plurality of wires for applying the plurality of signals to the control system; a controller;
means for providing a tracer signal; first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plur-ality of signals, and connected to the controller and controlled thereby for applying each of the plurality of signals to a predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of tracer signals for receiving the sig- 1 -nals, and connected to the controller and controlled thereby for verifying that each of the plurality of signals is applied only to the predetermined wire ; 20 and for prGviding a verification s:ignal; and means ;~
connected to the second means for detecting the frequency of the verification s~gnal and for provid-ing a corresponding output signal.
In a particular embodiment the invention contemplates a control system including built in ~.; ~
wiring harness interface test equipment which util izes a high frequency sine wave oscillator. The output of the oscillator is applled through a decoupling network which acts as a DC restorer cir-cuit and provides a tracer signal having a known impedance. The decoupling network applies the tracer signal to a tracer injection multiplexer. The
Prior Art Control systems include controllers and analog and discrete input and output signal chan-nels associated therewith. The control systems operate in response to signals from external signal sources which are frequently llne replacement units (LRU's). When systems of this type are used for flight control purposes it becomes necessary to guard against faults on critical wires included in the wiring harness connecting the signal sources to the system. Additionally, it is desirable that the need for total wire separation be eliminated when retrofitting aircraft to reduce th~ retrofitting cost. Further, it is desirable to reduce mainten-ance costs by reduced on-ground wiring trouble-shooting, and through integration with existing flight monitoring implementatious. Still further, adequate means must be provided to insure critical wire validity after LRU replacement for reducing maintenance time and maintaining Federal Aviation Administration (FAA) certification and such other certification as may be required for the flight control system. Prior to the present invention `
the above noted functions could only be performed by extensive ground based testing which is costly and time consuming.
J
ws/ ~J~
0~l~
SUMMARY OF THE INVENTION
This invention relates to a control system of the type responsive to a plurality of signals from external signal sources for providing a control function, comprising: wiring harness means includ-ing a plurality of wires for applying the plurality of signals to the control system; a controller;
means for providing a tracer signal; first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plur-ality of signals, and connected to the controller and controlled thereby for applying each of the plurality of signals to a predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of tracer signals for receiving the sig- 1 -nals, and connected to the controller and controlled thereby for verifying that each of the plurality of signals is applied only to the predetermined wire ; 20 and for prGviding a verification s:ignal; and means ;~
connected to the second means for detecting the frequency of the verification s~gnal and for provid-ing a corresponding output signal.
In a particular embodiment the invention contemplates a control system including built in ~.; ~
wiring harness interface test equipment which util izes a high frequency sine wave oscillator. The output of the oscillator is applled through a decoupling network which acts as a DC restorer cir-cuit and provides a tracer signal having a known impedance. The decoupling network applies the tracer signal to a tracer injection multiplexer. The
-2-multiple~er is controlled by the system controller for providing a plurality of signals and for apply-ing each of the signals to a selected wire. A
tracer detection multiplexer is controlled by the controller to verify first that the signal applied to the selected wire is present on that wire and then checks that the signal is not present on any other wire, and provides a verification signal which is applied to a frequency detector. The detector is ;
arranged so that its output is "false" when it detects a high frequency signal and "true" when it does Mot.
The system is thus fail safe. The output of the fre-quency detector is applied to the controller for con-trolling the control functions thereof. The invention as d~escribed may be used as part of ground verificz~ion built in test equipment (BITE), in rlight as a pre-land test, or interfaced with in-flight monitoring syste~s.
One ob;ect of this invention is to provide a control system including wiring harness interface testing ~eans for testing critical wires connecting external signal sources to the system.
Another ob;ect of this i~vention is to provide a system of the type described wherein critical wire validity after LRU replacement can be ascertained more ~economically than has heretofore been the case.
Another ob;ect of this invention is to provide a system for controlling an aircraft and to integrate the testing means of the invention with in-flight moni-toring apparatus to reduce maintenance costs.
Another object of this invention is to provide means of the type described which may be used as part of a ground verification built in test system, in-flight .~ .
9~ - 3 -, . ,n ~2~
as a pre-land test procedure or interfaced with in-flight monitoring systems.
The foregoing and other objects and advan-tages or the invention will appear more fully hereinafter from a consideration of the detailed description which follows, taken together with the accompanying drawings wherein one embodiment of the invention is illustrated by way of example. It is to be expressly understood, however, that the drawings are for illustration purposes only and are not to be construed as defining the limits of the invention.
~ ' .
Figure 1 is a block diagram showing, for pur-poses of illustration, a digital control system of the type which may utilize the wiring harness interface testing system of the invention.
Figure 2 is a block diagram electrical schem-atic showing the harness interface testing system of the invention in conjunction with a digital control system such as illustrated in Figure 1.
,~ ~
~ -3A--4- Disclosure 245~7?Gn2Q
DETAILED DESCRIPTION OF THE INVENTION
For purposes of describing the invention a digital control system will be described, although the invention is applicable to an analog system as well, as will be understood by those skilled in the art. A typical digital control system is shown as including a random access memory device (RAM) 2 and a read only memory device (ROM) 4.
RAM 2 applies a variable memory and ROM 4 applies a program memory to a processing unit 6 (controller~ through a memory data and address bus 8. A real time clock 10 provides a signal which is applied to processing unit 6 for determining the rate of computation sampling in the digital control system.
An analog input signal channel designated generally by the numeral 12, an analog output signal channel designated generally by the numeral 14, a discrete input signal channel designated generally by the numeral 16 and a discrete output signal channel designated generally by the numeral 18 are connected to processing unit 6 through an input/output data and address bus 20.
Analog input signal channel 12 receives a plurality of analog input signals from signal sources such as sensors 13 which may be, for purposes of illustration, gyros or other flight condition sensors included in a digital flight control system. The analog signals are applied to correspond-ing differential amplifiers/demodulators/filters designated generally by the numeral 22 and applied therefrom to a multiplexer 24. Multiplexer 24 provides a signal which is applied to an analog to digital converter 26 and therefrom . ~ .
-5- Dlsclosu~G 245-770020 to processing unit 6 through input/output data and address bus 20.
Analog output signal channel 1~ includes a digital to analog converter 28 connected to processing unit 6 through bus 20 for pro~iding an analog signal which is applied to a demultiplexer 30. Demultiplexer 30 provides a plurality of signals which are applied to corresponding sample and hold circuits designated generally by the numeral 32 for providing a plurality of analog output signals. The analog ou~put signals are applied, for purposes of illustration, to servo systems or the like designated generally by the numeral 15 for displacing the control surfaces of an aircraft.
Discrete input signal channel 16 receives a plurality of discrete input signals which may be generated by an operator - operated system control panel 17. For purposes of illustration, these signals may be validity signals, i.e., logic "high" or logic "low", corresponding to the analog signals provided by sensors 13. The discrete input signals are applied to corresponding level translators designated generally by the numeral 34 and therefrom to a multiplexer 36 connected to processing unit 6 through input/output data and address bus 20.
Discrete output channel 18 includes a demultiplexer 38 connected to processing unit 6 through bus 20. Demulti-plexer 38 provides a plurality o~ signals which are applied to corresponding registers designated generally by the numeral 40 for providing a corresponding plurality of discrete output signals which drive indicators or the like designated generally by the numeral 19 for indicating the validity or invalidity of the analog input signals, as the case may be.
As heretofore noted, the digital control system described with reference to Figure 1, is of the type known in the art such as used for flight control purposes, and only as much of the system as is necessary to describe the present invention has been illustrated and described~
With reference to Figure 2, which illustrates the wiring harness interface testing implementation or the -O- ~isclGsure 245-,/0020 ~ 3~
invention, analog input signal channel 12 and discrete input channel 16 are shown. For purposes of illustration, channel 12 is shown as including two sensors 13A and 13s, each pro-viding corresponding system input signals, and channel 16 as including control panel 17 providing a single system input signal, and which input signals are directed through the con-figura lon of the invention. It will be understood that other like input signals may be directed through like configurations to accomplish the purposes of the invention.
Thus, particular sensor 13A of sensors 13 (Figure 1) provides a pair of analog input signals at conductors 50 and 52 which may represent "high" and "low" signal levels, respectively. Conductor 50 is connected through a resistor 54 to an inverting input terminal 56 of a differential amp-lifier 58,while conductor 52 is grounded and is connected through a resistor 59 to a non-inverting input terminal 60 of differential amplifier 58. Non~inverting input terminal 60 is grounded through a resistor 62. An output terminal 63 of differential amplifier 58 is connected to the inverting input terminal 56 thereof through a resistor 64. Differential amplifier 58 and its associated resistors are included in a particular differential amplifier/demodulator/filter 22A
of differential amplifiers/demodulators/filters 22 (Figure 1).
Particular sensor 13B of sensors 13 (Figure 1) provides a pair of analog input signals at conductors 66 and 68 which ma~ represent "high" and "low" signal levels, respectively. Conductor 66 is connected through a choke 70 and a resistor 72 to an inverting input terminal 74 of a differential amplifier 76, while conductor 68 is grounded and is connected through a resistor 78 to a non-inverting input terminal 80 of amplifier 76. Non-inverting input terminal 80 is gxounded through a resistor 82. An output terminal 83 of differential amplifier 76 is connected through a resistor 84 to inverting input terminal 74 of amplifier 76.
Amplifier 76 and its associated resistors are included in a particular differential amplifier/demodulator/filter 22B of differential amplifiers/demodulators/filters 22 (~igure 1).
- ~2~
For purposes of illustration, control panel 17 is shown as providing a single discrete input signal at a conductor 86.
Conductor 86 is connected through a choke 88 and a resistor 89 to a particular level translator 34A of level translators 34 tFigure 1~.
In connection with chokes 70 and 88, it will be understood that the signals from sensor 13B and control panel 17 may be low impedance signals and the chokes provide a known impedance to the signals for proper operation of the system as will hereinafter become evident.
Conductors 50, 52, 66, 68 and 86 are included in a wiring harness connecting sensors 13A and 13B and control panel 17 to the control system as is well known in the art.
The outputs of differential amplifier/demodulator/filter 22A
and 22B are applied to multiplexer 24 and therefrom to analog to digital converter 26 as shown in Figure 1. The output of level translator 34A
is applied to multiplexer 36 and therefrom to I/O bus 26 as also shown in Figure 1.
A high frequency oscillator 90 provides a sine wave output which is applied to a decoupling network 92. Decoupling network 92 provides a tracer signal having a predetermined impedance The tracer signal is applied to a tracer injection multiplexer 94 which provides a plurality of signals designated as Tl T2, and TN
and is controlled by processing unit 6 to apply these signals to appropriate wires connecting sensors 13A, 13B and control panel 17 to the digital control system.
Thus, signal Tl, is applied to conductor 86 leading from control panel 17, intermediate choke 88 and resistor 89 via conductor 96.
Signal T2 is applied to conductor 66 leading from sensor 13B, intermediate choke 70 and resistor 72 via conductor 98 and signal TN is applied to conductor 50 leading from sensor 13A, intermediate the sensor output and resistor 54 via conductor 100.
Signals Tl, T2, and TN from tracer injection multiplexer 94 are applied to a tracer detection multiplexer 95 which is controlled by processing unit 6 to -~ i ,7~-~ ~ csm/~
-8- Disclosure ~45-770020 first verify that the injection signals from tracer injection multiplexer 94 appear on the correct wire 86, 66 or 50, as the case may be, and then checks that the signal is not on an~7 o~her wire. Tracer detection multiple~er ~ provides a verification signai which is applied to a frequency detection circuit 104. The arrangement is such that the output of detection circuit 104 is "false" when a high frequency signal is detected and "true" when said high frequency signal is not detected. The system is hence fail safe. The output of frequency detector 104 is applied to processing unit 6 to control the processing unit for applying the controlling signals thexefrom to multiplexers 94 and ~
It will now be seen from the afor~going description of the invention with reference to the drawings that the heretofore noted objects have been met. A control system is provided which includes wiring harness interface testing means for testing critical wires connecting external signal sources to the system. The testing means facilitates retrofitting and critical wire validation after LRU replacement.
The test system may be integrated with other monitoring apparatus to reduce maintenance costs and enhances LRU
replacement as i5 desirable for maintaining certification of the flight contxol system.
Although but a single embodiment of the invention has been illustrated and described in detail, it is to be expressly understood that the invent:ion is not limited there-to. Various changes may also be macLe i~ the design and arrangement OL the parts without departing from the spirit and scope o the invention as the same will now be understood by those skilled in the art.
tracer detection multiplexer is controlled by the controller to verify first that the signal applied to the selected wire is present on that wire and then checks that the signal is not present on any other wire, and provides a verification signal which is applied to a frequency detector. The detector is ;
arranged so that its output is "false" when it detects a high frequency signal and "true" when it does Mot.
The system is thus fail safe. The output of the fre-quency detector is applied to the controller for con-trolling the control functions thereof. The invention as d~escribed may be used as part of ground verificz~ion built in test equipment (BITE), in rlight as a pre-land test, or interfaced with in-flight monitoring syste~s.
One ob;ect of this invention is to provide a control system including wiring harness interface testing ~eans for testing critical wires connecting external signal sources to the system.
Another ob;ect of this i~vention is to provide a system of the type described wherein critical wire validity after LRU replacement can be ascertained more ~economically than has heretofore been the case.
Another ob;ect of this invention is to provide a system for controlling an aircraft and to integrate the testing means of the invention with in-flight moni-toring apparatus to reduce maintenance costs.
Another object of this invention is to provide means of the type described which may be used as part of a ground verification built in test system, in-flight .~ .
9~ - 3 -, . ,n ~2~
as a pre-land test procedure or interfaced with in-flight monitoring systems.
The foregoing and other objects and advan-tages or the invention will appear more fully hereinafter from a consideration of the detailed description which follows, taken together with the accompanying drawings wherein one embodiment of the invention is illustrated by way of example. It is to be expressly understood, however, that the drawings are for illustration purposes only and are not to be construed as defining the limits of the invention.
~ ' .
Figure 1 is a block diagram showing, for pur-poses of illustration, a digital control system of the type which may utilize the wiring harness interface testing system of the invention.
Figure 2 is a block diagram electrical schem-atic showing the harness interface testing system of the invention in conjunction with a digital control system such as illustrated in Figure 1.
,~ ~
~ -3A--4- Disclosure 245~7?Gn2Q
DETAILED DESCRIPTION OF THE INVENTION
For purposes of describing the invention a digital control system will be described, although the invention is applicable to an analog system as well, as will be understood by those skilled in the art. A typical digital control system is shown as including a random access memory device (RAM) 2 and a read only memory device (ROM) 4.
RAM 2 applies a variable memory and ROM 4 applies a program memory to a processing unit 6 (controller~ through a memory data and address bus 8. A real time clock 10 provides a signal which is applied to processing unit 6 for determining the rate of computation sampling in the digital control system.
An analog input signal channel designated generally by the numeral 12, an analog output signal channel designated generally by the numeral 14, a discrete input signal channel designated generally by the numeral 16 and a discrete output signal channel designated generally by the numeral 18 are connected to processing unit 6 through an input/output data and address bus 20.
Analog input signal channel 12 receives a plurality of analog input signals from signal sources such as sensors 13 which may be, for purposes of illustration, gyros or other flight condition sensors included in a digital flight control system. The analog signals are applied to correspond-ing differential amplifiers/demodulators/filters designated generally by the numeral 22 and applied therefrom to a multiplexer 24. Multiplexer 24 provides a signal which is applied to an analog to digital converter 26 and therefrom . ~ .
-5- Dlsclosu~G 245-770020 to processing unit 6 through input/output data and address bus 20.
Analog output signal channel 1~ includes a digital to analog converter 28 connected to processing unit 6 through bus 20 for pro~iding an analog signal which is applied to a demultiplexer 30. Demultiplexer 30 provides a plurality of signals which are applied to corresponding sample and hold circuits designated generally by the numeral 32 for providing a plurality of analog output signals. The analog ou~put signals are applied, for purposes of illustration, to servo systems or the like designated generally by the numeral 15 for displacing the control surfaces of an aircraft.
Discrete input signal channel 16 receives a plurality of discrete input signals which may be generated by an operator - operated system control panel 17. For purposes of illustration, these signals may be validity signals, i.e., logic "high" or logic "low", corresponding to the analog signals provided by sensors 13. The discrete input signals are applied to corresponding level translators designated generally by the numeral 34 and therefrom to a multiplexer 36 connected to processing unit 6 through input/output data and address bus 20.
Discrete output channel 18 includes a demultiplexer 38 connected to processing unit 6 through bus 20. Demulti-plexer 38 provides a plurality o~ signals which are applied to corresponding registers designated generally by the numeral 40 for providing a corresponding plurality of discrete output signals which drive indicators or the like designated generally by the numeral 19 for indicating the validity or invalidity of the analog input signals, as the case may be.
As heretofore noted, the digital control system described with reference to Figure 1, is of the type known in the art such as used for flight control purposes, and only as much of the system as is necessary to describe the present invention has been illustrated and described~
With reference to Figure 2, which illustrates the wiring harness interface testing implementation or the -O- ~isclGsure 245-,/0020 ~ 3~
invention, analog input signal channel 12 and discrete input channel 16 are shown. For purposes of illustration, channel 12 is shown as including two sensors 13A and 13s, each pro-viding corresponding system input signals, and channel 16 as including control panel 17 providing a single system input signal, and which input signals are directed through the con-figura lon of the invention. It will be understood that other like input signals may be directed through like configurations to accomplish the purposes of the invention.
Thus, particular sensor 13A of sensors 13 (Figure 1) provides a pair of analog input signals at conductors 50 and 52 which may represent "high" and "low" signal levels, respectively. Conductor 50 is connected through a resistor 54 to an inverting input terminal 56 of a differential amp-lifier 58,while conductor 52 is grounded and is connected through a resistor 59 to a non-inverting input terminal 60 of differential amplifier 58. Non~inverting input terminal 60 is grounded through a resistor 62. An output terminal 63 of differential amplifier 58 is connected to the inverting input terminal 56 thereof through a resistor 64. Differential amplifier 58 and its associated resistors are included in a particular differential amplifier/demodulator/filter 22A
of differential amplifiers/demodulators/filters 22 (Figure 1).
Particular sensor 13B of sensors 13 (Figure 1) provides a pair of analog input signals at conductors 66 and 68 which ma~ represent "high" and "low" signal levels, respectively. Conductor 66 is connected through a choke 70 and a resistor 72 to an inverting input terminal 74 of a differential amplifier 76, while conductor 68 is grounded and is connected through a resistor 78 to a non-inverting input terminal 80 of amplifier 76. Non-inverting input terminal 80 is gxounded through a resistor 82. An output terminal 83 of differential amplifier 76 is connected through a resistor 84 to inverting input terminal 74 of amplifier 76.
Amplifier 76 and its associated resistors are included in a particular differential amplifier/demodulator/filter 22B of differential amplifiers/demodulators/filters 22 (~igure 1).
- ~2~
For purposes of illustration, control panel 17 is shown as providing a single discrete input signal at a conductor 86.
Conductor 86 is connected through a choke 88 and a resistor 89 to a particular level translator 34A of level translators 34 tFigure 1~.
In connection with chokes 70 and 88, it will be understood that the signals from sensor 13B and control panel 17 may be low impedance signals and the chokes provide a known impedance to the signals for proper operation of the system as will hereinafter become evident.
Conductors 50, 52, 66, 68 and 86 are included in a wiring harness connecting sensors 13A and 13B and control panel 17 to the control system as is well known in the art.
The outputs of differential amplifier/demodulator/filter 22A
and 22B are applied to multiplexer 24 and therefrom to analog to digital converter 26 as shown in Figure 1. The output of level translator 34A
is applied to multiplexer 36 and therefrom to I/O bus 26 as also shown in Figure 1.
A high frequency oscillator 90 provides a sine wave output which is applied to a decoupling network 92. Decoupling network 92 provides a tracer signal having a predetermined impedance The tracer signal is applied to a tracer injection multiplexer 94 which provides a plurality of signals designated as Tl T2, and TN
and is controlled by processing unit 6 to apply these signals to appropriate wires connecting sensors 13A, 13B and control panel 17 to the digital control system.
Thus, signal Tl, is applied to conductor 86 leading from control panel 17, intermediate choke 88 and resistor 89 via conductor 96.
Signal T2 is applied to conductor 66 leading from sensor 13B, intermediate choke 70 and resistor 72 via conductor 98 and signal TN is applied to conductor 50 leading from sensor 13A, intermediate the sensor output and resistor 54 via conductor 100.
Signals Tl, T2, and TN from tracer injection multiplexer 94 are applied to a tracer detection multiplexer 95 which is controlled by processing unit 6 to -~ i ,7~-~ ~ csm/~
-8- Disclosure ~45-770020 first verify that the injection signals from tracer injection multiplexer 94 appear on the correct wire 86, 66 or 50, as the case may be, and then checks that the signal is not on an~7 o~her wire. Tracer detection multiple~er ~ provides a verification signai which is applied to a frequency detection circuit 104. The arrangement is such that the output of detection circuit 104 is "false" when a high frequency signal is detected and "true" when said high frequency signal is not detected. The system is hence fail safe. The output of frequency detector 104 is applied to processing unit 6 to control the processing unit for applying the controlling signals thexefrom to multiplexers 94 and ~
It will now be seen from the afor~going description of the invention with reference to the drawings that the heretofore noted objects have been met. A control system is provided which includes wiring harness interface testing means for testing critical wires connecting external signal sources to the system. The testing means facilitates retrofitting and critical wire validation after LRU replacement.
The test system may be integrated with other monitoring apparatus to reduce maintenance costs and enhances LRU
replacement as i5 desirable for maintaining certification of the flight contxol system.
Although but a single embodiment of the invention has been illustrated and described in detail, it is to be expressly understood that the invent:ion is not limited there-to. Various changes may also be macLe i~ the design and arrangement OL the parts without departing from the spirit and scope o the invention as the same will now be understood by those skilled in the art.
Claims (8)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A control system of the type responsive to a plurality of signals from external signal sources for providing a control function, comprising:
wiring harness means including a plurality of wires for applying the plurality of signals to the control system;
a controller;
means for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled thereby for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of signals for receiving said signals, and connected to the controller and controlled thereby for verifying that each of the plurality of signals is applied only to the respective predetermined wire and for providing a verification signal; and means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal.
wiring harness means including a plurality of wires for applying the plurality of signals to the control system;
a controller;
means for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled thereby for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of signals for receiving said signals, and connected to the controller and controlled thereby for verifying that each of the plurality of signals is applied only to the respective predetermined wire and for providing a verification signal; and means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal.
2. A control system as described by claim 1, wherein the means for providing a tracer signal includes:
means for providing a high frequency oscillating signal; and means responsive to the high frequency oscillating signal for providing the tracer signal having a predetermined impedance.
means for providing a high frequency oscillating signal; and means responsive to the high frequency oscillating signal for providing the tracer signal having a predetermined impedance.
3. A control system as described by claim 1, wherein: the controller provides first and second control signals;
the first means is controlled by the first signal for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means; and the second means is controlled by the second signal for verifying that each of the plurality of signals is applied separately only to the respective predetermined wire.
the first means is controlled by the first signal for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means; and the second means is controlled by the second signal for verifying that each of the plurality of signals is applied separately only to the respective predetermined wire.
4. A control system as described by claim 1, wherein:
the means connected to the second means for detecting the frequency of the verification signal and providing a corresponding output signal provides an output signal in a "false" state when the verification signal is of a high frequency and an output signal in a "true" state when the verification signal is not a high frequency.
the means connected to the second means for detecting the frequency of the verification signal and providing a corresponding output signal provides an output signal in a "false" state when the verification signal is of a high frequency and an output signal in a "true" state when the verification signal is not a high frequency.
5. A control system as described by claim 1, wherein:
the means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal is connected to the controller; and the controller is controlled in response to the output signal for controlling the first and second means.
the means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal is connected to the controller; and the controller is controlled in response to the output signal for controlling the first and second means.
6. A control system, comprising:
controller means providing first and second control signals;
a plurality of signal sources for providing system input signals;
a plurality of connecting means, each of which connects a corresponding signal source to the system for means for providing an oscillating signal;
means connected to the oscillating signal means and responsive to the oscillating signal therefrom for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled by the first control signal therefrom for applying each of the plurality of signals separately to a respective predetermined connecting means;
second means connected to the first means for receiving the plurality of signals, and connected to the controller and controlled by the second control signal therefrom for verifying that each of the plurality of signals is applied separately to the respective predetermined connecting means and is not present on any of the other connecting means, and providing a verification signal;
detecting means connected to the second means for detecting the frequency of the verification signal and providing an output signal in accordance with the detected frequency; and the controller means connected to the detector and responsive to the output signal therefrom for providing the first and second control signals.
controller means providing first and second control signals;
a plurality of signal sources for providing system input signals;
a plurality of connecting means, each of which connects a corresponding signal source to the system for means for providing an oscillating signal;
means connected to the oscillating signal means and responsive to the oscillating signal therefrom for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled by the first control signal therefrom for applying each of the plurality of signals separately to a respective predetermined connecting means;
second means connected to the first means for receiving the plurality of signals, and connected to the controller and controlled by the second control signal therefrom for verifying that each of the plurality of signals is applied separately to the respective predetermined connecting means and is not present on any of the other connecting means, and providing a verification signal;
detecting means connected to the second means for detecting the frequency of the verification signal and providing an output signal in accordance with the detected frequency; and the controller means connected to the detector and responsive to the output signal therefrom for providing the first and second control signals.
7. A control system of the type responsive to a plurality of signals from external signal sources for providing a control function, comprising:
wiring harness means including a plurality of wires for applying the plurality of signals to the control system;
a controller providing a first and second controlling signals;
means for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled by the first controlling signal for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of signals for receiving said signals, and connected to the controller and controlled by the second controlling signal for verifying that each of the plurality of signals is applied separately only to the respective predetermined wire and for providing a verification signal;
and means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal.
wiring harness means including a plurality of wires for applying the plurality of signals to the control system;
a controller providing a first and second controlling signals;
means for providing a tracer signal;
first means connected to the tracer signal means and responsive to the tracer signal therefrom for providing a plurality of signals, and connected to the controller and controlled by the first controlling signal for applying each of the plurality of signals separately to a respective predetermined wire of the plurality of wires in the wiring harness means;
second means connected to the means for providing a plurality of signals for receiving said signals, and connected to the controller and controlled by the second controlling signal for verifying that each of the plurality of signals is applied separately only to the respective predetermined wire and for providing a verification signal;
and means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal.
8. A control system as described by claim 7, wherein:
the means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal is connected to the controller; and the controller is controlled in response to the output signal for providing the first and second controlling signals.
the means connected to the second means for detecting the frequency of the verification signal and for providing a corresponding output signal is connected to the controller; and the controller is controlled in response to the output signal for providing the first and second controlling signals.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US87331178A | 1978-01-30 | 1978-01-30 | |
US873,311 | 1978-01-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1121002A true CA1121002A (en) | 1982-03-30 |
Family
ID=25361381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000309012A Expired CA1121002A (en) | 1978-01-30 | 1978-08-09 | Control system including built in test equipment for harness interface testing |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS54111069A (en) |
CA (1) | CA1121002A (en) |
DE (1) | DE2901123A1 (en) |
FR (1) | FR2415932A1 (en) |
GB (1) | GB2013933B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3210552A1 (en) * | 1982-03-23 | 1983-10-06 | Bbc Reaktor Gmbh | Device for checking the functions of electronic measuring, control and protection devices in a nuclear power station |
US8374094B2 (en) | 2008-12-11 | 2013-02-12 | Fisher-Rosemount Systems, Inc | Methods and systems to verify a communication path between a field device and a process controller in a process control system |
CN110850337B (en) * | 2019-10-24 | 2022-09-27 | 广州市槿泓电子有限公司 | Multi-wire-bundle testing system, method, device and storage medium |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1386092A (en) * | 1971-04-20 | 1975-03-05 | Plessey Co Ltd | Electrical testing apparatus |
DE2640929C2 (en) * | 1976-09-08 | 1981-06-19 | Siemens AG, 1000 Berlin und 8000 München | Arrangement for testing the cable wiring of conveyor systems with peripheral equipment |
-
1978
- 1978-08-09 CA CA000309012A patent/CA1121002A/en not_active Expired
- 1978-11-29 GB GB7846500A patent/GB2013933B/en not_active Expired
- 1978-12-08 FR FR7834639A patent/FR2415932A1/en active Granted
-
1979
- 1979-01-12 DE DE19792901123 patent/DE2901123A1/en not_active Withdrawn
- 1979-01-23 JP JP565379A patent/JPS54111069A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
DE2901123A1 (en) | 1979-08-02 |
FR2415932B1 (en) | 1981-12-04 |
GB2013933B (en) | 1982-07-21 |
FR2415932A1 (en) | 1979-08-24 |
JPS54111069A (en) | 1979-08-31 |
GB2013933A (en) | 1979-08-15 |
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