CA1072205A - Data storage apparatus with track centering - Google Patents
Data storage apparatus with track centeringInfo
- Publication number
- CA1072205A CA1072205A CA240,571A CA240571A CA1072205A CA 1072205 A CA1072205 A CA 1072205A CA 240571 A CA240571 A CA 240571A CA 1072205 A CA1072205 A CA 1072205A
- Authority
- CA
- Canada
- Prior art keywords
- servo
- track
- data
- tracks
- storage apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/04—Electroplating: Baths therefor from solutions of chromium
- C25D3/06—Electroplating: Baths therefor from solutions of chromium from solutions of trivalent chromium
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/56—Electroplating: Baths therefor from solutions of alloys
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electroplating And Plating Baths Therefor (AREA)
- Moving Of The Head To Find And Align With The Track (AREA)
Abstract
DATA STORAGE APPARATUS
ABSTRACT
Data storage apparatus, as described herein, comprises rotatable storage disks each having a plurality of servo tracks recorded in a servo region on one surface; a servo transducer is moveable by an actuator over the servo tracks under control of signals from an external control unit, and data transducers are ganged for movement to the servo transducer and located over data regions on the disks containing data tracks the position of which are defined by the position of corresponding associated servo tracks. The servo transducer and the actuator form part of a closed loop servo system which derives position error signals from the servo tracks indicative of displacement of the data trans-ducers from data tracks. The position error signals are used during track following phases of the track access operations to cause the closed loop servo system to energize the actuator and move the data transducers in a direction tending to nullify the dis-placement and locate the transducers over a target track. The apparatus further includes a capacitor connectable by means of a switch to function as an integrator in the closed loop servo system.
The switch is controlled during an access operation so as to include the integrator in the servo loop at a time to increase the d.c. gain of the loop during the track following phase at the end of the track access operation.
ABSTRACT
Data storage apparatus, as described herein, comprises rotatable storage disks each having a plurality of servo tracks recorded in a servo region on one surface; a servo transducer is moveable by an actuator over the servo tracks under control of signals from an external control unit, and data transducers are ganged for movement to the servo transducer and located over data regions on the disks containing data tracks the position of which are defined by the position of corresponding associated servo tracks. The servo transducer and the actuator form part of a closed loop servo system which derives position error signals from the servo tracks indicative of displacement of the data trans-ducers from data tracks. The position error signals are used during track following phases of the track access operations to cause the closed loop servo system to energize the actuator and move the data transducers in a direction tending to nullify the dis-placement and locate the transducers over a target track. The apparatus further includes a capacitor connectable by means of a switch to function as an integrator in the closed loop servo system.
The switch is controlled during an access operation so as to include the integrator in the servo loop at a time to increase the d.c. gain of the loop during the track following phase at the end of the track access operation.
Description
ZZO~
The invention relates to data storage apparatus and is a modification of the apparatus described and claimed in the co-pending Canadian application Serial No. 189, 831 filed January 10, 1974 in the name of the assignee herein.
The co-pending application describes a data storage systern in which data transducers are moved by an actuator from one transducing position to another over data tracks on a magnetic disk under control of signals from an e~ternal unit. A servo trans- -ducer ganged to the data transducers derives positional information from servo tracks on the disk. The arrangement is such that a data transducer is in the 'on-track' position when the servo trans -ducer lies centrally displaced between two adjacent servo tracks.
If the data transd-~lcer is off-track an error signal is de~eloped by ::
the servo transducer the magnetic and polarity of which indicates .. ~. .
the degree and direction of the off-set of the data transducer from the 'on-track' position.
During a track-crossing operation the servo error signal changes from positive to negative as alternate tracks are crossed and returns to 2ero when a data transducer is 'on-track'.
20 Th~s signal is used to supply track cross1ng pulses to the file control unit by which means the actual position of the data trans-ducers at any time can be ascertained and an indication of the speed of the transducers across the tracks can be derived. This infor-mation is used to control the actuator to cause the transducers to follow a predetermined velocity profile during an access operation.
In a track following operation the error signal is used to ~ -control the energization of the actuator in a closed loop track fol-lowing system. That is, the error signal i9 suitably modified and O ~;
.
Z2~5 used to control the energization of the actuator in a closed loop track following system. That is, the error signalis suitably modified and used to energi ze the actuator so as to move the transducer s towards the on-track position thus reducing the error signal accordingly.
In the ideal case the closed loop system would locate the transducers precisely 'on-track' during a track following operation with zero error signal generated. In practice, with apparatus such as described in our co-pending application, this ideal case may not always be realized. For example, there is considerable air flow across magnetic recording disks rotating at high speeds and the force of this 'windage' on the actuator and transducers tends to move the transducers off-track until the error signal is large enough to generate a proportionate counter-balancing force leaving the transducers displaced off-track. As track densitites are increased this displacement becomes more significant and an additional constraint is imposed on the theoretical track density of the apparatus. In practice this displacement typically should ~;
not exceed one tenth of a track in magnitude.
Data storage apparatus, according to the invention, ~ ;
comprises one or more rotatable storage disks having a plurality of servo tracks recorded in a servo region on one surface thereof, a servo transducer moveable by an actuator over the servo tracks under control of signals from an external control uni, and one or more data transducers ganged for rnovement to the servo trans~
ducer and located over data regions on the disk or disks containing data tracks the position of which are defined by the position of corresponding servo tracks associated therewith, the servo trans-ducer and the actuator forming part of a closed loop servo system ~3-.~, .,. .: ~ .
.
'' .. ' ' : ~ :', '' ''' :, ' ' : .
' . . : ' ' : :' : ~ . : :
.
z%~ :
which derives position error signals from the servo tracks indicative of displacement of the data transducers from data tracks, the position error signals being used during track following phases of the track access operations to cause the closed loop servo sys-tem to energise the actuator to move the data transducers in a direction tending to nullify the displacement and locate the trans-ducers over a target track, the apparatus further including a capacitor connectable by means of a switch to function as an integrator in the closed loop servo system, the switch being con-]0 trolled during an access operation so as to include the integrator in the servo loop at a time to increase the d. c. gain of the loop during the track following phase at the end of the track access operation .
In order that the invention may be fully understood, preferred embodiments thereof will now be described with ref-erence to the accompanying drawings.
In the D r awing s . :
Figure ]. shows schematically data storage apparatus incorporating the present invention;
Figure 2 shows a block diagram of a circuit completing a servo position loop connecting a servo transducer with a voice :coil actuator;
Figures 3a to 3c shows the error signal used in the circuit shown in Figure 2 and logic signals derived therefrom;
Figures 4a to 4e shows a velocity profile of a track access, the error signal derived during the access, and control signals required during the access;
Figures Sa to Sf show a typical error signal at the end -4- :
~ . ......... , ~ . . . : . .
of an access operation without the modifications of the present invention, and an error signal with the modifications of the present invention;
Figures 6a to 6c show logic signals used to control the modified apparatus during a track access operation;
Figure 7 shows the compensator circuit included in the servo position loop modified according to the present invention;
and Figure 8 shows in detail the modified compensator circuit.
The data storage apparatus incorporating the present invention is shown schematically in Figure 1. Here a magnetic disk 1 is shown, rotatable about a central spindle 2 with two sets of concentric data tracks 3 and 4 on one surface and one set of concentric servo tracks 5 on the other surface. Data transducers 6 and 7 are provided to write data on and to read data from the data tracks 3 and 4. A servo transducer 8 reads position informa- -tion from the servo tracks 5. All three transducers 6, 7 and 8 are ganged together and are simultaneously moved over the sur-face of the disk 1 by a head positioning mechanism under control of an external control unit neither of which are shownin~the figure. -The head positioning mechanism used in this apparatus -consists briefly of a pivoted lightweight bifurcated arm with the transducers 6, 7 and 8 supported at one end and a voice coil ~ .": :, actuator at the other end. The voice coil winding of the actuator is centre tapped and, as is described in our aforesaid co-pending application, energi~ation of one half of the winding moves the transducers in one direction across the tracks on the disk 1 and ,' : ', ,: , . , , ., . :, . -, - : ~
.. . . . . ..
energization of the other half moves them in the opposite direction.
The block diagram of the circuitry for controlling the transducers during track accessing and track following operations is shown in Figure Z. This circuitry is described in detail in our aforesaid co-pending application and only a brief description will be given here sufficient for the understanding of the present invention.
The servo transducer 8 and a pre-amplifier 9 for the servo signals are shown rnounted o~ one end of an arm 10. The arm ] 0 is pivoted about pivot l ] and, together with the actuator 12 connected to the ]0 other end, constitutes the head positioning mechanism. The centre tapped winding 13 of the actuator is mounted on the arm ]0 and when energized produces a field which co-operates with the statio-nary magnetic field of a permanent magnet stator 14, to produce rotation of the arm lO about its pivot ll in the appropriate direction.
In operation, the servo transducer 8 derives information indicating its position relative to the on-track position from the bank of servo tracks 4. The encoding of the servo tracks is fully ~-described in our aforesaid co-pending application. During the ;
track following phases of a track acccss operation the servo posi-tion signals derived from the servo tracks are produced as dif-ferential signals on two output lines 15 and 16 from transducer &.
These differential signals are amplified by pre-amplifier 9 and supplied on lines 17 and 18 to a demodulator 19 to produce dif-ferential error signals on output lines 20 and 2] which indicate by their magnitude and polarit~ the degree and direction of any!pff-set of the servo transducer 8 and therefore the data transducers ~ and 7 from the on-track position.
These differential signals are converted by a compen-.- ~ ................................. - . .
: . :
Z ~ 5 sator circuit 22 to provide a single ended output on line 23 which in turn is used to supply positive or negative signals to driver 24.
The driver 14 supplied drive currents on lines 25 and 26 to energize the appropriate half of the voice coil winding ] 3 to nlove the arm 10 in a direction to reduce the position error.
Figure 3a shows a plot of error signal voltage Ev against time t appearing at the output of the demodulator 19 during a track crossing operation. The portion of the signal illustrated starts at Pl with the data transducers on track and zero error signal voltage.
As the data transducers mave towards the next track, the error ~ -signal Ev increases from zero to a maximum at P2 halfway between tracks and reduces to zero at P3 the next on~track position. ~ -Continued movement of the data transducers in the same direction . .
results in the error signal going negative, reaching a maximum negativa value at P4 and returning to zero at the next on-track position P5, and 90 on.
When the data transducers are moved across tracks from one track to another during an access operation, the actuator is under control of signals supp1ied either to IN-terminal 27 or OUT- ;
20 ~ terminal 28. These signals cause driver 24 to supply drive cur-rent~ on the appropriate line 25 or 26 to drive the transducers e1ther in the IN-direction towards the spindle 2 or in the OUT-direction away rom the spindle and are large enough. to swarnp the error signal frorn the compensator 23. The servo loop is ~ -thereby prevented from gaining control and maintaining the tranY-ducers in a track following mode.
By appropriate energization of the IN and OUT drivers, the transducers are caused to follow a predetermined velocity ~ .-. ..
.... . ...
.
Z~
profile. A typical velocity profile for an access of eight or more tracks is shown in Figure 4a with the resulting servo error signal Ev shown below as Figure 4b. The velocity profile consists of three phases:
1. An acceleration phase (track 0 to track 3)
The invention relates to data storage apparatus and is a modification of the apparatus described and claimed in the co-pending Canadian application Serial No. 189, 831 filed January 10, 1974 in the name of the assignee herein.
The co-pending application describes a data storage systern in which data transducers are moved by an actuator from one transducing position to another over data tracks on a magnetic disk under control of signals from an e~ternal unit. A servo trans- -ducer ganged to the data transducers derives positional information from servo tracks on the disk. The arrangement is such that a data transducer is in the 'on-track' position when the servo trans -ducer lies centrally displaced between two adjacent servo tracks.
If the data transd-~lcer is off-track an error signal is de~eloped by ::
the servo transducer the magnetic and polarity of which indicates .. ~. .
the degree and direction of the off-set of the data transducer from the 'on-track' position.
During a track-crossing operation the servo error signal changes from positive to negative as alternate tracks are crossed and returns to 2ero when a data transducer is 'on-track'.
20 Th~s signal is used to supply track cross1ng pulses to the file control unit by which means the actual position of the data trans-ducers at any time can be ascertained and an indication of the speed of the transducers across the tracks can be derived. This infor-mation is used to control the actuator to cause the transducers to follow a predetermined velocity profile during an access operation.
In a track following operation the error signal is used to ~ -control the energization of the actuator in a closed loop track fol-lowing system. That is, the error signal i9 suitably modified and O ~;
.
Z2~5 used to control the energization of the actuator in a closed loop track following system. That is, the error signalis suitably modified and used to energi ze the actuator so as to move the transducer s towards the on-track position thus reducing the error signal accordingly.
In the ideal case the closed loop system would locate the transducers precisely 'on-track' during a track following operation with zero error signal generated. In practice, with apparatus such as described in our co-pending application, this ideal case may not always be realized. For example, there is considerable air flow across magnetic recording disks rotating at high speeds and the force of this 'windage' on the actuator and transducers tends to move the transducers off-track until the error signal is large enough to generate a proportionate counter-balancing force leaving the transducers displaced off-track. As track densitites are increased this displacement becomes more significant and an additional constraint is imposed on the theoretical track density of the apparatus. In practice this displacement typically should ~;
not exceed one tenth of a track in magnitude.
Data storage apparatus, according to the invention, ~ ;
comprises one or more rotatable storage disks having a plurality of servo tracks recorded in a servo region on one surface thereof, a servo transducer moveable by an actuator over the servo tracks under control of signals from an external control uni, and one or more data transducers ganged for rnovement to the servo trans~
ducer and located over data regions on the disk or disks containing data tracks the position of which are defined by the position of corresponding servo tracks associated therewith, the servo trans-ducer and the actuator forming part of a closed loop servo system ~3-.~, .,. .: ~ .
.
'' .. ' ' : ~ :', '' ''' :, ' ' : .
' . . : ' ' : :' : ~ . : :
.
z%~ :
which derives position error signals from the servo tracks indicative of displacement of the data transducers from data tracks, the position error signals being used during track following phases of the track access operations to cause the closed loop servo sys-tem to energise the actuator to move the data transducers in a direction tending to nullify the displacement and locate the trans-ducers over a target track, the apparatus further including a capacitor connectable by means of a switch to function as an integrator in the closed loop servo system, the switch being con-]0 trolled during an access operation so as to include the integrator in the servo loop at a time to increase the d. c. gain of the loop during the track following phase at the end of the track access operation .
In order that the invention may be fully understood, preferred embodiments thereof will now be described with ref-erence to the accompanying drawings.
In the D r awing s . :
Figure ]. shows schematically data storage apparatus incorporating the present invention;
Figure 2 shows a block diagram of a circuit completing a servo position loop connecting a servo transducer with a voice :coil actuator;
Figures 3a to 3c shows the error signal used in the circuit shown in Figure 2 and logic signals derived therefrom;
Figures 4a to 4e shows a velocity profile of a track access, the error signal derived during the access, and control signals required during the access;
Figures Sa to Sf show a typical error signal at the end -4- :
~ . ......... , ~ . . . : . .
of an access operation without the modifications of the present invention, and an error signal with the modifications of the present invention;
Figures 6a to 6c show logic signals used to control the modified apparatus during a track access operation;
Figure 7 shows the compensator circuit included in the servo position loop modified according to the present invention;
and Figure 8 shows in detail the modified compensator circuit.
The data storage apparatus incorporating the present invention is shown schematically in Figure 1. Here a magnetic disk 1 is shown, rotatable about a central spindle 2 with two sets of concentric data tracks 3 and 4 on one surface and one set of concentric servo tracks 5 on the other surface. Data transducers 6 and 7 are provided to write data on and to read data from the data tracks 3 and 4. A servo transducer 8 reads position informa- -tion from the servo tracks 5. All three transducers 6, 7 and 8 are ganged together and are simultaneously moved over the sur-face of the disk 1 by a head positioning mechanism under control of an external control unit neither of which are shownin~the figure. -The head positioning mechanism used in this apparatus -consists briefly of a pivoted lightweight bifurcated arm with the transducers 6, 7 and 8 supported at one end and a voice coil ~ .": :, actuator at the other end. The voice coil winding of the actuator is centre tapped and, as is described in our aforesaid co-pending application, energi~ation of one half of the winding moves the transducers in one direction across the tracks on the disk 1 and ,' : ', ,: , . , , ., . :, . -, - : ~
.. . . . . ..
energization of the other half moves them in the opposite direction.
The block diagram of the circuitry for controlling the transducers during track accessing and track following operations is shown in Figure Z. This circuitry is described in detail in our aforesaid co-pending application and only a brief description will be given here sufficient for the understanding of the present invention.
The servo transducer 8 and a pre-amplifier 9 for the servo signals are shown rnounted o~ one end of an arm 10. The arm ] 0 is pivoted about pivot l ] and, together with the actuator 12 connected to the ]0 other end, constitutes the head positioning mechanism. The centre tapped winding 13 of the actuator is mounted on the arm ]0 and when energized produces a field which co-operates with the statio-nary magnetic field of a permanent magnet stator 14, to produce rotation of the arm lO about its pivot ll in the appropriate direction.
In operation, the servo transducer 8 derives information indicating its position relative to the on-track position from the bank of servo tracks 4. The encoding of the servo tracks is fully ~-described in our aforesaid co-pending application. During the ;
track following phases of a track acccss operation the servo posi-tion signals derived from the servo tracks are produced as dif-ferential signals on two output lines 15 and 16 from transducer &.
These differential signals are amplified by pre-amplifier 9 and supplied on lines 17 and 18 to a demodulator 19 to produce dif-ferential error signals on output lines 20 and 2] which indicate by their magnitude and polarit~ the degree and direction of any!pff-set of the servo transducer 8 and therefore the data transducers ~ and 7 from the on-track position.
These differential signals are converted by a compen-.- ~ ................................. - . .
: . :
Z ~ 5 sator circuit 22 to provide a single ended output on line 23 which in turn is used to supply positive or negative signals to driver 24.
The driver 14 supplied drive currents on lines 25 and 26 to energize the appropriate half of the voice coil winding ] 3 to nlove the arm 10 in a direction to reduce the position error.
Figure 3a shows a plot of error signal voltage Ev against time t appearing at the output of the demodulator 19 during a track crossing operation. The portion of the signal illustrated starts at Pl with the data transducers on track and zero error signal voltage.
As the data transducers mave towards the next track, the error ~ -signal Ev increases from zero to a maximum at P2 halfway between tracks and reduces to zero at P3 the next on~track position. ~ -Continued movement of the data transducers in the same direction . .
results in the error signal going negative, reaching a maximum negativa value at P4 and returning to zero at the next on-track position P5, and 90 on.
When the data transducers are moved across tracks from one track to another during an access operation, the actuator is under control of signals supp1ied either to IN-terminal 27 or OUT- ;
20 ~ terminal 28. These signals cause driver 24 to supply drive cur-rent~ on the appropriate line 25 or 26 to drive the transducers e1ther in the IN-direction towards the spindle 2 or in the OUT-direction away rom the spindle and are large enough. to swarnp the error signal frorn the compensator 23. The servo loop is ~ -thereby prevented from gaining control and maintaining the tranY-ducers in a track following mode.
By appropriate energization of the IN and OUT drivers, the transducers are caused to follow a predetermined velocity ~ .-. ..
.... . ...
.
Z~
profile. A typical velocity profile for an access of eight or more tracks is shown in Figure 4a with the resulting servo error signal Ev shown below as Figure 4b. The velocity profile consists of three phases:
1. An acceleration phase (track 0 to track 3)
2. A constant velocity phase (track 3 to track N-5, where N
is the target track).
is the target track).
3. A retardation phase (track N-5 to track N)o During the retardation phase the speed of the transducers is controlled in order that the position loop can capture the servo transducer 8 and hold it on track at the required destination. If the approach speed is too high then overshoot will occur. A suitable approach speed or capture velocity Vc for this apparatus has been found to be about 2. 9 milliseconds per track. t . :
Selection of the three phases iS determined by access control signals supplied bsr the external control unit on two logic lines known as Seek I and Seek 2 lines. The signal 10vels on these lines shown in Figure 4c and 4d respectiYely~ The logic circuitry also includes a velocity follow latch (VFL) which is set when the Seek 2 signal is raised and remains set until the next linear region of the error signal E~r of Figure 3, is entered after the Seek 2 .. . .
signal is lowered. ~ The signal output from this latch is shown in Figure 4e. The logic circuitry, fully described in our aforesaid co-pending application, responds to accelerate the transducers when the Seek 1 signal is 'up' and the Seek 2 signal is 'down';
drive the transducers at a uniform ~zelocity Vs when both Seek 1 and Seek 2 signals are 'up'; and retard the transducers when the Seek 1 signal i9 'down' and the Seek 2 signal is 'up'.
, Z~5 When the Seek 1 and Seek ~ lines are down and the VFL
has been re-set the access signals are removed from terminals 27 and 28 and the servo loop is once more permitted to regain control and complete the servo lock with the heads in the track following mode .
Figure 3b and Figure 3c show logic signals derived from the servo error signal of Figure 3a which are required to control track access operations and which will need to be referred to later. Figure 3b represents by its up-level the linear portions of the error signal Ev. In practice, this portion extends over +25% of each track about the on-track position. Figure 3b repre-sents by its up-level the on-track position. The arrangement is ~hat the signal drops if the transducers move more than 300 micro- ~ -inches away from the on-track position. The circuitry for gener- i ~-ating these signals and the explanation of how they are used is fully described in our aforesaid co-pending application.
The description so far is a brief summary of the apparatus described in detail in our aforesaid co-pending application and how it functions to perform track accessing and track following - ~ -operations. Ideally, whilst track following the data transducers 6 and 7 are accurately located over the data tracks by the track fol-lowing elec~ronics with zero error signal being derived by tha servo head 8. In practice this has been found not to be the case.
~r flow across the rotating disk surface for example produces a force on the positioning mechanism which moves the transducers :..... : . ;:
off-track. Electronic wiring from the actuator can also act against ~ -the positioning mechanis~n to hold the transducers off-track. The forces generated by these effects move the arm off^track until the _ 9 ' :' ` ' . . . . , . . . : " ' '. :. ~ ' ' ' :
~7'~
error signal generates the required counter balancing force. The resultant off-set displacernent is not always acceptable.
The problem is illustrated in Figure 5 which shows in Figure 5a a plot of error voltage Ev against ti~ne at the end of a ,._ .
track access for an outward seek, and in Figure 5b for an inward seek. In each case it is assu~ned that the displacement d due to windage and other constant mechanical forces is outwards towards the periphery of the disk. P-oint P6 on the waveform is the start of the linear region of the destination track at which time the ~IFL is - ;~
re-set. From this point on the servo loop electronics i9 attempting to gain control to bring the transducers to rest over the destination track and maintain them in a track following mode until the next access is performed. The VFL output reset at the start of the linear region is shown in Figure 6a. -For a given track density, the apparatus can tolerate some degree of displacement off-track. Clearl~ however as the track density is increased, the acceptable displacement d must be reduced by a proportionate amount. The modification to the appa-ratus described in our aforesald co-pending application has the ZO effect of reducing this displacement d and consequently permits an increase in track density of the storage apparatus. The modlfication includes the introduction o an additional integrator ;n the servo po8ition loop electronics and conveniently this is achieved by the ~
provision of a capacitor C2 in the compensator circuit 22. The -conlpensator circuit 22 u~ed in this modified apparatus is shown in Figure 7.
In the embodiment shown, in this figure the capacitor C2 is connectable into the feedback loop of the operational amplifier -10- .
29 by means of a switch 30; itself controlled by a control circuit 31 receiving logic signals on input line 32 from the control unit. A
suitable operational amplifier is the commercially available 741 operational amplifier. With the switch connected as shown as -position A, capacitor C2 is excluded and only feedback resistor R3 is connected across the amplifier. In this position the compensator operates substantially as in our aforesaid co-pending application providing conventional phase lead compensation for the servo posi-tion loop. Comparison of the inputs to the operational amplifier 29 with that in our previous application shows thàt the input circuits have been modified somewhat.
In our previous application the inputs are symmetrical ;~
and ideally this should be the case with the present apparatus. How-ever, to do this would require the switching integrator network to be duplicated in the non-inverting lin~b of the amplifier. An alter-. : . . .
native would be to provide a balance-to-unbalance a~nplifier preced- ~-ng the integrator-compensator amplifier. In order to avoid the additional expen~e of this duplication or addition, a compromise ~ -solution~has been reached. The part of the differential error input signal appearing at terminal 21 is applied to the in~erting side of ~.,. .: , .
amplifier 29 thro~}gh resistor Rl and capacitor Cl connected in -parallel and resistor R2. The signal is-also supplied to the non- , i nverting input through resi3tor R4. The part of the differential error input signal appearing at terminal 20 (which is the inverse of the signal at terminal 21) is applied to the non-inverting inpllt only through resistor RS. In practice R4 equals R5 and the parallel ~ ' -combination of R4 and R5 equals the value of Rl + R2. Thi com-promi~e solution gives the correct transfer function for the -1].~
-~o~z~s difference mode input but transfers the common mode input with unity gain. This i9 acceptable in the present application.
With the switch 30 in position B the capacitor CZ is con-nected in series with the feedback resistor R3 so converting the operational amplifier 29 into an integrator. This results in the servo loop gain becoming virtually infinite at d. c. Consequently, the torque required to counterbalance any steady force producing a position off-set will be generated by an infinitesimal position off- -set of the transducer. The voltage built up on the capacitor C2 will produce this torque.
Figure 5c shows a plot of error voltage Ev against time at the end of a track access for an outward seek with the switch 30 in the position B. Figure 5d shows a sinlilar waveform for an inward seek. In both cases the addition of the further integrator to increase the gain of the servo loop during the track following phase of the access operation has the effect of overcoming the forces pro-ducing the off-set and the transducers are accurately located over the target tracks. From the two waveforms, however, it is seen that the settling time t~ of the ser~o loop is fairly long. This delay Z0 in settling i3 caused by switching in the integrator at a time so that the whole of the settling transient of the compensated error signal supplied to the integrator is itself integrated. The effect of this is ~ - -that after a short over-shoot, the tranqducers swing back in the direction of the original approach settling back with a relatively long time con~tant to the ON-track position as the charge on capacitor CZ is re-adjusted. The superimposition of an off-set force has the effect of decreasing the settling time for an approach in the same sense as thè off-set force and increasing it for an approach in the - lZ-'' . ' .
. ~ . . , . . . . ... ~ .
] opposite sense.
The problem is resolved by delaying the switching-in of the integrator until such time that the integration of the subsequent compensated error signal will be substantially zero. The optimum switching time was of the integrator derived experimentally and found to be 0. 7 m. secs after the initiation of the track crossing pulse for the target track.
Figure 5e shows the error voltage plot Er for an outward seek with the switching of the integrator into the feedback loop delayed by this amount. Figure 5f shows a similar plot for an inward seek. It is from these figures that in both cases the setting time tZ is considerably reduced. The logic lines required to control this delayed switching are shown in Figure 6. As previously men-tioned the VFL output is shown in Figure 6a indicating the start of ~;
the linear region of the destination track. The ON-track signal for the destmation track is shown in Figure 6b switching to its up level 300 microinches before the track is reached as previously explained.
The waveform of the control signal on line 32 to the switch control circu~t 31 dela~ed br the requisite amount after the front edge of the on-track signal is shown in Figure 6c.
It has further been found from experimental observations ' that for a particular apparatus the position off-set d does not vary much fro~n track to track. Accordingly, as each track access is ; -performed the capacitor C2 will be charged each time to a similar value. The settling time of the apparatus can thus be further reduced by arranging for the capacitor CZ to retain its charge from one access operation to another. The time otherwise required for the capacitor to acquire its charge is thus eliminated. Figure 5e Q~i shows in dotted lines the further reduced settling time t3 obtained when the capacitor retains its charge during an outward seek.
Figure 5f shows a similar waveform during an inward seek. It is .
seen therefore that the effect of introducing the integrator at an optimum time and further permitting the integrating capacitor C2 to retain its charge during accesses has the combined effect of locating ', transducers accurately on-track after an outward or an inward seek with no penalty in the way of increased setting time.
Figure ~ shows the detailed circuitry of the compensator ' modified according to the invention to include the switchable integrator feature, the charge holding faature, and the delay circuit for switching in the integrator at the optimum time. The operational aIr~plifier compensator portion of the circuit is shown as the left hand part of the figure and has already been described with reference to Figure 7.
Capacitor C2 is connected in series with feed-back resistor R3 when tra~nsistor Tl is OFF and transistor T2 is ON and is disconnected when transistor Tl is ON and transistor T2 is OFF.
During the switching operation, capacitor G2 is isolated by arranging for both transistors Tl and T2 to be simultaneously held OFF for a -short time prior to swltching transistor T] on. By this means the charge on the capacitor C2 is retained between accesses. How this isolation of the capacitor C2 i8 a,chieved will be made apparent in .: ~
the following description of the operation of the circuit during a track access operation. ', ', The control signal on line 32 to the switch control , '' circuit 31 is supplied from ~ND gate 33. This gate supplie~ a , ~ , ,: . .
posihve signal on its output in response to the logic combination ' ,, ~, .
VFL SEEK 1 ON TRACK. Since'an access operation is commenced -14- ~ , ~. ~. .' , : .. .. , , : . . :
., . . ,: . .. .. , . , . ~. . : ...
7ZZ1~5 by raising the SEEK 1 line, the output from AND gate 33 at this time is down. The voltage level defined by resistors R10, R] l and R] 3 are such that transistor TS is turned ON rapidly discharging capac-itor C3 to ground. The voltage at the collector of transistor T5 accordingly goes more positive and transistor T4 is switched ON
through diode D3. Transistors T3 and T4 are connected as a long-tail pair so that transistor T4 is switched ON, so transistor T3 is switched OFF. This in turn causes transistor T2 to switch OE`F dis- -connecting capacitor C2 and transistor T1 to switch ON connecting feedback resistor R3 across the operational amplifier 29. Resistors R6 and R7 and tail resistor R9 are so valued that when the tail cur- ;
rent 12 is equally divided between transistors Tl and T2 then both transistors T] and TZ are OFF so that no discharge path is provided for capacitor C2. Diodes D1 and D2 are connected to prevent damage of transistor T1 by excessive reverse emitter-base voltage and diodes D4 and D5 are connected so as to restrict voltage excursions at the base of the transistor T~.
At the; end of the constant velocity phase of the access, Seek ] drops and one of the inputs ia supplied to AND-gate 33. The 20 ~ gate remains unabled however since the VFL remains set until the linear region is entered for the destination track. In fact, lt is not until the ON-TRAGT signal is raised for the destination track that -:
all three inputs to the AND gate 33 are UP and a positive output . : :
voltage is supplied on output line 32.
A positive voltage on line 32 causes transistor T5 to .: , switch OFF causing the voltage at the base of transistor T4 to fall e~ponentially at a rate determined by the time constant of capacitor C3 and resistor Rll. When the voltage has fallen to approximately l()~ZZl)S
5. 3 volts transistor T4 is turned OFF and transistor T3 turned ON.
These in turn connect integrating capacitor C2 in series with the feedback resistor R3 by switching transistor Tl OFF and transistor TZ ON. The ti~rle constant of the circuit including capacitor C3 is selected so that the required delay of 0.7 m. secs is achieved from the start of the ON TRAC~ signal until the integrating capacitor C2 is switched into the circuit. As before both transistor Tl and transistor T2 are held for a short period in a non-conducting state when the tail current through each transistor is equal so that no 10discharge path is provided for the capacitor C2 and its charge is retained for the next access operation.
In the preferred embodiment described, the circuit was such that the integrating function occured subsequent to the phase lead compensation of the servo loop. Clearly to one skilled in the art, the circuit may be modified to include the function prior to the phase lead compensation without departing~ from the present invention.
Selection of the three phases iS determined by access control signals supplied bsr the external control unit on two logic lines known as Seek I and Seek 2 lines. The signal 10vels on these lines shown in Figure 4c and 4d respectiYely~ The logic circuitry also includes a velocity follow latch (VFL) which is set when the Seek 2 signal is raised and remains set until the next linear region of the error signal E~r of Figure 3, is entered after the Seek 2 .. . .
signal is lowered. ~ The signal output from this latch is shown in Figure 4e. The logic circuitry, fully described in our aforesaid co-pending application, responds to accelerate the transducers when the Seek 1 signal is 'up' and the Seek 2 signal is 'down';
drive the transducers at a uniform ~zelocity Vs when both Seek 1 and Seek 2 signals are 'up'; and retard the transducers when the Seek 1 signal i9 'down' and the Seek 2 signal is 'up'.
, Z~5 When the Seek 1 and Seek ~ lines are down and the VFL
has been re-set the access signals are removed from terminals 27 and 28 and the servo loop is once more permitted to regain control and complete the servo lock with the heads in the track following mode .
Figure 3b and Figure 3c show logic signals derived from the servo error signal of Figure 3a which are required to control track access operations and which will need to be referred to later. Figure 3b represents by its up-level the linear portions of the error signal Ev. In practice, this portion extends over +25% of each track about the on-track position. Figure 3b repre-sents by its up-level the on-track position. The arrangement is ~hat the signal drops if the transducers move more than 300 micro- ~ -inches away from the on-track position. The circuitry for gener- i ~-ating these signals and the explanation of how they are used is fully described in our aforesaid co-pending application.
The description so far is a brief summary of the apparatus described in detail in our aforesaid co-pending application and how it functions to perform track accessing and track following - ~ -operations. Ideally, whilst track following the data transducers 6 and 7 are accurately located over the data tracks by the track fol-lowing elec~ronics with zero error signal being derived by tha servo head 8. In practice this has been found not to be the case.
~r flow across the rotating disk surface for example produces a force on the positioning mechanism which moves the transducers :..... : . ;:
off-track. Electronic wiring from the actuator can also act against ~ -the positioning mechanis~n to hold the transducers off-track. The forces generated by these effects move the arm off^track until the _ 9 ' :' ` ' . . . . , . . . : " ' '. :. ~ ' ' ' :
~7'~
error signal generates the required counter balancing force. The resultant off-set displacernent is not always acceptable.
The problem is illustrated in Figure 5 which shows in Figure 5a a plot of error voltage Ev against ti~ne at the end of a ,._ .
track access for an outward seek, and in Figure 5b for an inward seek. In each case it is assu~ned that the displacement d due to windage and other constant mechanical forces is outwards towards the periphery of the disk. P-oint P6 on the waveform is the start of the linear region of the destination track at which time the ~IFL is - ;~
re-set. From this point on the servo loop electronics i9 attempting to gain control to bring the transducers to rest over the destination track and maintain them in a track following mode until the next access is performed. The VFL output reset at the start of the linear region is shown in Figure 6a. -For a given track density, the apparatus can tolerate some degree of displacement off-track. Clearl~ however as the track density is increased, the acceptable displacement d must be reduced by a proportionate amount. The modification to the appa-ratus described in our aforesald co-pending application has the ZO effect of reducing this displacement d and consequently permits an increase in track density of the storage apparatus. The modlfication includes the introduction o an additional integrator ;n the servo po8ition loop electronics and conveniently this is achieved by the ~
provision of a capacitor C2 in the compensator circuit 22. The -conlpensator circuit 22 u~ed in this modified apparatus is shown in Figure 7.
In the embodiment shown, in this figure the capacitor C2 is connectable into the feedback loop of the operational amplifier -10- .
29 by means of a switch 30; itself controlled by a control circuit 31 receiving logic signals on input line 32 from the control unit. A
suitable operational amplifier is the commercially available 741 operational amplifier. With the switch connected as shown as -position A, capacitor C2 is excluded and only feedback resistor R3 is connected across the amplifier. In this position the compensator operates substantially as in our aforesaid co-pending application providing conventional phase lead compensation for the servo posi-tion loop. Comparison of the inputs to the operational amplifier 29 with that in our previous application shows thàt the input circuits have been modified somewhat.
In our previous application the inputs are symmetrical ;~
and ideally this should be the case with the present apparatus. How-ever, to do this would require the switching integrator network to be duplicated in the non-inverting lin~b of the amplifier. An alter-. : . . .
native would be to provide a balance-to-unbalance a~nplifier preced- ~-ng the integrator-compensator amplifier. In order to avoid the additional expen~e of this duplication or addition, a compromise ~ -solution~has been reached. The part of the differential error input signal appearing at terminal 21 is applied to the in~erting side of ~.,. .: , .
amplifier 29 thro~}gh resistor Rl and capacitor Cl connected in -parallel and resistor R2. The signal is-also supplied to the non- , i nverting input through resi3tor R4. The part of the differential error input signal appearing at terminal 20 (which is the inverse of the signal at terminal 21) is applied to the non-inverting inpllt only through resistor RS. In practice R4 equals R5 and the parallel ~ ' -combination of R4 and R5 equals the value of Rl + R2. Thi com-promi~e solution gives the correct transfer function for the -1].~
-~o~z~s difference mode input but transfers the common mode input with unity gain. This i9 acceptable in the present application.
With the switch 30 in position B the capacitor CZ is con-nected in series with the feedback resistor R3 so converting the operational amplifier 29 into an integrator. This results in the servo loop gain becoming virtually infinite at d. c. Consequently, the torque required to counterbalance any steady force producing a position off-set will be generated by an infinitesimal position off- -set of the transducer. The voltage built up on the capacitor C2 will produce this torque.
Figure 5c shows a plot of error voltage Ev against time at the end of a track access for an outward seek with the switch 30 in the position B. Figure 5d shows a sinlilar waveform for an inward seek. In both cases the addition of the further integrator to increase the gain of the servo loop during the track following phase of the access operation has the effect of overcoming the forces pro-ducing the off-set and the transducers are accurately located over the target tracks. From the two waveforms, however, it is seen that the settling time t~ of the ser~o loop is fairly long. This delay Z0 in settling i3 caused by switching in the integrator at a time so that the whole of the settling transient of the compensated error signal supplied to the integrator is itself integrated. The effect of this is ~ - -that after a short over-shoot, the tranqducers swing back in the direction of the original approach settling back with a relatively long time con~tant to the ON-track position as the charge on capacitor CZ is re-adjusted. The superimposition of an off-set force has the effect of decreasing the settling time for an approach in the same sense as thè off-set force and increasing it for an approach in the - lZ-'' . ' .
. ~ . . , . . . . ... ~ .
] opposite sense.
The problem is resolved by delaying the switching-in of the integrator until such time that the integration of the subsequent compensated error signal will be substantially zero. The optimum switching time was of the integrator derived experimentally and found to be 0. 7 m. secs after the initiation of the track crossing pulse for the target track.
Figure 5e shows the error voltage plot Er for an outward seek with the switching of the integrator into the feedback loop delayed by this amount. Figure 5f shows a similar plot for an inward seek. It is from these figures that in both cases the setting time tZ is considerably reduced. The logic lines required to control this delayed switching are shown in Figure 6. As previously men-tioned the VFL output is shown in Figure 6a indicating the start of ~;
the linear region of the destination track. The ON-track signal for the destmation track is shown in Figure 6b switching to its up level 300 microinches before the track is reached as previously explained.
The waveform of the control signal on line 32 to the switch control circu~t 31 dela~ed br the requisite amount after the front edge of the on-track signal is shown in Figure 6c.
It has further been found from experimental observations ' that for a particular apparatus the position off-set d does not vary much fro~n track to track. Accordingly, as each track access is ; -performed the capacitor C2 will be charged each time to a similar value. The settling time of the apparatus can thus be further reduced by arranging for the capacitor CZ to retain its charge from one access operation to another. The time otherwise required for the capacitor to acquire its charge is thus eliminated. Figure 5e Q~i shows in dotted lines the further reduced settling time t3 obtained when the capacitor retains its charge during an outward seek.
Figure 5f shows a similar waveform during an inward seek. It is .
seen therefore that the effect of introducing the integrator at an optimum time and further permitting the integrating capacitor C2 to retain its charge during accesses has the combined effect of locating ', transducers accurately on-track after an outward or an inward seek with no penalty in the way of increased setting time.
Figure ~ shows the detailed circuitry of the compensator ' modified according to the invention to include the switchable integrator feature, the charge holding faature, and the delay circuit for switching in the integrator at the optimum time. The operational aIr~plifier compensator portion of the circuit is shown as the left hand part of the figure and has already been described with reference to Figure 7.
Capacitor C2 is connected in series with feed-back resistor R3 when tra~nsistor Tl is OFF and transistor T2 is ON and is disconnected when transistor Tl is ON and transistor T2 is OFF.
During the switching operation, capacitor G2 is isolated by arranging for both transistors Tl and T2 to be simultaneously held OFF for a -short time prior to swltching transistor T] on. By this means the charge on the capacitor C2 is retained between accesses. How this isolation of the capacitor C2 i8 a,chieved will be made apparent in .: ~
the following description of the operation of the circuit during a track access operation. ', ', The control signal on line 32 to the switch control , '' circuit 31 is supplied from ~ND gate 33. This gate supplie~ a , ~ , ,: . .
posihve signal on its output in response to the logic combination ' ,, ~, .
VFL SEEK 1 ON TRACK. Since'an access operation is commenced -14- ~ , ~. ~. .' , : .. .. , , : . . :
., . . ,: . .. .. , . , . ~. . : ...
7ZZ1~5 by raising the SEEK 1 line, the output from AND gate 33 at this time is down. The voltage level defined by resistors R10, R] l and R] 3 are such that transistor TS is turned ON rapidly discharging capac-itor C3 to ground. The voltage at the collector of transistor T5 accordingly goes more positive and transistor T4 is switched ON
through diode D3. Transistors T3 and T4 are connected as a long-tail pair so that transistor T4 is switched ON, so transistor T3 is switched OFF. This in turn causes transistor T2 to switch OE`F dis- -connecting capacitor C2 and transistor T1 to switch ON connecting feedback resistor R3 across the operational amplifier 29. Resistors R6 and R7 and tail resistor R9 are so valued that when the tail cur- ;
rent 12 is equally divided between transistors Tl and T2 then both transistors T] and TZ are OFF so that no discharge path is provided for capacitor C2. Diodes D1 and D2 are connected to prevent damage of transistor T1 by excessive reverse emitter-base voltage and diodes D4 and D5 are connected so as to restrict voltage excursions at the base of the transistor T~.
At the; end of the constant velocity phase of the access, Seek ] drops and one of the inputs ia supplied to AND-gate 33. The 20 ~ gate remains unabled however since the VFL remains set until the linear region is entered for the destination track. In fact, lt is not until the ON-TRAGT signal is raised for the destination track that -:
all three inputs to the AND gate 33 are UP and a positive output . : :
voltage is supplied on output line 32.
A positive voltage on line 32 causes transistor T5 to .: , switch OFF causing the voltage at the base of transistor T4 to fall e~ponentially at a rate determined by the time constant of capacitor C3 and resistor Rll. When the voltage has fallen to approximately l()~ZZl)S
5. 3 volts transistor T4 is turned OFF and transistor T3 turned ON.
These in turn connect integrating capacitor C2 in series with the feedback resistor R3 by switching transistor Tl OFF and transistor TZ ON. The ti~rle constant of the circuit including capacitor C3 is selected so that the required delay of 0.7 m. secs is achieved from the start of the ON TRAC~ signal until the integrating capacitor C2 is switched into the circuit. As before both transistor Tl and transistor T2 are held for a short period in a non-conducting state when the tail current through each transistor is equal so that no 10discharge path is provided for the capacitor C2 and its charge is retained for the next access operation.
In the preferred embodiment described, the circuit was such that the integrating function occured subsequent to the phase lead compensation of the servo loop. Clearly to one skilled in the art, the circuit may be modified to include the function prior to the phase lead compensation without departing~ from the present invention.
Claims (10)
1. Data storage apparatus comprising one or more rotatable storage disks having a plurality of servo tracks recorded in a servo region on one surface thereof, a servo transducer moveable by an actuator over the servo tracks under control of signals from an external control unit, and one or more data trans-ducers ganged for movement to the servo transducer and located over data regions on the disk or disks containing data tracks the position of which are defined by the position of corresponding servo tracks associated therewith, the servo transducer and the actuator forming part of a closed loop servo system which derives position error signals from the servo tracks indicative of displace-ment of the data transducers from data tracks, the position error signals being used during track following phases of the operations to cause the closed loop servo system to energize the actuator to move the data transducers in a direction tending to nullify the dis-placement and locate the transducers over a target track, the apparatus further including a capacitor connectable by means of a switch to function as an integrator in the closed loop servo system, the switch being controlled during an access operation so as to include the integrator in the servo loop at a time to increase the d.c. gain of the loop during the track following phase at the end of the track access operations.
2. Data storage apparatus as claimed in claim 1, in which the switch is controlled to include the integrator in the servo loop a predetermined interval after the commencement of the track following at the end of the access operation.
3. Data storage apparatus as claimed in claim 2, in which the predetermined interval is defined by the time constant of a part of the circuit including a further capacitor.
4. Data storage apparatus as claimed in claim 13 2 or 3, in which a portion of the residual charge acquired by the inte-grating capacitor during an access operation is retained by the capacitor for use during the succeeding access operation.
5. Data storage apparatus as claimed in claim 1, in which the closed loop servo system includes a lead-lag compensator circuit and the integrator is switched into the servo loop at such a time that the integral of any subsequent compensated error signal is substantially zero.
6. Data storage apparatus as claimed in claim 5, in which the integrating capacitor is switched into the feedback circuit of an operational amplifier forming part of the compensator circuit.
7. Data storage apparatus as claimed in claim 6, in which the switch includes a series transistor which when conducting connects the integrating capacitor into the feedback loop and a bi-pass transistor which when conducting disconnects the integrating capacitor from the feedback loop.
8. Data storage apparatus as claimed in claim 79 in which during an access operation both the series and bi-pass transistors are simultaneously held non-conducting for a period of time immediately prior to excluding the integrating capacitor in the feedback loop at the end of an access operation.
9. Data storage apparatus as claimed in claim 8, in which conductivity of the series transistor and the bi-pass transistor is controlled by collector currents of two controlling transistors connected to function as a long-tail pair.
10. Data storage apparatus as claimed in claim 3 or 9, in which the part of the circuit including said further capacitor is included in the input circuit to one of the controlling transistors of the long-tail pair.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB5362474A GB1431639A (en) | 1974-12-11 | 1974-12-11 | Electroplating chromium and its alloys |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1072205A true CA1072205A (en) | 1980-02-19 |
Family
ID=10468459
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA240,570A Expired CA1064424A (en) | 1974-12-11 | 1975-11-26 | Electroplating chromium and its alloys |
| CA240,571A Expired CA1072205A (en) | 1974-12-11 | 1975-11-26 | Data storage apparatus with track centering |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA240,570A Expired CA1064424A (en) | 1974-12-11 | 1975-11-26 | Electroplating chromium and its alloys |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JPS5175631A (en) |
| CA (2) | CA1064424A (en) |
| DE (1) | DE2545654C2 (en) |
| FR (1) | FR2294250A1 (en) |
| GB (1) | GB1431639A (en) |
| HK (1) | HK24081A (en) |
| IT (1) | IT1049022B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1596995A (en) * | 1977-06-14 | 1981-09-03 | Ibm | Electroplating chromium and its alloys |
| GB1571193A (en) * | 1976-12-16 | 1980-07-09 | Ibm Uk | Electroplating chromium and its alloys |
| GB1552263A (en) * | 1977-03-04 | 1979-09-12 | Bnf Metals Tech Centre | Trivalent chromium plating baths |
| GB1602404A (en) * | 1978-04-06 | 1981-11-11 | Ibm | Electroplating of chromium |
| GB2051861B (en) * | 1979-06-29 | 1983-03-09 | Ibm | Deposition of thick chromium films from trivalent chromium plating solutions |
| IN153802B (en) * | 1978-11-11 | 1984-08-18 | Ibm | |
| GB2034354B (en) * | 1978-11-11 | 1982-12-01 | Ibm | Elimination of anode hydrogen cyanide formation in trivalent chromium plating |
| GB2038361B (en) * | 1978-11-11 | 1983-08-17 | Ibm | Trivalent chromium plating bath |
| GB2071151B (en) * | 1980-03-10 | 1983-04-07 | Ibm | Trivalent chromium electroplating |
| GB2093861B (en) * | 1981-02-09 | 1984-08-22 | Canning Materials W Ltd | Bath for electrodeposition of chromium |
| GB8411063D0 (en) * | 1984-05-01 | 1984-06-06 | Mccormick M | Chromium electroplating |
| PL2886683T3 (en) | 2011-05-03 | 2020-06-15 | Atotech Deutschland Gmbh | Electroplating bath and method for producing dark chromium layers |
| CN111876801A (en) * | 2020-07-15 | 2020-11-03 | 南昌航空大学 | Crack-free Ni-Cr alloy coating and preparation method and application thereof |
-
1974
- 1974-12-11 GB GB5362474A patent/GB1431639A/en not_active Expired
-
1975
- 1975-10-11 DE DE19752545654 patent/DE2545654C2/en not_active Expired
- 1975-10-13 FR FR7532215A patent/FR2294250A1/en active Granted
- 1975-11-18 IT IT2937875A patent/IT1049022B/en active
- 1975-11-19 JP JP13829275A patent/JPS5175631A/en active Granted
- 1975-11-26 CA CA240,570A patent/CA1064424A/en not_active Expired
- 1975-11-26 CA CA240,571A patent/CA1072205A/en not_active Expired
-
1981
- 1981-05-28 HK HK24081A patent/HK24081A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE2545654C2 (en) | 1982-09-16 |
| JPS5621075B2 (en) | 1981-05-16 |
| FR2294250B1 (en) | 1979-05-04 |
| DE2545654A1 (en) | 1976-06-16 |
| IT1049022B (en) | 1981-01-20 |
| GB1431639A (en) | 1976-04-14 |
| FR2294250A1 (en) | 1976-07-09 |
| JPS5175631A (en) | 1976-06-30 |
| CA1064424A (en) | 1979-10-16 |
| HK24081A (en) | 1981-06-05 |
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