BR9912990A - Estrutura de memória para decodificador map - Google Patents
Estrutura de memória para decodificador mapInfo
- Publication number
- BR9912990A BR9912990A BR9912990-6A BR9912990A BR9912990A BR 9912990 A BR9912990 A BR 9912990A BR 9912990 A BR9912990 A BR 9912990A BR 9912990 A BR9912990 A BR 9912990A
- Authority
- BR
- Brazil
- Prior art keywords
- state metric
- symbol estimates
- window
- ram
- memory structure
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3972—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6566—Implementations concerning memory access contentions
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Navigation (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Patente de Invenção: "ESTRUTURA DE MEMóRIA PARADECODIFICADOR MAP". A presente invenção consiste de umanova e aperfeiçoada técnica de decodificação com particularaplicação a técnicas de codificação turbo, ou iterativas. De acordocom uma modalidade da invenção, um sistema para decodificaçãoinclui uma RAM deintercaladora de canal para armazenar um blocode estimativas de símbolos, um conjunto de S calculadores demedida de estado e um conjunto de S+1 RAMs de janela. Cadacalculador de medida de estado serve para gerar um conjunto decálculos de medida de estado, no qual S das S+1 RAMs de janelafornecem estimativas de símbolos para os S calculadores demedida de estado. Uma RAM de janela restante recebe estimativasde símbolos provenientes da RAM deintercaladora de canal.
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9648998P | 1998-08-14 | 1998-08-14 | |
US60/096,489 | 1998-08-14 | ||
US09/259,665 US6381728B1 (en) | 1998-08-14 | 1999-02-26 | Partitioned interleaver memory for map decoder |
US09/259,665 | 1999-02-26 | ||
US09/283,013 | 1999-03-31 | ||
US09/283,013 US6434203B1 (en) | 1999-02-26 | 1999-03-31 | Memory architecture for map decoder |
PCT/US1999/018550 WO2000010254A1 (en) | 1998-08-14 | 1999-08-13 | Memory architecture for map decoder |
Publications (2)
Publication Number | Publication Date |
---|---|
BR9912990A true BR9912990A (pt) | 2001-12-11 |
BR9912990B1 BR9912990B1 (pt) | 2012-10-02 |
Family
ID=27378195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BRPI9912990-6A BR9912990B1 (pt) | 1998-08-14 | 1999-08-13 | sistema para realizar decodificação por probabilidade máxima a posteriori de janela deslizante. |
Country Status (12)
Country | Link |
---|---|
EP (1) | EP1118158B1 (pt) |
JP (2) | JP4405676B2 (pt) |
CN (1) | CN1211931C (pt) |
AT (1) | ATE476016T1 (pt) |
AU (1) | AU766116B2 (pt) |
BR (1) | BR9912990B1 (pt) |
CA (1) | CA2340366C (pt) |
DE (1) | DE69942634D1 (pt) |
ES (1) | ES2347309T3 (pt) |
HK (1) | HK1040842B (pt) |
ID (1) | ID28538A (pt) |
WO (1) | WO2000010254A1 (pt) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3450788B2 (ja) * | 2000-03-06 | 2003-09-29 | 松下電器産業株式会社 | 復号化装置および復号化処理方法 |
DE10012873A1 (de) | 2000-03-16 | 2001-09-27 | Infineon Technologies Ag | Optimierter Turbo-Decodierer |
FI109162B (fi) | 2000-06-30 | 2002-05-31 | Nokia Corp | Menetelmä ja järjestely konvoluutiokoodatun koodisanan dekoodaamiseksi |
US6662331B1 (en) | 2000-10-27 | 2003-12-09 | Qualcomm Inc. | Space-efficient turbo decoder |
KR20040069344A (ko) * | 2001-12-28 | 2004-08-05 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 데이터 디코딩 방법, 수신기 및 컴퓨터 프로그램 제품 |
AU2003259479A1 (en) * | 2002-09-18 | 2004-04-08 | Koninklijke Philips Electronics N.V. | Method for decoding data using windows of data |
US7702968B2 (en) * | 2004-02-27 | 2010-04-20 | Qualcomm Incorporated | Efficient multi-symbol deinterleaver |
CN102571107B (zh) * | 2010-12-15 | 2014-09-17 | 展讯通信(上海)有限公司 | LTE***中高速并行Turbo码的解码***及方法 |
US9128888B2 (en) * | 2012-08-30 | 2015-09-08 | Intel Deutschland Gmbh | Method and apparatus for turbo decoder memory collision resolution |
US10014026B1 (en) * | 2017-06-20 | 2018-07-03 | Seagate Technology Llc | Head delay calibration and tracking in MSMR systems |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5862190A (en) * | 1995-12-29 | 1999-01-19 | Motorola, Inc. | Method and apparatus for decoding an encoded signal |
-
1999
- 1999-08-13 CN CNB998121525A patent/CN1211931C/zh not_active Expired - Lifetime
- 1999-08-13 ES ES99942209T patent/ES2347309T3/es not_active Expired - Lifetime
- 1999-08-13 WO PCT/US1999/018550 patent/WO2000010254A1/en active IP Right Grant
- 1999-08-13 BR BRPI9912990-6A patent/BR9912990B1/pt not_active IP Right Cessation
- 1999-08-13 JP JP2000565607A patent/JP4405676B2/ja not_active Expired - Lifetime
- 1999-08-13 DE DE69942634T patent/DE69942634D1/de not_active Expired - Lifetime
- 1999-08-13 CA CA002340366A patent/CA2340366C/en not_active Expired - Lifetime
- 1999-08-13 AT AT99942209T patent/ATE476016T1/de not_active IP Right Cessation
- 1999-08-13 EP EP99942209A patent/EP1118158B1/en not_active Expired - Lifetime
- 1999-08-13 AU AU55638/99A patent/AU766116B2/en not_active Ceased
- 1999-08-13 ID IDW20010597A patent/ID28538A/id unknown
-
2002
- 2002-03-22 HK HK02102210.8A patent/HK1040842B/zh not_active IP Right Cessation
-
2009
- 2009-09-10 JP JP2009209398A patent/JP5129216B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
HK1040842B (zh) | 2005-12-30 |
JP2002523914A (ja) | 2002-07-30 |
JP4405676B2 (ja) | 2010-01-27 |
CA2340366C (en) | 2008-08-05 |
CN1323462A (zh) | 2001-11-21 |
AU5563899A (en) | 2000-03-06 |
BR9912990B1 (pt) | 2012-10-02 |
EP1118158A1 (en) | 2001-07-25 |
EP1118158B1 (en) | 2010-07-28 |
ATE476016T1 (de) | 2010-08-15 |
HK1040842A1 (en) | 2002-06-21 |
ES2347309T3 (es) | 2010-10-27 |
JP5129216B2 (ja) | 2013-01-30 |
ID28538A (id) | 2001-05-31 |
DE69942634D1 (de) | 2010-09-09 |
AU766116B2 (en) | 2003-10-09 |
CA2340366A1 (en) | 2000-02-24 |
WO2000010254A1 (en) | 2000-02-24 |
CN1211931C (zh) | 2005-07-20 |
JP2010016861A (ja) | 2010-01-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
B07A | Application suspended after technical examination (opinion) [chapter 7.1 patent gazette] | ||
B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 02/10/2012, OBSERVADAS AS CONDICOES LEGAIS. |
|
B21F | Lapse acc. art. 78, item iv - on non-payment of the annual fees in time |
Free format text: REFERENTE A 23A ANUIDADE. |
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B24J | Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12) |
Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2683 DE 07-06-2022 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013. |