BR9104022A - Instalacao para a operacao de um sistema multiprocessador,sobretudo de um comando numerico - Google Patents
Instalacao para a operacao de um sistema multiprocessador,sobretudo de um comando numericoInfo
- Publication number
- BR9104022A BR9104022A BR919104022A BR9104022A BR9104022A BR 9104022 A BR9104022 A BR 9104022A BR 919104022 A BR919104022 A BR 919104022A BR 9104022 A BR9104022 A BR 9104022A BR 9104022 A BR9104022 A BR 9104022A
- Authority
- BR
- Brazil
- Prior art keywords
- installation
- multiprocessor system
- number control
- multiprocessor
- control
- Prior art date
Links
- 238000009434 installation Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/18—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
- G05B19/414—Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
- G05B19/4141—Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller characterised by a controller or microprocessor per axis
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Human Computer Interaction (AREA)
- Manufacturing & Machinery (AREA)
- Automation & Control Theory (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Numerical Control (AREA)
- Control By Computers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP90118137A EP0476175A1 (de) | 1990-09-20 | 1990-09-20 | Einrichtung zum Betrieb eines Mehrprozessorsystems, insbesondere einer numerischen Steuerung |
Publications (1)
Publication Number | Publication Date |
---|---|
BR9104022A true BR9104022A (pt) | 1992-06-02 |
Family
ID=8204494
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR919104022A BR9104022A (pt) | 1990-09-20 | 1991-09-19 | Instalacao para a operacao de um sistema multiprocessador,sobretudo de um comando numerico |
Country Status (4)
Country | Link |
---|---|
US (1) | US5283902A (pt) |
EP (1) | EP0476175A1 (pt) |
JP (1) | JPH04283805A (pt) |
BR (1) | BR9104022A (pt) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5506968A (en) * | 1992-12-28 | 1996-04-09 | At&T Global Information Solutions Company | Terminating access of an agent to a shared resource when a timer, started after a low latency agent requests access, reaches a predetermined value |
US5619687A (en) * | 1994-02-22 | 1997-04-08 | Motorola Inc. | Queue system having a time-out feature and method therefor |
JPH0816530A (ja) * | 1994-07-04 | 1996-01-19 | Kurieiteibu Design:Kk | コプロセサシステムおよび補助演算機能付外部メモリ装置 |
US5835767A (en) * | 1994-08-19 | 1998-11-10 | Unisys Corporation | Method and apparatus for controlling available processor capacity |
US6178475B1 (en) * | 1994-12-19 | 2001-01-23 | Advanced Micro Devices Inc. | Multimedia system employing timers to properly allocate bus access |
KR0155269B1 (ko) * | 1995-01-16 | 1998-11-16 | 김광호 | 버스 중재방법 및 그 장치 |
DE19528437A1 (de) | 1995-08-02 | 1997-02-06 | Siemens Ag | Verfahren zum Betreiben eines Datenübertragungssystems |
US5805837A (en) * | 1996-03-21 | 1998-09-08 | International Business Machines Corporation | Method for optimizing reissue commands in master-slave processing systems |
JPH11250005A (ja) * | 1998-03-05 | 1999-09-17 | Nec Corp | バス制御方法、バス制御装置及びバス制御プログラムを記憶した記憶媒体 |
US9367493B2 (en) * | 2005-12-09 | 2016-06-14 | Globalfoundries Inc. | Method and system of communicating between peer processors in SoC environment |
JP4455540B2 (ja) * | 2006-06-15 | 2010-04-21 | キヤノン株式会社 | バスシステム及び調停方法 |
JP6201591B2 (ja) | 2013-09-30 | 2017-09-27 | 富士通株式会社 | 情報処理装置および情報処理装置の制御方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4257095A (en) * | 1978-06-30 | 1981-03-17 | Intel Corporation | System bus arbitration, circuitry and methodology |
US4376975A (en) * | 1980-06-26 | 1983-03-15 | Gte Automatic Electric Labs Inc. | Arbitration controller providing for access of a common resource by a plurality of central processing units |
US4481572A (en) * | 1981-10-13 | 1984-11-06 | Teledyne Industries, Inc. | Multiconfigural computers utilizing a time-shared bus |
US4608631A (en) * | 1982-09-03 | 1986-08-26 | Sequoia Systems, Inc. | Modular computer system |
JPS6063609A (ja) * | 1983-09-16 | 1985-04-12 | Fanuc Ltd | 数値制御装置 |
US4964034A (en) * | 1984-10-30 | 1990-10-16 | Raytheon Company | Synchronized processing system with bus arbiter which samples and stores bus request signals and synchronizes bus grant signals according to clock signals |
DE3501968A1 (de) * | 1985-01-22 | 1986-07-24 | Siemens AG, 1000 Berlin und 8000 München | Steuerungseinrichtung fuer eine mehrachsige werkzeugmaschine |
US5029076A (en) * | 1986-01-29 | 1991-07-02 | Digital Equipment Corporation | Apparatus and method for providing a settling time cycle for a system bus in a data processing system |
US4974148A (en) * | 1987-07-06 | 1990-11-27 | Motorola Computer X, Inc. | Bus arbiter with equitable priority scheme |
US5193197A (en) * | 1987-09-24 | 1993-03-09 | Digital Equipment Corporation | Apparatus and method for distributed dynamic priority arbitration for access to a shared resource |
US5140680A (en) * | 1988-04-13 | 1992-08-18 | Rockwell International Corporation | Method and apparatus for self-timed digital data transfer and bus arbitration |
JP2633900B2 (ja) * | 1988-04-22 | 1997-07-23 | 株式会社日立製作所 | 共通バス制御方法 |
US5168568A (en) * | 1989-02-06 | 1992-12-01 | Compaq Computer Corporation | Delaying arbitration of bus access in digital computers |
US4972313A (en) * | 1989-08-07 | 1990-11-20 | Bull Hn Information Systems Inc. | Bus access control for a multi-host system using successively decremented arbitration delay periods to allocate bus access among the hosts |
DE3932590A1 (de) * | 1989-09-29 | 1991-04-11 | Siemens Ag | Numerische steuerung fuer werkzeugmaschinen oder roboter |
-
1990
- 1990-09-20 EP EP90118137A patent/EP0476175A1/de not_active Ceased
-
1991
- 1991-09-13 JP JP3262693A patent/JPH04283805A/ja not_active Withdrawn
- 1991-09-13 US US07/759,894 patent/US5283902A/en not_active Expired - Fee Related
- 1991-09-19 BR BR919104022A patent/BR9104022A/pt unknown
Also Published As
Publication number | Publication date |
---|---|
US5283902A (en) | 1994-02-01 |
EP0476175A1 (de) | 1992-03-25 |
JPH04283805A (ja) | 1992-10-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B15K | Others concerning applications: alteration of classification |
Ipc: G06F 15/17 (2006.01), G05B 19/414 (2006.0 |