BR0116823A - Circuito travado em fase - Google Patents
Circuito travado em faseInfo
- Publication number
- BR0116823A BR0116823A BR0116823-1A BR0116823A BR0116823A BR 0116823 A BR0116823 A BR 0116823A BR 0116823 A BR0116823 A BR 0116823A BR 0116823 A BR0116823 A BR 0116823A
- Authority
- BR
- Brazil
- Prior art keywords
- phase
- locked loop
- mode
- register set
- data defining
- Prior art date
Links
- 230000008878 coupling Effects 0.000 abstract 2
- 238000010168 coupling process Methods 0.000 abstract 2
- 238000005859 coupling reaction Methods 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1077—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the phase or frequency detection means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Mobile Radio Communication Systems (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
Abstract
"CIRCUITO TRAVADO EM FASE". Trata-se de um circuito travado em fase que possui associado ao mesmo um primeiro conjunto de registro (21) para manter dados que definem um modo de operação do circuito travado em fase; e um segundo conjunto de registro (22) para manter os dados que definem um modo de operação do circuito travado em fase. os comutadores (27 a 30) são fornecidos para acoplar um dos primeiro e segundo conjuntos de registro para receber dados que definem um novo modo de operação enquanto que o outro dos primeiro e segundo conjuntos de registro é conectado ao circuito travado em fase para fazer com que o mesmo opere no modo definido pelos dados no outro conjunto de registro. Os comutadores são reconfiguráveis para mudar o acoplamento de forma que o outro conjunto de registro seja acoplado para receber dados que definem um novo modo de operação adicional enquanto o um conjunto de registro é conectado ao circuito travado em fase para operar no novo modo de operação.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB0101954.6A GB0101954D0 (en) | 2001-01-25 | 2001-01-25 | Phase-locked loop |
PCT/GB2001/005610 WO2002060064A2 (en) | 2001-01-25 | 2001-12-18 | A phase-locked loop |
Publications (1)
Publication Number | Publication Date |
---|---|
BR0116823A true BR0116823A (pt) | 2004-01-27 |
Family
ID=9907507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0116823-1A BR0116823A (pt) | 2001-01-25 | 2001-12-18 | Circuito travado em fase |
Country Status (14)
Country | Link |
---|---|
US (1) | US6965271B2 (pt) |
EP (1) | EP1354407B1 (pt) |
JP (1) | JP3836794B2 (pt) |
CN (1) | CN1242556C (pt) |
AT (1) | ATE329409T1 (pt) |
BR (1) | BR0116823A (pt) |
CA (1) | CA2435705C (pt) |
DE (1) | DE60120490T2 (pt) |
DK (1) | DK1354407T3 (pt) |
ES (1) | ES2269308T3 (pt) |
GB (1) | GB0101954D0 (pt) |
HK (1) | HK1062087A1 (pt) |
IL (2) | IL156972A0 (pt) |
WO (1) | WO2002060064A2 (pt) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100373776C (zh) * | 2002-06-28 | 2008-03-05 | 先进微装置公司 | 具有自动频率调整的锁相回路 |
GB2393611B8 (en) | 2002-09-26 | 2006-05-11 | Qualcomm Inc | Method of and apparatus for reducing frequency errors associated with an inter-system scan |
JP2006005489A (ja) | 2004-06-15 | 2006-01-05 | Sharp Corp | Pll回路および高周波受信装置 |
US8811915B2 (en) * | 2005-03-04 | 2014-08-19 | Psion Inc. | Digital wireless narrow band radio |
US8041972B2 (en) * | 2006-04-04 | 2011-10-18 | Qualcomm Incorporated | Apparatus and method for setting wakeup times in a communication device based on estimated lock on time of frequency synthesizer |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3042374B2 (ja) | 1995-06-29 | 2000-05-15 | 日本電気株式会社 | 周波数シンセサイザ |
EP0755120A1 (en) * | 1995-07-18 | 1997-01-22 | Nec Corporation | Phase-locked loop circuit |
US6150891A (en) * | 1998-05-29 | 2000-11-21 | Silicon Laboratories, Inc. | PLL synthesizer having phase shifted control signals |
US6111807A (en) * | 1998-07-17 | 2000-08-29 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device allowing easy and fast text |
JP3851064B2 (ja) | 1999-06-30 | 2006-11-29 | インフィネオン テクノロジース アクチエンゲゼルシャフト | Pllシンセサイザ |
US6718473B1 (en) * | 2000-09-26 | 2004-04-06 | Sun Microsystems, Inc. | Method and apparatus for reducing power consumption |
-
2001
- 2001-01-25 GB GBGB0101954.6A patent/GB0101954D0/en not_active Ceased
- 2001-12-18 AT AT01273456T patent/ATE329409T1/de not_active IP Right Cessation
- 2001-12-18 EP EP01273456A patent/EP1354407B1/en not_active Expired - Lifetime
- 2001-12-18 BR BR0116823-1A patent/BR0116823A/pt not_active IP Right Cessation
- 2001-12-18 CN CNB018222617A patent/CN1242556C/zh not_active Expired - Fee Related
- 2001-12-18 ES ES01273456T patent/ES2269308T3/es not_active Expired - Lifetime
- 2001-12-18 IL IL15697201A patent/IL156972A0/xx active IP Right Grant
- 2001-12-18 US US10/466,788 patent/US6965271B2/en not_active Expired - Fee Related
- 2001-12-18 WO PCT/GB2001/005610 patent/WO2002060064A2/en active IP Right Grant
- 2001-12-18 DE DE60120490T patent/DE60120490T2/de not_active Expired - Lifetime
- 2001-12-18 DK DK01273456T patent/DK1354407T3/da active
- 2001-12-18 JP JP2002560281A patent/JP3836794B2/ja not_active Expired - Fee Related
- 2001-12-18 CA CA002435705A patent/CA2435705C/en not_active Expired - Fee Related
-
2003
- 2003-07-16 IL IL156972A patent/IL156972A/en not_active IP Right Cessation
-
2004
- 2004-07-13 HK HK04105078A patent/HK1062087A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE60120490T2 (de) | 2007-01-11 |
ATE329409T1 (de) | 2006-06-15 |
DE60120490D1 (de) | 2006-07-20 |
DK1354407T3 (da) | 2006-10-09 |
IL156972A0 (en) | 2004-02-08 |
GB0101954D0 (en) | 2001-03-14 |
WO2002060064A3 (en) | 2002-11-14 |
EP1354407B1 (en) | 2006-06-07 |
ES2269308T3 (es) | 2007-04-01 |
IL156972A (en) | 2007-12-03 |
US6965271B2 (en) | 2005-11-15 |
US20040113703A1 (en) | 2004-06-17 |
HK1062087A1 (en) | 2004-10-15 |
CA2435705A1 (en) | 2002-08-01 |
CN1242556C (zh) | 2006-02-15 |
EP1354407A2 (en) | 2003-10-22 |
CN1488194A (zh) | 2004-04-07 |
CA2435705C (en) | 2006-05-30 |
WO2002060064A2 (en) | 2002-08-01 |
JP2004527936A (ja) | 2004-09-09 |
JP3836794B2 (ja) | 2006-10-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B08F | Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 10A ANUIDADE(S). |
|
B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2172 DE 21/08/2012. |