BE804062A - PULSE RATE MODULATED DATA DECODING PROCESS AND CIRCUIT - Google Patents

PULSE RATE MODULATED DATA DECODING PROCESS AND CIRCUIT

Info

Publication number
BE804062A
BE804062A BE134972A BE134972A BE804062A BE 804062 A BE804062 A BE 804062A BE 134972 A BE134972 A BE 134972A BE 134972 A BE134972 A BE 134972A BE 804062 A BE804062 A BE 804062A
Authority
BE
Belgium
Prior art keywords
circuit
decoding process
pulse rate
modulated data
data decoding
Prior art date
Application number
BE134972A
Other languages
French (fr)
Inventor
W A Boothroyd
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BE804062A publication Critical patent/BE804062A/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K9/00Demodulating pulses which have been modulated with a continuously-variable signal
    • H03K9/06Demodulating pulses which have been modulated with a continuously-variable signal of frequency- or rate-modulated pulses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902Pulse width modulation; Pulse position modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Manipulation Of Pulses (AREA)
  • Analogue/Digital Conversion (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
BE134972A 1972-09-07 1973-08-27 PULSE RATE MODULATED DATA DECODING PROCESS AND CIRCUIT BE804062A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US28713272A 1972-09-07 1972-09-07

Publications (1)

Publication Number Publication Date
BE804062A true BE804062A (en) 1973-12-17

Family

ID=23101591

Family Applications (1)

Application Number Title Priority Date Filing Date
BE134972A BE804062A (en) 1972-09-07 1973-08-27 PULSE RATE MODULATED DATA DECODING PROCESS AND CIRCUIT

Country Status (9)

Country Link
JP (1) JPS4966116A (en)
BE (1) BE804062A (en)
CA (1) CA1037570A (en)
CH (1) CH573691A5 (en)
FR (1) FR2199231B1 (en)
GB (1) GB1442444A (en)
IT (1) IT992697B (en)
NL (1) NL7311473A (en)
SE (1) SE392551B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114090482A (en) * 2021-09-28 2022-02-25 荣湃半导体(上海)有限公司 Delay offset method for transmission data

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5789769A (en) * 1980-11-26 1982-06-04 Nippon Denso Co Ltd Controller for copying machine group

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631422A (en) * 1969-02-03 1971-12-28 Ibm System for detection of data time interval measurement
US3711843A (en) * 1970-04-27 1973-01-16 Olivetti & Co Spa Self-adapting synchronization system for reading information from a moving support
US3708748A (en) * 1970-04-27 1973-01-02 Ibm Retrospective pulse modulation and apparatus therefor
US3720927A (en) * 1971-01-25 1973-03-13 Redactron Corp Speed insensitive reading and writing apparatus for digital information
FR2136906B1 (en) * 1971-05-07 1975-07-04 Automatisme Cie Gle
JPS4861122A (en) * 1971-12-02 1973-08-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114090482A (en) * 2021-09-28 2022-02-25 荣湃半导体(上海)有限公司 Delay offset method for transmission data
CN114090482B (en) * 2021-09-28 2024-06-07 荣湃半导体(上海)有限公司 Delay counteracting method for transmission data

Also Published As

Publication number Publication date
CA1037570A (en) 1978-08-29
IT992697B (en) 1975-09-30
DE2343472A1 (en) 1974-03-28
SE392551B (en) 1977-03-28
FR2199231A1 (en) 1974-04-05
CH573691A5 (en) 1976-03-15
NL7311473A (en) 1974-03-11
JPS4966116A (en) 1974-06-26
DE2343472B2 (en) 1975-08-21
GB1442444A (en) 1976-07-14
FR2199231B1 (en) 1976-05-07

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