AU7593300A - Low cost 3d flip-chip packaging technology for integrated power electronics modules - Google Patents

Low cost 3d flip-chip packaging technology for integrated power electronics modules

Info

Publication number
AU7593300A
AU7593300A AU75933/00A AU7593300A AU7593300A AU 7593300 A AU7593300 A AU 7593300A AU 75933/00 A AU75933/00 A AU 75933/00A AU 7593300 A AU7593300 A AU 7593300A AU 7593300 A AU7593300 A AU 7593300A
Authority
AU
Australia
Prior art keywords
flip
low cost
power electronics
integrated power
packaging technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU75933/00A
Inventor
Xingsheng Liu
Guo-Quan Lu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Virginia Tech Intellectual Properties Inc
Original Assignee
Virginia Tech Intellectual Properties Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/657,782 external-priority patent/US6349044B1/en
Application filed by Virginia Tech Intellectual Properties Inc filed Critical Virginia Tech Intellectual Properties Inc
Publication of AU7593300A publication Critical patent/AU7593300A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/34Snubber circuits
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12036PN diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/34Snubber circuits
    • H02M1/342Active non-dissipative snubbers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
AU75933/00A 1999-09-24 2000-09-20 Low cost 3d flip-chip packaging technology for integrated power electronics modules Abandoned AU7593300A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US15559999P 1999-09-24 1999-09-24
US15559899P 1999-09-24 1999-09-24
US60155599 1999-09-24
US60155598 1999-09-24
US09/657,782 US6349044B1 (en) 1999-09-09 2000-09-08 Zero voltage zero current three level dc-dc converter
US09657782 2000-09-13
PCT/US2000/025708 WO2001024260A1 (en) 1999-09-24 2000-09-20 Low cost 3d flip-chip packaging technology for integrated power electronics modules

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DE10156626A1 (en) * 2001-11-17 2003-06-05 Bosch Gmbh Robert Electronic arrangement
US7138708B2 (en) 1999-09-24 2006-11-21 Robert Bosch Gmbh Electronic system for fixing power and signal semiconductor chips
US6867493B2 (en) * 2000-11-15 2005-03-15 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless multi-die carrier
DE10258565B3 (en) * 2002-12-14 2004-08-12 Semikron Elektronik Gmbh Circuit arrangement for semiconductor components and method for the production
DE10329101A1 (en) * 2003-06-27 2005-01-27 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Semiconductor components containing substrate and power semiconductor chip with source terminal fitted on substrate with rear contacting, while source terminal and forwarding conductor
DE10355925B4 (en) 2003-11-29 2006-07-06 Semikron Elektronik Gmbh & Co. Kg Power semiconductor module and method of its manufacture
DE102004030042B4 (en) * 2004-06-22 2009-04-02 Infineon Technologies Ag Semiconductor device having a semiconductor chip mounted on a carrier, in which the heat transferred from the semiconductor chip to the carrier is limited, and a method for producing a semiconductor device
DE102004041088B4 (en) * 2004-08-24 2009-07-02 Infineon Technologies Ag Semiconductor component in flat conductor technology with a semiconductor chip and method for its production
US8680666B2 (en) 2006-05-24 2014-03-25 International Rectifier Corporation Bond wireless power module with double-sided single device cooling and immersion bath cooling
DE102007041921A1 (en) * 2007-09-04 2009-03-05 Siemens Ag Method for producing and contacting electronic components by means of a substrate plate, in particular DCB ceramic substrate plate
US20130075892A1 (en) * 2011-09-27 2013-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for Three Dimensional Integrated Circuit Fabrication
US20200243430A1 (en) * 2019-01-30 2020-07-30 Delta Electronics, Inc. Package structure and forming method of the same
US11189555B2 (en) 2019-01-30 2021-11-30 Delta Electronics, Inc. Chip packaging with multilayer conductive circuit

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US5341979A (en) * 1993-09-03 1994-08-30 Motorola, Inc. Method of bonding a semiconductor substrate to a support substrate and structure therefore
US5466635A (en) * 1994-06-02 1995-11-14 Lsi Logic Corporation Process for making an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating
US5625227A (en) * 1995-01-18 1997-04-29 Dell Usa, L.P. Circuit board-mounted IC package cooling apparatus
US5796591A (en) * 1995-06-07 1998-08-18 International Business Machines Corporation Direct chip attach circuit card
JP3726985B2 (en) * 1996-12-09 2005-12-14 ソニー株式会社 Manufacturing method of electronic parts
US6013571A (en) * 1997-06-16 2000-01-11 Motorola, Inc. Microelectronic assembly including columnar interconnections and method for forming same

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