AU754201B2 - Semiconductor device - Google Patents

Description

UNIN

AUSTRALIA

Patents Act 1990 COMPLETE SPECIFICATION STANDARD PATENT Applicant(s): KABUSHIKI KAISHA TOSHIBA Invention Title: SEMICONDUCTOR DEVICE I The following statement is a full description of this invention, including the best method of performing it known to me/us: 2 SEMICONDUCTOR DEVICE The present invention is a divisional application of application no. 58436/98, the disclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device using an insulated gate semiconductor device of a MOS gate structure, for example MOS-FET, IGBT (Insulated Gate Bipolar Transistor), IEGT (Injection Enhanced Gate Transistor) as a voltage drive switching element.

There is available a voltage drive switching element as a switching element used in a power converter, for example an inverter which drives an induction motor converting a direct current power to an alternating current power other than a current drive switching element such as a thyristor, a gate turn-off thyristor (GTO) or transistor. As typical examples of a voltage drive switching element, there are named: an insulated gate semiconductor device of a MOS gate structure, for example MOS-FET, IGBT (Insulated Gate Bipolar Transistor), IEGT (Injection Enhanced Gate Transistor).

25 With respect to use of a power converter such as a three-phase PWM inverter, there is a way in which the power converter is operated and stopped independently, and a way in which the power converter is incorporated into a system, and used in the system. A larger number of power 30 converters made in recent years are used in the latter way more than in the former way. In the latter way, the system uses tens of, or hundreds of, three-phase PWM inverters, and if even one of them becomes out of order, the operation of the entire system must be stopped. Thus, the system is greatly adversely affected if the power converter (such as a three-phase PWM inverter) should become out of order and stop. This technical field G:\MCooper\Keep\Speci\58436.98-DIV.l.doc 12/11/99 3 therefore has a main object of finding a way to continuously operate the system in order to improve its operation rate.

BRIEF SUMMARY OF THE INVENTION It is an object of embodiments of the invention to provide a semiconductor device, which realizes an operation with high reliability.

Accordingly, the invention provides a power converter having a voltage drive switching device section which comprises a plurality of switching device chips to be connected in parallel, comprising: detecting means for detecting at least one of a set of device parameters and a set of electric parameters of the voltage drive switching device section; monitoring means for monitoring at least one of states of turn-on and turn-off of the voltage drive switching device section based on the set of device parameters and the set of electric parameters of the voltage drive switching device section detected by the *detecting means; and control means for controlling a gate of the voltage drive switching device section based on a monitoring result of the monitoring means, "said converter being characterised by self protecting means having a plurality of self protecting circuits provided in parallel to the switching device chips, respectively, for performing a protecting operation associated with a current flowing in the switching device chips; self holding means for holding a protecting operation when the self protecting means is activated; and reset means for resetting holding of a protecting operation of the self protecting means based on an internal signal provided when a number of protecting operations of the self protecting means reaches a \\melb..fies\home\Piyanka\Keep\speci\59416-99 .doc 2/09/02 3a predetermined number, or a predetermined time interval elapses in which protection operations are performed based on an external signal provided when the number of protecting operations reaches the predetermined number or when the time interval elapses the predetermined time interval.

Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description give above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.

FIG. 1 is a block diagram showing an outline of a structure of a first embodiment of the present invention; *e \\melb-files\homeS\Priyanka\Keep\speci\59416-99.doc 2/09/02 4 FIGS. 2A to 2D are operation wave forms showing operations of self-protecting means and self-holding means shown in FIG. 1; FIGS. 3A to 3C are operation wave forms showing operations of self-protecting means and self-holding means shown in FIG. 1; FIG. 4 is a block diagram showing an outline of a structure of a second embodiment of the present invention; FIG. 5 is a block diagram showing an outline of a structure of a third embodiment of the present invention; FIG. 6 is a block diagram showing an outline of a structure of a switching element of a power converter in a fourth embodiment of the present invention; FIGS. 7A and 7B are a table and a graph showing a relation between an operation of self-holding means and current restriction of power converter of a fifth embodiment of the present invention; FIGS. 8A to 8C are a table and graphs showing a relation between an operation of self-holding means current restriction of power converter of a sixth embodiment of he present invention.

DETAILED DESCRIPTION OF THE INVENTION 25 A preferred first embodiment of the present invention will be described in reference to FIG. 1. In the preferred embodiment, as a switching element of a power converter, IPM (Intelligent Power Module) having self protecting means is used.

30 In FIG. 1, IPM 226 which is a switching element of the power converter comprises IGBT element 217 to which a diode 218 is inversely connected. A gate drive device 225 is connected to the gate of the IGBT element 217. IPM 226 comprises an overcurrent protecting circuit 220 for overcurrent protection of the IGBT element 217 and a short-circuit current protecting circuit 221 for shortcircuit current protection. The IPM 226 receives outputs G:\MCooper\Keep\Speci\58436.98-DIV.1.doc 12/11/99 5 of the overcurrent protecting circuit 220 and the shortcircuit current protection circuit 221 and has a fault detector 214 for protecting fault detection of the IGBT element 217. In addition, the IPM comprises a self holding circuit 227, an output signal terminal 271 of the self holding circuit and a reset signal terminal 272 of the self holding circuit 227, which are characteristic part of the embodiment.

In such a structure, as a self protecting function of the IGBT element 217, there are provided the overcurrent protecting circuit 220 and the short-circuit current protecting circuit 221. When these circuits 220, 221 operate, a protecting operation is performed by stopping a gate control signal which is supplied to the IGBT element 217 from the gate drive circuit 225 and at the same time a operation signal is supplied to the self holding circuit 227. In the fault detector 224, operations of these protecting circuits may be detected and a signal of the output signal terminal 271 of the self holding circuit 227 may be used. The self protecting circuit 227 self holds a protecting operation till the circuit 227 is reset by an input signal of the reset signal terminal 272 and a signal is also supplied to the gate drive circuit 225 during this self holding period.

25 Relations between operations of the overcurrent protecting circuit 220 as self protecting means associated with a current in the IGBT element 217 of FIG. 22 or the *s short-circuit current protecting circuit 221 and an operation of the self holding circuit are described in 30 reference to FIGS. 2A to 2D and FIGS. 3A to 3C. FIG. 2A o" shows a wave form diagram of a gate control signal supplied to the IGBT element 217 through the gate drive circuit 225, FIG. 2B shows a wave form diagram of a protection output control signal of the short-circuit current protecting circuit 221, FIG. 2C shows a wave form diagram of an output signal of the self holding circuit 227 and FIG 2D shows a wave form of a reset signal G:\MCooper\Keep\Speci\58436.98-DIV.1.doc 12/11/99 6 supplied to the self holding circuit 227 from the reset signal terminal 272.

In FIGS. 2A to 2D, the IGBT element 217 normally operates by receiving a gate control signal till time tl, in accompany with an operation of the protecting circuit the self holding circuit 227 is actuated and continues self holding when the short-circuit current protecting circuit 221 is activated at time tl and a reset signal is normally supplied from the reset signal terminal 272 to reset the self protecting circuit at time t2, so that a gate control signal is supplied to the IGBT element 217.

In such a manner, the IPM 226 which is a semiconductor device shown in FIG. 1 can self-hold an operation of the self protecting circuit by the self holding circuit 227 till a reset signal is supplied from the outside of the IPM 226.

FIG. 3A is a wave form diagram of a gate control signal supplied to the IGBT element 217 through the gate drive circuit 225, FIG. 3B is a wave form diagram of a 20 protection output signal of the short-circuit current protecting circuit 221 and FIG. 3C is a wave form of an output signal of the self holding circuit 227. In FIGS.

2A to 2C, the self holding circuit 227 starts a self holding operation in company of generation of protection output signal of the short-circuit protecting circuit 221, whereas in FIGS. 3A to 3C, the self holding circuit 227 starts at time t6 and continues the self holding after the number with generation times of a protection output signal reaches a predetermined number or a time interval in which 0* 30 a protection output signal is generated elapses a predetermined interval.

As shown in FIGS. 3A to 3C, IPM 226 of FIG. 1 S" only exerts self protection against a transitory erratic ignition of an IGBT element 217, for example, caused by a noise mixed into a gate control signal. IPM 226 of FIG. 1 activates the self holding circuit 227 against phenomena which happens after a time t6, and which should be G:\MCooper\KeeP\Speci \5843 6.98 -DIV. 1. doc 12/11/99 7 countered by intrinsic self protection, such as degradation of an IGBT element 217 caused by repetition of a transitory erratic ignition, for example, and can continue a self holding operation till a reset signal is supplied from the outside of IPM 226.

A second embodiment of the present invention will be described in reference to FIG. 4. IPM 226' which is a semiconductor device of FIG. 4 comprises: a gate drive circuit 228, a gate resistor 229 and an output signal terminal 273 of a self holding circuit in addition to the constituents shown in FIG. 1.

In IPM 226' of the embodiment, there is shown the case where four IGBT elements 217 each as a chip in a device package and four diodes are connected in parallel in an equivalent manner. While the number of chips connected in parallel in a package is not limited, the four IGBT elements 217 are accommodated and two of them and the other two thereof are respectively connected in parallel and supplied with a common gate signal from the 20 gate drive circuits 228 through the gate resistors 229.

Two sets of this combination are in parallel connected in the package in an equivalent manner and a parallel configuration of the four IGBT elements 217 is completed.

For each unit of parallel connection controlled by a 25 common gate drive circuits 228, the overcurrent protecting e •circuit (OCC) 220 and the short-circuit current protecting circuit (SCC) 221 are provided as a self protecting function associated with a current.

The number of chips in parallel connected in an equivalent manner is not specifically limited in a package of the semiconductor device, a self protecting function is provided for each predetermined parallel connection unit in which constituents are in parallel connected and thereby a self protecting operation can independently be conducted in each of degraded parallel connection units.

As shown in FIG. 4, since the self holding circuit (SHC) 227 is provided for each parallel connection G: \MCOoper\Keep\Spec i\5 843 6. 98 -DIV. I doc 12/11/99 8 unit, a plurality of self holding circuits 227 are provided in the package and a probability at which all the chips in the package of the semiconductor device are degraded at the same time is lower, only the limited number of parallel connection units are brought in a self protecting mode and the other parallel connection units can continue a switching operation as a semiconductor device with supply of a gate control signal from the gate drive circuit 228 in a normal manner.

In such a manner, even while the IPM 226' continues its operation, an operational condition of the self holding circuit 227 can be discriminated by each of output signals from the output signal terminals 271, 273 of the self holding circuits 227.

In a semiconductor device of a MOS gate structure such as the IGBT element 217, the gate drive circuit 228 has a high possibility for the case where the gate terminal of the IGBT element 217 assumes a low input impedance due to degradation of the gate terminal of the 20 IGBT element 217 which has conducted a self protecting operation. In such a manner, if the gate terminal has assumed a low impedance, a signal level on the input side of the gate drive circuit 228 is affected. Thereby gate control signals of other parallel connection units of IGBT elements 217 which have not conducted a self protecting operation can be reduced. In order to prevent such an influence from being exercised, a switching function can be provided in the gate drive circuit 228 so that a gate S"control signal is not supplied from the corresponding gate 30 drive circuit 228 during a period the self holding circuit 227 of a parallel connection unit which has conducted a self protecting operation continues a self holding operation. Thereby a self holding operation can be made to continue without any external disturbance acting on a gate control signal of orderly parallel connection units or an orderly IPM 226' in parallel connected externally.

A parallel connection unit in which a gate G:\MCooper\Keep\Speci\58436.98-DIV.1 .doc 12/11/99 9 control signal is not supplied by activating a switching function of the gate drive circuit 228 may be operated by the gate drive circuit 228 so that the gate terminal and the emitter terminal of the IGBT element 217 assumes a short-circuit condition in an equivalent manner only during when the gate control signal is not supplied.

A third embodiment will be described in reference to FIG.5. That is, FIG. 5 shows a circuit configuration in the case where IPM 226 which is a semiconductor device, as shown in FIG. 1 (or the IPM 226' shown in FIG. 4) is adopted as a switching element of a power converter. In FIG. 5, the power converter comprises a self protection monitoring circuit 230 and a control circuit 231. When self protecting means is activated and thereby self holding means is activated in the inside of the IPM 226 shown in FIG. 1 (or the IPM 226' shown in FIG. the self protection monitoring circuit 230 detects this and transmits the information to the control circuit 231.

However, since the control circuit 231 operates 20 so that the control circuit 231 continues to supply a gate control signal to the IPM 226 in the scope of operation of predetermined holding means, the power converter using a semiconductor device can continue its operation.

Therefore, operational reliability of a power converter can be improved by a great margin, as compared with a conventional power converter which stops its operation immediately after only one chip is degraded.

A fourth embodiment of the present invention will be described in reference to FIG. 6. In a circuit shown 30 in FIG. 6, three IPMs 226 (or three IPMs 226'shown in FIG.

4) which are semiconductor devices are in parallel connected. Parallel connection of the semiconductor "devices can be made to operate as one switching element 215 in an equivalent manner. In the case where as shown in FIG. 6, the IPM 226 is in parallel connected and applied to as a switching element of the power converter as shown in FIG. 5, an operation of the power converter G:\MCooper\Keep\Speci\58436.98-DIV.1.doc 12/11/99 10 using the semiconductor devices can continue while monitoring an operational condition of self holding means, it is detected by the self protection monitoring circuit 230 if self protecting means in the inside of the IPMs 226 in parallel connection is activated.

In the self protection monitoring circuit 230, since an operational condition of the self holding means is monitored, the monitoring circuit 230 outputs a signal to the control circuit 231 in correspondence to an operational situation of the self holding means and thereby a current of the power converter is controlled.

When a current of the power converter is controlled in correspondence to the operational situation of the self holding means, the power converter can be continued to operate while operational reliability is improved with a margin in terms of a magnitude of current since a current load on other IPMs 226 in parallel connected is reduced.

A fifth embodiment of the present invention will be described in reference to FIGS. 7A and 7B. FIG. 7A 20 shows the number of self holding means which are in operation by six IPMs (switching elements) shown in FIG.

FIG. 7A shows a limited value of a current of the power converter. In FIGS. 7A, 7B, U and X, V and Y, and W and Z are combinations of two IPMs (switching elements) each in series connected with each other and inserted between direct current buses.

While there is no operation of the self holding leans till a time ta, after the time ta, the self holding S" monitoring circuit 230 discriminates the largest operational number of self holding functions in comparison among the three sets of IPMs (switching elements) in each set of which two IPMs are in parallel connected and a current of the power converter is controlled through the control circuit 231.

The limited value of a current is changed sequentially at ta, tb and tc and in FIG. 7, the operation of the power converter is terminated since a total number G:\kMCooper\Keep\Speci\58436.98-Drv.l.doc 12/11/99 'I 11 of the IPMs (switching element) having the same self holding functions amounts to four at a time td.

In such a manner, if the power converter is made to continue its operation under limitation of a current while it is discriminated in which circuit portion a self holding means is activated by the self holding monitoring circuit 230 by the IPMs (switching elements), operational reliability can greatly be improved, compared with a conventional power converter. That is, while a conventional power converter has stopped by even only one self holding means in operation, operational reliability of a power converter can be improved by a rate corresponding to a continuous operation till a total number of self holding means reaches nine in the embodiment.

A sixth embodiment of the present invention will be described in reference to FIGS. 8A to 8C. FIG. 8A shows the number of self holding means which are in operation by six IPMs (switching elements) shown in FIG.

20 5. FIG. 8B shows a limited value of a current of the power converter. FIG. 8C shows a signal input to a reset signal terminal 272 of IPM shown in FIG. 1 or FIG. 4.

a**s i While a operational situation of the self holding S: means is monitored by the self holding monitoring circuit 230 and a current of the power converter is limited at "times ta and tb in a similar manner to in FIGS. 7A to 7B, a reset signal is input to a reset signal terminal 272 of the IPM 226, which is a semiconductor device, from a S" control circuit 231 at a time te. Since the reset signal 30 is input to the reset signal terminal of the IPM 226 at the time te, an operation of the self holding means can be reset when the operation is not caused by a factor of the IPM itself but caused by a temporary factor on the load side. Thereby, if the self holding means can be reset, a limited value of a current of the power converter is changed after a time td when a reset signal is input and thus operational reliability of the power converter can be G:\?4Cooiper\Keep\Speci\58436.98-DIV.1.doc 12/11/99 .1 12 improved.

While in the above mentioned embodiments, IPM 226 using an IGBT element 217 is employed, kinds and the number are not limited to that. Kinds of self protecting means provided in a semiconductor device is not specifically limited, but any self protecting means can be used as far as it at least corresponds to a current factor and in addition the numbers of self protecting means and self holding means in a semiconductor device is also not restrictive. A power converter using a semiconductor device is not specifically limited in aspects of its circuit system or a restrictive method of its current.

As mentioned above, according to the present invention, a semiconductor device with which operational reliability can be improved and a power converter using the same can be provided.

In the embodiments of the present invention, a signal cannot be supplied from the drive circuit to a predetermined chip during a period when self holding means 20 in operation in company with a protecting operation of self protecting means.

At least when self protecting means is activated in a predetermined semiconductor device, self holding means corresponding to self protecting means which has been activated can be made to operate, while an operation is continued using a semiconductor device whose self protecting means in not activated.

There can be provided a monitor detecting means S" for monitoring and detecting self holding means and a S 30 variable control means for changing a limited level of a current according to a detection signal from the monitor detecting means.

G: \MCooper\Keep\Speci\5 8436.9 8-DIV. 1 doc 12/11/99 13 It is to be understood that, if any prior art publication is referred to herein, such reference does not constitute an admission that the publication forms a part of the common general knowledge in the art, in Australia or in any other country.

For the purposes of this specification it will be clearly understood that the word "comprising" means "including but not limited to", and that the word "comprises" has a corresponding meaning.

o* .e o• H: \arnyo\Keep\Specifications\59416-99.doc 17/01/02

Claims (4)

1. A power converter having a voltage drive switching device section which comprises a plurality of switching device chips to be connected in parallel, comprising: detecting means for detecting at least one of a set of device parameters and a set of electric parameters of the voltage drive switching device section; monitoring means for monitoring at least one of states of turn-on and turn-off of the voltage drive switching device section based on the set of device parameters and the set of electric parameters of the voltage drive switching device section detected by the detecting means; and control means for controlling a gate of the voltage drive switching device section based on a monitoring result of the monitoring means, said converter being characterised by self protecting means having a plurality of self protecting circuits provided in parallel to the switching device chips, respectively, for performing a protecting operation associated with a current flowing in the switching device chips; self holding means for holding a protecting .o operation when the self protecting means is activated; and reset means for resetting holding of a protecting operation of the self protecting means based on an internal signal provided when a number of protecting 5: 30 operations of the self protecting means reaches a predetermined number, or a predetermined time interval elapses in which protection operations are performed based on an external signal provided when the number of protecting operations reaches the predetermined number or when the time interval elapses the predetermined time interval. \\melb-.fies \hoe$ e\Priyark\Keep\speci \59416-99. doc 2/09/02 15

2. The semiconductor device according to claim 1 further characterised by stopping means for stopping a signal from the control means to a predetermined chip during a period when said self holding means is providing a protecting operation of said self protecting means.

3. The semiconductor device according to claim 1, further characterised by: monitor detecting means for monitoring and detecting operation of the self holding means; and a variable control means for changing a limited level of a current flowing in the switching device chips according to a detection signal provided from said monitor detecting means.

4. A power converter as claimed in claim 1 and substantially as herein described with reference to the accompanying drawings. 20 Dated this 2 nd day of September 2002 KABUSHIKI KAISHA TASHIBA By their Patent Attorneys GRIFFITH HACK Fellows Institute of Patent and Trade Mark Attorneys of Australia *ooo •egg \\ebfiles\ho.meS\Priyanka\Keep\speci\59416-99.doc 2/09/02