AU7474200A - Cache-coherent shared-memory cluster - Google Patents

Cache-coherent shared-memory cluster

Info

Publication number
AU7474200A
AU7474200A AU74742/00A AU7474200A AU7474200A AU 7474200 A AU7474200 A AU 7474200A AU 74742/00 A AU74742/00 A AU 74742/00A AU 7474200 A AU7474200 A AU 7474200A AU 7474200 A AU7474200 A AU 7474200A
Authority
AU
Australia
Prior art keywords
cache
memory cluster
coherent shared
coherent
shared
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU74742/00A
Inventor
Ted Scardamalia
Lynn Parker West
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Times N Systems Inc
Original Assignee
Times N Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Times N Systems Inc filed Critical Times N Systems Inc
Publication of AU7474200A publication Critical patent/AU7474200A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526Mutual exclusion algorithms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284Multiple user address space allocation, e.g. using different base addresses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0817Cache consistency protocols using directory methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/45Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/457Communication
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0837Cache consistency protocols with software control, e.g. non-cacheable data
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/52Indexing scheme relating to G06F9/52
    • G06F2209/523Mode

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)
AU74742/00A 1999-08-31 2000-08-31 Cache-coherent shared-memory cluster Abandoned AU7474200A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US15215199P 1999-08-31 1999-08-31
US60152151 1999-08-31
US22097400P 2000-07-26 2000-07-26
US22074800P 2000-07-26 2000-07-26
US60220748 2000-07-26
US60220794 2000-07-26
PCT/US2000/024147 WO2001016737A2 (en) 1999-08-31 2000-08-31 Cache-coherent shared-memory cluster

Publications (1)

Publication Number Publication Date
AU7474200A true AU7474200A (en) 2001-03-26

Family

ID=27387201

Family Applications (9)

Application Number Title Priority Date Filing Date
AU69496/00A Abandoned AU6949600A (en) 1999-08-31 2000-08-31 Efficient page ownership control
AU69497/00A Abandoned AU6949700A (en) 1999-08-31 2000-08-31 Semaphore control of shared-memory
AU71007/00A Abandoned AU7100700A (en) 1999-08-31 2000-08-31 Switchable shared-memory cluster
AU71083/00A Abandoned AU7108300A (en) 1999-08-31 2000-08-31 Efficient event waiting
AU71136/00A Abandoned AU7113600A (en) 1999-08-31 2000-08-31 High-availability, shared-memory cluster
AU71085/00A Abandoned AU7108500A (en) 1999-08-31 2000-08-31 Efficient page allocation
AU71100/00A Abandoned AU7110000A (en) 1999-08-31 2000-08-31 Network shared memory
AU71121/00A Abandoned AU7112100A (en) 1999-08-31 2000-08-31 Shared memory disk
AU74742/00A Abandoned AU7474200A (en) 1999-08-31 2000-08-31 Cache-coherent shared-memory cluster

Family Applications Before (8)

Application Number Title Priority Date Filing Date
AU69496/00A Abandoned AU6949600A (en) 1999-08-31 2000-08-31 Efficient page ownership control
AU69497/00A Abandoned AU6949700A (en) 1999-08-31 2000-08-31 Semaphore control of shared-memory
AU71007/00A Abandoned AU7100700A (en) 1999-08-31 2000-08-31 Switchable shared-memory cluster
AU71083/00A Abandoned AU7108300A (en) 1999-08-31 2000-08-31 Efficient event waiting
AU71136/00A Abandoned AU7113600A (en) 1999-08-31 2000-08-31 High-availability, shared-memory cluster
AU71085/00A Abandoned AU7108500A (en) 1999-08-31 2000-08-31 Efficient page allocation
AU71100/00A Abandoned AU7110000A (en) 1999-08-31 2000-08-31 Network shared memory
AU71121/00A Abandoned AU7112100A (en) 1999-08-31 2000-08-31 Shared memory disk

Country Status (4)

Country Link
EP (3) EP1214652A2 (en)
AU (9) AU6949600A (en)
CA (3) CA2382929A1 (en)
WO (9) WO2001016740A2 (en)

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WO2003007134A1 (en) * 2001-07-13 2003-01-23 Koninklijke Philips Electronics N.V. Method of running a media application and a media system with job control
US6999998B2 (en) 2001-10-04 2006-02-14 Hewlett-Packard Development Company, L.P. Shared memory coupling of network infrastructure devices
US6920485B2 (en) 2001-10-04 2005-07-19 Hewlett-Packard Development Company, L.P. Packet processing in shared memory multi-computer systems
US7254745B2 (en) 2002-10-03 2007-08-07 International Business Machines Corporation Diagnostic probe management in data processing systems
JP2008046969A (en) * 2006-08-18 2008-02-28 Fujitsu Ltd Access monitoring method and device for shared memory
US7685381B2 (en) 2007-03-01 2010-03-23 International Business Machines Corporation Employing a data structure of readily accessible units of memory to facilitate memory access
US7899663B2 (en) 2007-03-30 2011-03-01 International Business Machines Corporation Providing memory consistency in an emulated processing environment
US9442780B2 (en) 2011-07-19 2016-09-13 Qualcomm Incorporated Synchronization of shader operation
US9064437B2 (en) 2012-12-07 2015-06-23 Intel Corporation Memory based semaphores
CN103608792B (en) * 2013-05-28 2016-03-09 华为技术有限公司 The method and system of resource isolation under support multicore architecture
US20240192854A1 (en) * 2022-12-07 2024-06-13 Hyannis Port Research, Inc. Asymmetric multi-level caching structure for efficient data storage and retrieval

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US4484262A (en) * 1979-01-09 1984-11-20 Sullivan Herbert W Shared memory computer method and apparatus
US4403283A (en) * 1980-07-28 1983-09-06 Ncr Corporation Extended memory system and method
US4414624A (en) * 1980-11-19 1983-11-08 The United States Of America As Represented By The Secretary Of The Navy Multiple-microcomputer processing
US4725946A (en) * 1985-06-27 1988-02-16 Honeywell Information Systems Inc. P and V instructions for semaphore architecture in a multiprogramming/multiprocessing environment
JPH063589B2 (en) * 1987-10-29 1994-01-12 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Address replacement device
US5175839A (en) * 1987-12-24 1992-12-29 Fujitsu Limited Storage control system in a computer system for double-writing
DE68925064T2 (en) * 1988-05-26 1996-08-08 Hitachi Microcomputer Engineering Ltd., Kodaira, Tokio/Tokyo Task execution control method for a multiprocessor system with post / wait procedure
US4992935A (en) * 1988-07-12 1991-02-12 International Business Machines Corporation Bit map search by competitive processors
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
EP0457308B1 (en) * 1990-05-18 1997-01-22 Fujitsu Limited Data processing system having an input/output path disconnecting mechanism and method for controlling the data processing system
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5434970A (en) * 1991-02-14 1995-07-18 Cray Research, Inc. System for distributed multiprocessor communication
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US5636359A (en) * 1994-06-20 1997-06-03 International Business Machines Corporation Performance enhancement system and method for a hierarchical data cache using a RAID parity scheme
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Also Published As

Publication number Publication date
WO2001016738A8 (en) 2001-05-03
WO2001016740A2 (en) 2001-03-08
WO2001016761A3 (en) 2001-12-27
AU7110000A (en) 2001-03-26
WO2001016760A1 (en) 2001-03-08
WO2001016740A3 (en) 2001-12-27
WO2001016743A3 (en) 2001-08-09
WO2001016743A2 (en) 2001-03-08
WO2001016743A8 (en) 2001-10-18
AU6949600A (en) 2001-03-26
WO2001016750A2 (en) 2001-03-08
AU7108500A (en) 2001-03-26
WO2001016738A2 (en) 2001-03-08
AU6949700A (en) 2001-03-26
EP1214653A2 (en) 2002-06-19
WO2001016741A2 (en) 2001-03-08
CA2382927A1 (en) 2001-03-08
EP1214651A2 (en) 2002-06-19
WO2001016761A2 (en) 2001-03-08
WO2001016738A3 (en) 2001-10-04
WO2001016737A3 (en) 2001-11-08
WO2001016738A9 (en) 2002-09-12
AU7100700A (en) 2001-03-26
EP1214652A2 (en) 2002-06-19
AU7112100A (en) 2001-03-26
WO2001016750A3 (en) 2002-01-17
CA2382728A1 (en) 2001-03-08
WO2001016741A3 (en) 2001-09-20
WO2001016737A2 (en) 2001-03-08
WO2001016742A2 (en) 2001-03-08
WO2001016742A3 (en) 2001-09-20
AU7108300A (en) 2001-03-26
AU7113600A (en) 2001-03-26
CA2382929A1 (en) 2001-03-08

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase