AU7383198A - Method and apparatus for programming a graphics subsystem register set - Google Patents

Method and apparatus for programming a graphics subsystem register set

Info

Publication number
AU7383198A
AU7383198A AU73831/98A AU7383198A AU7383198A AU 7383198 A AU7383198 A AU 7383198A AU 73831/98 A AU73831/98 A AU 73831/98A AU 7383198 A AU7383198 A AU 7383198A AU 7383198 A AU7383198 A AU 7383198A
Authority
AU
Australia
Prior art keywords
programming
register set
graphics subsystem
subsystem register
graphics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU73831/98A
Inventor
Michael K. Larson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
S3 Inc
Original Assignee
S3 Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by S3 Inc filed Critical S3 Inc
Publication of AU7383198A publication Critical patent/AU7383198A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Bus Control (AREA)
AU73831/98A 1998-05-12 1998-05-12 Method and apparatus for programming a graphics subsystem register set Abandoned AU7383198A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1998/009688 WO1999059068A1 (en) 1998-05-12 1998-05-12 Method and apparatus for programming a graphics subsystem register set

Publications (1)

Publication Number Publication Date
AU7383198A true AU7383198A (en) 1999-11-29

Family

ID=22267044

Family Applications (1)

Application Number Title Priority Date Filing Date
AU73831/98A Abandoned AU7383198A (en) 1998-05-12 1998-05-12 Method and apparatus for programming a graphics subsystem register set

Country Status (4)

Country Link
EP (1) EP1080413A4 (en)
JP (1) JP4846097B2 (en)
AU (1) AU7383198A (en)
WO (1) WO1999059068A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3369580B2 (en) * 1990-03-12 2003-01-20 ヒューレット・パッカード・カンパニー Interface device and method for direct memory access
US5408605A (en) * 1993-06-04 1995-04-18 Sun Microsystems, Inc. Command preprocessor for a high performance three dimensional graphics accelerator
US5524265A (en) * 1994-03-08 1996-06-04 Texas Instruments Incorporated Architecture of transfer processor
US5706478A (en) * 1994-05-23 1998-01-06 Cirrus Logic, Inc. Display list processor for operating in processor and coprocessor modes
US5657479A (en) * 1995-12-04 1997-08-12 Silicon Graphics, Inc. Hierarchical display list processing in graphics data retrieval system

Also Published As

Publication number Publication date
WO1999059068A1 (en) 1999-11-18
EP1080413A1 (en) 2001-03-07
EP1080413A4 (en) 2006-02-01
JP2002514817A (en) 2002-05-21
JP4846097B2 (en) 2011-12-28

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase