AU7068791A - A method for manufacturing of mineature impedance matched interconnection patterns - Google Patents
A method for manufacturing of mineature impedance matched interconnection patternsInfo
- Publication number
- AU7068791A AU7068791A AU70687/91A AU7068791A AU7068791A AU 7068791 A AU7068791 A AU 7068791A AU 70687/91 A AU70687/91 A AU 70687/91A AU 7068791 A AU7068791 A AU 7068791A AU 7068791 A AU7068791 A AU 7068791A
- Authority
- AU
- Australia
- Prior art keywords
- mineature
- manufacturing
- impedance matched
- interconnection patterns
- matched interconnection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0317—Thin film conductor layer; Thin film passive component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/467—Adding a circuit layer by thin film methods
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NO900229 | 1990-01-16 | ||
NO900229A NO900229D0 (en) | 1990-01-16 | 1990-01-16 | PROCEDURE FOR MANUFACTURING MINIATURIZED IMPEDAN CUSTOMIZED WIRING NETWORK. |
Publications (1)
Publication Number | Publication Date |
---|---|
AU7068791A true AU7068791A (en) | 1991-08-05 |
Family
ID=19892800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU70687/91A Abandoned AU7068791A (en) | 1990-01-16 | 1991-01-16 | A method for manufacturing of mineature impedance matched interconnection patterns |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0510049A1 (en) |
JP (1) | JPH06503680A (en) |
AU (1) | AU7068791A (en) |
NO (1) | NO900229D0 (en) |
WO (1) | WO1991011025A1 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3461204B2 (en) * | 1993-09-14 | 2003-10-27 | 株式会社東芝 | Multi-chip module |
JP3034180B2 (en) * | 1994-04-28 | 2000-04-17 | 富士通株式会社 | Semiconductor device, method of manufacturing the same, and substrate |
US6347037B2 (en) | 1994-04-28 | 2002-02-12 | Fujitsu Limited | Semiconductor device and method of forming the same |
US5874770A (en) * | 1996-10-10 | 1999-02-23 | General Electric Company | Flexible interconnect film including resistor and capacitor layers |
JP2003332749A (en) * | 2002-01-11 | 2003-11-21 | Denso Corp | Passive device built-in substrate, its fabrication method, and material for building passive device built-in substrate |
JP4793014B2 (en) * | 2006-02-17 | 2011-10-12 | 大日本印刷株式会社 | Passive element built-in wiring board and manufacturing method thereof |
US9848498B2 (en) | 2014-08-13 | 2017-12-19 | Finisar Corporation | Optoelectronic subassembly with components mounted on top and bottom of substrate |
US9854687B2 (en) | 2014-08-13 | 2017-12-26 | Finisar Corporation | Multi-layer substrates including thin film signal lines |
CN107111082B (en) * | 2014-10-28 | 2019-08-02 | 菲尼萨公司 | Multilager base plate |
CN109686721A (en) * | 2019-01-31 | 2019-04-26 | 中国电子科技集团公司第四十三研究所 | A kind of Thick film multilayer wire structures of low thermal resistance and preparation method thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2526553C3 (en) * | 1975-06-13 | 1978-06-01 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Multilayer electronic circuit and method for its manufacture |
DE3121131C2 (en) * | 1981-05-27 | 1984-02-16 | ANT Nachrichtentechnik GmbH, 7150 Backnang | Process for the production of circuit boards provided with conductor tracks with metallic vias |
JPS6366993A (en) * | 1986-09-08 | 1988-03-25 | 日本電気株式会社 | Multilayer interconnection board |
EP0266210B1 (en) * | 1986-10-29 | 1993-02-17 | Kabushiki Kaisha Toshiba | Electronic apparatus comprising a ceramic substrate |
-
1990
- 1990-01-16 NO NO900229A patent/NO900229D0/en unknown
-
1991
- 1991-01-16 JP JP3502493A patent/JPH06503680A/en active Pending
- 1991-01-16 WO PCT/NO1991/000005 patent/WO1991011025A1/en not_active Application Discontinuation
- 1991-01-16 EP EP19910902142 patent/EP0510049A1/en not_active Withdrawn
- 1991-01-16 AU AU70687/91A patent/AU7068791A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JPH06503680A (en) | 1994-04-21 |
EP0510049A1 (en) | 1992-10-28 |
WO1991011025A1 (en) | 1991-07-25 |
NO900229D0 (en) | 1990-01-16 |
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