AU703005B2 - Circuit arrangement of an ultra-broadband receiver - Google Patents
Circuit arrangement of an ultra-broadband receiver Download PDFInfo
- Publication number
- AU703005B2 AU703005B2 AU45825/96A AU4582596A AU703005B2 AU 703005 B2 AU703005 B2 AU 703005B2 AU 45825/96 A AU45825/96 A AU 45825/96A AU 4582596 A AU4582596 A AU 4582596A AU 703005 B2 AU703005 B2 AU 703005B2
- Authority
- AU
- Australia
- Prior art keywords
- circuit arrangement
- amplifier
- circuit
- ultra
- broadband receiver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/60—Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
- H03F3/601—Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators using FET's, e.g. GaAs FET's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
- H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
Description Circuit arrangement of an ultra-broadband receiver The invention relates to a circuit arrangement of an ultra-broadband receiver.
An ultra-broadband receiver is disclosed, for example, in US Patent 5.010.588. However, this circuit arrangement, a high-impedance receiver, has the disadvantage that, apart from a multiplicity of circuit/line elements, a total linearization of the frequency response additionally requires at the circuit output a high-pass filter which limits the dynamic response of the ultrabroadband receiver. Furthermore, the circuit arrangement is attended by the disadvantage that, when it is dimen- :sioned specifically for a low noise response, the 15 receiver circuit has only a low dynamic response.
Moreover, with regard to the respective application, this receiver circuit must be specifically designed and optimized either with a "high input sensitivity" or for a "high permissible optical input power". Electronic 20 Letters, 1993, Vol. 29, No. 5, pages 492 and 493 by M. Neuhfuser, H.M. Rein, H. Wenz and A. Felder discloses a further ultra-broadband receiver circuit, a trans- ""impedance circuit integrated in a module. This transimpedance circuit has a high dynamic response in simultaneous conjunction with a low noise response.
However, these advantages can be realized only with an S"integrated circuit arrangement. A disadvantage of this specified circuit is that the negative feedback provided in the case of this circuit type easily leads to selfexcitation caused by the signal delay of the amplifier element, the negative signal feedback at the upper end of the output range becoming a positive signal feedback.
Consequently, the transimpedance circuit cannot be realized in a discrete design with a bandwidth required for an ultra-broadband receiver.
The object of the invention is to specify a discrete circuit arrangement of an ultra-broadband receiver having low noise characteristics and a high -2dynamic response.
According to one aspect of the present invention there is provided a discrete circuit arrangement for an ultra-broadband receiver, said circuit arrangement including: at least one amplifier stage formed with an amplifier element, and a resistor element which determines an operating point being arranged at a first terminal of the amplifier element, wherein a load resistance and a coupling capacitor are arranged at a second terminal of the amplifier element; and a T-shaped line element for impedance matching in terms of frequency between the load resistance, the second terminal of the amplifier element and the coupling capacitor; wherein the amplifier element of a first amplifier stage is constructed with a negative feedback unit between the first and second terminals of the amplifier element.
At the same time as the advantage of a desired bandwidth of greater than GHz with a high linearity of frequency response (from approximately 50 KHz), the invention permits a high dynamic response in simultaneous conjunction with a low noise response.
Moreover, the configuration of the circuit arrangement in accordance with the invention results in the saving at the circuit output of the ultra-broadband receiver a filter element which forms a high-pass filter. Furthermore, the circuit arrangement is attended by the further advantage that commercial components can be used to produce a discrete circuit design...
The invention is attended by the further advantage that receiving elements, built into a suitable microwave housing, for the highest data rates can be used as interface at the input of the ultra-broadband receiver.
In a further embodiment of the invention, the negative feedback resistor is split 9up into two component negative-feedback resistors. These component negativefeedback resistors are respectively arranged at the ends of a negative-feedback loop at the amplifier element of the circuit arrangement. This is attended by the advantage that the spur line filter effects occurring at high frequencies are avoided.
A further advantage of the invention consists in that it is possible to transform the circuit to a highly dielectric substrate with the use of laminated components.
Further characteristics of the invention are to be seen from the following explanations with the aid of an exemplary embodiment.
The signals are fed in at the circuit input E of the circuit arrangement via an opto-electronic transducer element, for example.
The circuit arrangement shown in the exemplary embodiment
U/I
[n:\Iibpp]Ol 127:IAD 3 is an ultra-broadband receiver formed from an input amplifier stage EV and an output amplifier stage AV. The opto-electronic transducer element, a photodiode P, is connected at one of its electrodes via a capacitor CE, on the one hand, and via a resistor R bias acting as current limiter for the photodiode P, on the other hand.
The second electrode and photodiode P is connected to the input G of the amplifier element T1 of the input amplifier stage EV, a field effect transistor, and to a circuit connected in series therewith and comprising a resistor Rgl, which sets the operating point of the field effect transistor T1, and a capacitor Cgl, which is connected in series therewith for the purpose of blocking off DC signal components. The resistor Rgl forms a part 15 of the load resistance of the photodiode P. The gate terminal and the drain terminal of the amplifier element T1 in the input amplifier stage EV are connected to a series circuit comprising at least two resistor elements Rfl, Rf2 and a capacitor C1 arranged between the two resistor elements Rfl, Rf2.
The source terminal of the amplifier element Tj of the input stage EV is connected to an operating potential corresponding to the frame potential. Arranged at the drain terminal of the amplifier element T1 of the input 25 stage EV are a load resistance Rdl as well as, in series therewith, a capacitor Cdl. Voltage potential terminals SpE, Spl, Spl' for operating the photodiode P and the amplifier element T1 in the input amplifier stage EV are respectively arranged at the capacitors Cgl, Cdl blocking off the DC components, and at the resistors Rbias, Rgl and Rdl. A capacitor CT is arranged for the purpose of DC electrical isolation CT between the input amplifier stage EV and the output amplifier stage AV. The output amplifier stage AV, which is downstream of the input amplifier stage EV, has a further active amplifier element T2, which is constructed as a voltage-controlled current source. A series circuit Rg2, Cg2; Rd2, Cd2, formed from a resistor element Rg2, Rd2 and a capacitor Cg2, Cd2 is respectively arranged at the gate terminal and at the 4 drain terminal of the amplifier element T2 of the output amplifier stage AV. The capacitor element Cg2, Cd2 is connected in this case with one connecting side to a voltage potential corresponding to the operating voltage.
The voltage potential required in each case for the amplifier element T2 is applied between the resistor element Rg2 (Rd2) and the capacitor Cg2 (Cd2) of the series circuit, for the purpose of setting the operating point of the active element in the output amplifier stage
AV.
Transforming line elements LE for respectively matching the individual discrete circuit elements are integrated into the circuit arrangement between the "discrete" circuit elements set forth above. The matching and 15 tuning of the circuit elements of the entire circuit arrangement of the ultra-broadband receiver are performed, inter alia, by varying the width and/or length of the individual transforming line elements LE.
The initial starting point in the circuit according to the invention is a high-impedance circuit having an ohmic load resistance Rgl in the input amplifier stage EV at the gate terminal of the amplifier element T1 of the input amplifier unit EV. Depending on the dimensioning of the resistor Rgl, this high-impedance circuit has 25 either a relatively high noise (Rg small) or a low dynamic response (Rg large).
S"According to the invention, the high-impedance S. circuit is additionally constructed with a newly inserted feedback element in the amplifier element T1 of the input amplifier stage EV. This feedback, a series circuit formed from two resistor elements Rfl, Rf2 interrupted by a capacitor element C1 is dimensioned in this case such that no self-excitation of the amplifier element T1 occurs.
The starting point is a high-impedance circuit which is designed for a low input noise and for a high input sensitivity and has an ohmic load resistance Rgl in the input of the circuit arrangement (Rgl relatively large).
A negative feedback resistor Rfl and Rf2 is inserted at the amplifier element in the input amplifier stage EV.
The entire negative feedback resistor Rfl, Rf2 is selected in this case such that the resultant gain of an open loop is reduced to such an extent in the frequency range of a critical phase rotation (that is to say is smaller than 1) that self-excitation is prevented.
On the one hand, this permits the elimination of the RC high-pass equalizer, customary in the high-impedance circuit, at the output of the circuit arrangement and, on the other hand, an input noise which is low by comparison with the original pure high-impedance circuit is achieved together with a significant improvement in the dynamic response. This is to be ascribed to the property of the circuit arrangement that negative feedback of the type 15 described above already suffices to linearize virtually completely the rise in level which occurs in conventional high-impedance circuits.
The linearization achieved in the frequency response is so far-reaching that, as already specified above, it is possible to dispense with the otherwise conventional RC high-pass equalizer inside the receiving amplifier or at the output thereof.
The residual equalization is achieved by overall balancing of the transforming line elements and/or components contained in the receiver circuit arrangement.
Owing to the relatively long propagation times and thus phase rotations which increase rapidly with frequency in a discrete design, only a low negative feedback is possible in the amplifier element T1 of the input amplifier stage EV. A negative feedback which is low overall is effected by the relatively high-resistance resistors Rfl and Rf2. Since, however, both the transfer function F(w) of the amplifier element T1 having the gate resistors Rbias, Rgl and drain resistor Rdl, and the transfer function B(w) of the negative feedback loop increase towards low frequencies by virtue of the unavoidable low-pass effect, the negative feedback effect is stronger there. The overall weak negative feedback of the circuit arrangement suffices to achieve the desired 6 improvement in dynamic response. Rgl is designed in this case such that the circuit exhibits the desired noise response.
S The claims defining the invention are as follows: 1. A discrete circuit arrangement for an ultra-broadband receiver, said circuit arrangement including: at least one amplifier stage formed with an amplifier element, and a resistor element which determines an operating point being arranged at a first terminal of the amplifier element, wherein a load resistance and a coupling capacitor are arranged at a second terminal of the amplifier element; and a T-shaped line element for impedance matching in terms of frequency between the load resistance, the second terminal of the amplifier element and the coupling capacitor; wherein the amplifier element of a first amplifier stage is constructed with a negative feedback unit between the first and second terminals of the amplifier element. 2. Circuit arrangement according to claim 1, wherein the negative feedback unit is a series circuit comprising at least two resistor elements and a capacitive element arranged between these, and a line element is arranged in each case between the resistor elements and the capacitive element. :0 3. Circuit arrangement according to claim 2, wherein one terminal end of the resistor elements is directly connected to the input line of the amplifier element and the other terminal end of the resistor elements is directly connected to the output time of the amplifier element.
4. Circuit arrangement according to any one of the preceding claims, wherein the amplifier element is a gallium arsenide field effect transistor.
Circuit arrangement according to claim 1, wherein at least one line element is arranged at a gate terminal and at a drain terminal of a field effect transistor, and I C Ji 9 [n:\libpp]l01127:IAD
Claims (2)
- 6. Circuit arrangement according to claim 1, wherein in each case a T-shaped line element for impedance matching of the amplifier stages in terms of frequency is arranged at the input of the first amplifier element.
- 7. A circuit arrangement substantially as herein described with reference to the accompanying drawings. DATED this Twelfth Day of January 1999 Siemens Aktiengesellschaft: Patent Attorneys for the Applicant SPRUSON FERGUSON 0* [n:\libppl011 27:IAD Circuit Arrangement of an Ultra-Broadband Receiver ABSTRACT Circuit arrangement for an ultra-broadband receiver of discrete design, having at least one amplifier stage (EV) formed with an amplifier element the amplifier element (T1) of a first amplifier stage (EV) being designed formed with a negative feedback unit, and the negative feedback unit being formed from two resistor elements (Rfl,RF 2 and a capacitor (C 1 arranged between the resistor elements. C u *C CC.. C C C* maa5414T
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE1995107133 DE19507133C2 (en) | 1995-03-01 | 1995-03-01 | Circuit arrangement of an ultra broadband receiver |
| DE19507133 | 1995-03-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU4582596A AU4582596A (en) | 1996-09-05 |
| AU703005B2 true AU703005B2 (en) | 1999-03-11 |
Family
ID=7755349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU45825/96A Ceased AU703005B2 (en) | 1995-03-01 | 1996-02-29 | Circuit arrangement of an ultra-broadband receiver |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0730342A1 (en) |
| AU (1) | AU703005B2 (en) |
| DE (1) | DE19507133C2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008005128A (en) * | 2006-06-21 | 2008-01-10 | Mitsubishi Electric Corp | Microwave amplifier |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5010588A (en) * | 1988-03-10 | 1991-04-23 | Bell Communications Research, Inc. | Ultrawide-bandwidth low-noise optical receiver |
| US4878033A (en) * | 1988-08-16 | 1989-10-31 | Hughes Aircraft Company | Low noise microwave amplifier having optimal stability, gain, and noise control |
-
1995
- 1995-03-01 DE DE1995107133 patent/DE19507133C2/en not_active Expired - Fee Related
-
1996
- 1996-02-28 EP EP96102985A patent/EP0730342A1/en not_active Withdrawn
- 1996-02-29 AU AU45825/96A patent/AU703005B2/en not_active Ceased
Non-Patent Citations (1)
| Title |
|---|
| IEEE PHOTONICS TECHNOLOGY LETTERS VOL 3 NO 3 1/3/91 P278-280 PATTERSON DR ET AL LOW-NOISE RECEIVERS FOR FIBRE OPTIC COMM. 15TH EUROPEAN MICROWAVE CONFERENCE 9-13 SEPT. 1985 P 919-924 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008005128A (en) * | 2006-06-21 | 2008-01-10 | Mitsubishi Electric Corp | Microwave amplifier |
| JP4641285B2 (en) * | 2006-06-21 | 2011-03-02 | 三菱電機株式会社 | Microwave amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| DE19507133C2 (en) | 1998-06-04 |
| EP0730342A1 (en) | 1996-09-04 |
| AU4582596A (en) | 1996-09-05 |
| DE19507133A1 (en) | 1996-09-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |