AU631861B2 - Circuits with switching protection and parts therefor - Google Patents

Description

I

7 i i i Ii OPI DATE 16/11/90 AOJP DATE 20/12/90 APPLN. ID 54497 PCT NUMBER PCT/AU90/00152 PCIr INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (51) International Patent Classification 5 (Il) International Publication Number: WO 90/13177 H03K 17/10, 17/12, 17/64 Al (43) International Publication Date: 1 November 1990 (01.11.90) (21) International Application Number: PCT/AU90/00152 (81) Designated States: AT, AT (European patent), AU, BB, BE (European patent), BF (OAPI patent), BG, BJ (OAPI (22) International Filing Date: 18 April 1990 (18.04.90) patent), BR, CA, CF (OAPI patent), CG (OAPI patent), CH, CH (European patent), CM (OAPI patent), DE, DE (European patent), DK, DK (European patent), ES, Priority data: ES (European patent), FI, FR (European patent), GA PJ 3751 18 April 1989 (18.04.89) AU (OAPI patent), GB, GB (European patent), HU, IT (European patent), JP, KP, KR, LK, LU, LU (European patent), MC, MG, ML (OAPI patent), MR (OAPI patent), (71)Applicant (for all designated States except US): BORAL MW, NL, NL (European patent), NO, RO, SD, SE, SE JOHNS PERRY INDUSTRIES PTY LTD. [AU/AU]; (European patent), SN (OAPI patent), SU, TD (OAPI Wangara Road, Cheltenham, VIC 3192 patent), TG (OAPI patent), US.

(72) Inventor; and Inventor/Applicant (for US only) ECKERSLEY, Gregory, Published P. [AU/AU]; 45 Wangara Road, Cheltenham, VIC 3192 With international search report.

(AU).

(74) Agents: WILSON, Stephen, W. et al.; Griffith Hack Co., 1 601 St. Kilda Road, Melbourne, VIC 3004 (AU).

(54)Title: CIRCUITS WITH SWITCHING PROTECTION AND PARTS THEREFOR

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cs L oCo 22 24 14 ,.211 J, \14 14'2A LSA L- S D2 s2 1 B 1 D2A14 I 20 RS20 Vo CS (57) Abstract A controllable circuit (10) having protection against damaging switching conditions for its component transistors (12) is described. The circuit (10) is a full-wave inverter bridge being controlled by a pulse width modulation technique, to which is connected an inductive load (50) and a resonant circuit The circuit (10) also comprises snubber circuit (18) and free-wheeling diodes (14) associated with each transistor The transistors (12) are switched between on-states and off-states to synthesize a pulse width modulation waveform from input supplies Vs+ and V s at the output terminals VA and VB. The elements of the resonant circuit (30) provide for placing the transistors (12) in an advantageous condition for switching between states, such that they do not experience undue damage or stresses. The method of operation includes switching-on one of the controllable transistors (22) to provide an alternative path for the load current, IL, thereby forming a resonant circuit by two capacitors the inductor LC and the load. In this way, there is control over the rate of rise of the off-state voltage, dv/dt, and the rate of rise of on-state current, di/dt, and minimization of the static off-state voltage all with respect to the transistors The diodes (24) provide blocking in respective opposite half cycles.

See back of page -r WO 90/13177 PCT/AU90/00152 1 CIRCUITS WITH SWITCHING PROTECTION AND PARTS THEREFOR FIELD OF THE INVENTION This invention relates to circuits with switching protection and parts therefor, and relates particularly but not exclusively to arrangements for the protection of such circuits having switching devices which are switched under load conditions.

DESCRIPTION OF THE PRIOR ART Semiconductor devices used in power circuits can be considered as forming two specific groups. The first group comprises devices such as SCR's or Triacs which can be WO 90/13177 PCT/A 2 swi-tched into an on-state via a control electrode, but be switched into an off, or blocking state through the electrode, rather, require natural or forced commutati second group comprises devices such as GTO's, Power Transistors and IGFET's which can be switched into bot jon-state and the off-state via a control electrode.

This discussion will focus on circuits conta: semiconductor power devices of this second group.

Such semiconductor power devices find greate in rectifier, chopper and inverter circuits, where the: :I switching capabilities are used to synthesize waveform; supplying electrical loads. In designing these types circuits, there are a number of design performance cri which must be considered.

In the off-state, the device will have some principal voltage withstand characteristic, above whici ji avalanche breakdown will occur. Avalanche breakdown o 'i when minority carriers dislodge further minority carri thereby transforming the device into the on-state.

In addition to an off-state voltage withstan rating, the time rate of change of voltage rating, dv/ j| also important. If the off-state voltage increases to rapidly with time, there may be a spontaneous change t on-state.

A further consideration is the critical rate of on-state current, di/dt. If the rate of change of is too high there will be a deleterious effect to the semiconductor power device due to junction heating or avalanche breakdown. This problem has, in part, been alleviated by the use of series inductors.

Known pulse width modulation (PWM) systems a: designed to synthesize an output waveform of one or mo: phases having a frequency differing from that of the i Improvements in semiconductor power devices in terms o: current rating and dv/dt limits have allowed PWM switc 2 LU90/00152 can not same on. The h the ining st usage ir s of teria finite h ccurs ers d dt, is o o the of rise current direct re re nput.

f hing WO 90/13177 PCT/AU90/00152 3 frequencies to increase. Nevertheless, with higher switching frequencies has come the problem of greater Radio Frequency Interference (RFI).

There are also problems associated with the frequency of switching between the on-state and off-state for such devices due to limitations placed by minority carrier recombination times, which manifests itself in finite switch-off times and the need to absorb an amount of energy in snubber circuitry.

Where the load being supplied is inductive, the current flowing will be lagging the supply voltage, and despite techniques such as the provision of free-wheeling diodes, there will nevertheless be an amount of energy which must be dissipated by the semiconductor power device. This energy is in the form of heat, which must be considered in the circuit design in terms of cooling requirements. If there is insufficient protection of the semiconductor power device, adverse junction heating can occur which could lead to its ultimate destruction.

One approach to alleviate these problems is the use of a high frequency resonant source (viz., at the input) to assist in the switching of semiconductor power devices and introduce controlled dv/dt and di/dt. The use of a constant natural frequency to commutate the switching devices has the drawback that switching between states can only take place at points of natural commutation, which is not particularly useful for PWM circuits in which it is desirable to switch any device at any time, especially if a variable frequency output is to be synthesized. As a result there will be poor switching resolution which reduces the advantages of high natural frequency and can also lead to unwanted modulation noise.

4 OBJECT AND STATEMENT OF THE INVENTION It is an object of the invention to provide for the change of state for switching devices at any desired time, even in the presence of inductive load currents, in a manner such that undue stresses, which would otherwise lead to failure, are not placed on the devices.

Therefore the invention provides an electrical circuit with switching protection comprising: a controlled circuit having an input DC voltage supply and including switching devices which can be switched by a control electrode between a current conducting on-state and a current blocking off-state, the controlled circuit being adapted to generate by the switching devices one or more voltage outputs; an electrical load having an inductive component connected to the one or each voltage output of the controlled circuit; and a switching protection circuit having inductive and capacitive elements and being controllable by switching means to be connected to the one or each voltage output of the controlled circuit, the switching protection circuit being controllable by control means so that during an off- 25 state between sequential on-states of the switching devices the switching protection circuit is connected to the one or each voltage output to cooperate with the load and form a resonant circuit therewith anid providing a path for charge stored in the said capacitive elements to dissipate the said stored charge so that the switching devices that are to bei 4 ;=ae from the off-state to the on-state are not: subjected to large in-rush currents upon such switching and; (ii) to reduce the voltage appearing across the f t

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switching devices so that the switching devices are not inordinately stressed upon so switching.

The invention further provides an electrical circuit with switching protection comprising: a controlled circuit having an input DC voltage supply and including switching devices which can be switched by a control electrode between a current conducting on-state and a current blocking off-state, the controlled circuit being adapted to generate by the switching devices one or more voltage outputs; an electrical load having an inductive component connected to the one or each voltage output of the controlled circuit; and a switching protection circuit having inductive and capacitive elements and being controllable by switching means to be connected to the one or each voltage output of the controlled circuit, the switching protection circuit being controllable by control means so that during an offstate between sequential on-states of the switching devices the switching protection circuit is connected to the one or each voltage cutput to cooperate with the load and form a resonant circuit therewith and providing a path for charge stored in the said capacitive elements to dissipate the 25 said stored charge so that the switching devices that are to be disposed from the off-state to the on-state are not: subjected to large in-rush currents upon such switching; and (ii) to reduce the voltage appearing across the switching devices so that the switching devices are not inordinately stressed upon so switching; and subsequent to the on-state having occurred, the said inductive components and capacitive components resonantly cooperating to recharge ones of the capacitive ~i~a 1f1-0 i i components for a subsequent transition for the on-state to I the off-state, thereby increasing the switching efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS In order that the invention may be more clearly understood, examples of preferred embodiments will now be described with reference to the accompanying drawings wherein: Figure 1 shows one form of an idealised pulse width modulation generated waveform in accordance with the prior art; Figure 2 shows a single phase inverter disposed in one particular state and constructed in accordance with the invention; Figure 3 shows the single phase inverter of Figure 2 in another state; Figure 4 shows details of current and voltage waveforms during turn-on of one limb of the bridge as shown in Figure 2; and Figure 5 shows a further embodiment of a three phase application for the invention.

St i2: oo *o o i r ~2 6 Detailed Description of Preferred Embodiments The description of preferred embodiments will be made with reference to pulse width modulation (PWM) controlled inverters supplying inductive loads, however it is to be understood that the invention need not be limited to such an application, and is equally applicable in circuits for rectifiers, choppers, cyclo-convertors, switched mode power supplies and other similar uses.

Figure 1 shows a simple illustration of one form of a pulse width modulation technique. The output waveform V 0 is synthesized in the two half-cycles by a number of voltage pulses V having magnitude V in the positive half cycle, and n s the magnitude V in the negative half cycle. That is, the

S

resultant of the pulses approximates the sinusoidal representation of the output waveform V 0 The number and width of the various pulses V will be changed in accordance n with the desired frequency of the output waveform V 0

A

limitation on the maximum achievable output frequency will depend on how quickly the switching devices which are synthesizing the waveform can be switched on or off. The technique of pulse width modulation is well known.

Referring now to Figure 2, there is shown a single phase full-wave PWM controlled inverter bridge circuit connected to an inductive load 50. A resonant circuit 30 is 25 connected across the output of the bridge circuit 10, with the output being identified as terminals VA and V

B

This configuration allows switching to the on-state or to the off-state from the opposite state at any point on the output voltage waveform.

30 The sources for the bridge circuit 10 are the two DC supply voltages V s and V s It is equally possible to provide for the supply voltage to be of a frequency other than DC, such as would be the case for a cyclo-convertor.

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WO90/13177 PCT/AU90/00152 -7- The bridge circuit 10 is forned by two limbs, each of which comprises a pair of switching devices in the form of bipolar junction transistors 12. The first limb is constituted by transistors QIA and Q2A and the second limb by transistors QIB and Q2B. Each of the transistors 12 is provided with a free wheeling diode 14, being variously DlA, D2A, DIB and D2B.

Although transistors have been shown in the limbs of the bridge, it would be equally applicable to substitute other semiconductor devices which can be switched-off via a control electrode, such as GTO's or IGFET's.

The centrepoint 16 of each limb is connected to a respective snubber circuit 18 comprising a parallel resistor and inductor combination RSA and LSA, RSB and LSB, after which is formed the respective output terminals VA and VB. At the output terminals, there are also connected capacitors 20 (CSI CS4) which are components of the resonant circuit 30, and which also connect to either of the supply voltages V or

S

V

s The inductive load 50 is shown connected between the output terminals V A and V

B

Also connected between the output terminals is part of the resonant circuit 30, which is symmetric and comprises two anti-parallel connected series transistor/diode configurations, in combination being in series with inductor LC. The transistors 22 are designated QC1, QC2 respectively, and the diodes 24 are designated DC1, DC2.

For the purpose of this discussion, the snubber circuits 18 will be temporarily ignored, as they are of small value and do not significantly affect operation of the bridge circuit The example of Figure 2 shows the condition of transistors QlA and Q2B conducting. This corresponds to any particular one of the pulses V n in the positive half-cycle of -the output voltage waveform V 0 as shown in Figure i. In this state, load current I L flows from the supply Vs through the through the -j WO 90/13177 PCT/AU90/00152 -8inductive load 50 recurning to the input supply V as shown.

The voltage appearing between the output terminals V A and V

B

would be close to 2*Vs, allowing for collector-emitter voltage drops in transistors QlA and Q2B, as well as the voltage drop across resistors RSA and RSB.

Although the controlling electronics for the base *i terminals of the various transistors 12,22 are not shown, in use, they can all be driven by appropriate circuitry which |a would be under the control of digital processing apparatus.

i The negative half cycle of waveform V shown in Figure 1, would be achieved by the appropriate switching of transistors Q2A and QlB such that the polarity of the voltage i ;j appearing between the output terminals VA and VB would be reversed.

i 15 In the examples shown, transistors Q1A and Q2B are conducting, and capacitors CS2 and CS3 will become charged Iwith approximately voltage of 2*V s i "Considering firstly the instance of switching-off ii transistors QlA and Q2B for the purpose of generating an ji 20 off-state within the PWM generated waveform.

This is achieved by gating these transistors via ,J their base terminals such that they become blocking. Since the load 50 is inductive, the current I L through the transistors will be lagging and must find a path through forward biased diodes D1A and D2B.

The voltage at the output terminals VA and V B will i slew with a controlled rate of IL/(2*CS) until such time as j' diodes D1B and D2A conduct. The voltage between the output |i terminals V A and Vg will then be at its zero reference value, and the load current I L will continue to flow for a finite time until the stored energy of capacitors CS2 and CS3 is dissipated.

WO 90/13177 PCT/A U90/00152 9- It is usual to institute a further on-state well before the load current I L has decreased substantially. That is, is preferable to maintain the load current I L as being continuous. The switching between on-states and off-states is clearly shown in Figure 1.

Considering now the switch-on procedure, which again will conveniently be a consideration of transistors QIA and Q2B. Since the charge stored in capacitors CS2 and CS3 will not have totally dissipated following an off-state, if the resonant circuit 30 was not provided there would be a large in-rush current experienced by the transistors upon switch-on due to this stored charge, which can cause substantial damage to the transistors.

In describing the switch-on procedure in more detail, reference will be made to Figures 3 and 4.

Before transistors QlA and Q2B are switched-on, transistor QC2 is activated, thereby including .nductance LC in parallel arrangement with the load 5u. Diode DC2 will be forward biased, and therefore, stored energy in capac -ors CS2 and CS3 now has a second path other than through loac following switch-on of transistor QC2, the current through LC will increase linearly at a rate of (V V until it is s s equal to the load current I

L

Figure 4 shows the near continuous load current I

L

together with current through inductor LC and the load voltage between output terminals VA and VB. The section A-B in Figure 4 represents the increase of current through inductor LC up to a point where it is equal to the load current I

L

After this point, the current through inductor LC continues to increase following a resonant trajectory B-C for a period of (LC*CSi) due to the resonant circuit formed between inductor LC and capacitors CS2 and CS3. The voltage across respective capacitors CS2 and CS3 has now decreased as the load voltage increases following a half sine wave in section B-C until the voltage between the output terminals V A and V

B

has changed sign.

V, A14 1>.l Q At point C, transistors QlA and Q2B are switched-on, in which instance there will be virtually no voltage difference between VA and Vs and VB and V s respectively, and hence transistors QlA and Q2B are not inordinately stressed.

The current through inductor LC will then decay linearly at the rate of (Vs Vs-)/LC along section C-D until it reaches zero, the energy being resonantly converted to stored charge in capacitors CS1 and CS4 to prime those capacitors for the next turn off event, thereby increasing the switching efficiency. At the zero point, the transistor QC2 can be turned off.

The maximum current flowing through inductor LC will be (Vs (CS/LC). The diodes DC1 and DC2 provide reverse blocking for their respective transistors QC1, QC2.

In the example given, transistor QC2 is utilised in switching-on transistors QlA and Q2B; conversely transistor QC1 would be used in the switch-on procedure for transistors Q2A and QlB. Transistors QC1 and QC2 are shown as bipolar junction transistors, but could easily be other Stypes of semiconductor devices, such as GTO's, IGFET's, or 25 indeed, SCR's since there is no particular need for turnoff by a control electrode. A single Triac could replace both transistors QC1 and QC2.

9 A* It is necessary for the transistors 22 and diodes 24 in the 30 rasonant circuit 30 to be rated with the equivalent forward current rating of the load, however the advantages of low -stress switching and the elimination of commutation clamp rails are sufficient to justify the extra cost when e- operating at high switching frequency associated with PWM techniques.

Returning to the components of the snubber circuit 18, RSA/LSA and RSB/LSB. These components have been included to allow for losses in the resonant circuit 30, and to prevent momentary excessive current at switch-on of the bridge transistors 12. That is, there will always be a small remnant voltage across the complimentary capacitor in each limb (for example Q1A and CS2) which could cause inrush current upon r* a ee WO 90/13177 PCT/AU90/00152 ii change of state of a transistor 12. This in-rush current must be controlled and dissipated by the combination of the parallel resistance and inductance of the snubber circuit 18.

Although not shown, it is most preferable to include an interlock in the circuit 10 to ensure that the bridge transistors QIA/Q2B and Q2A/Q1B do not switch-on unless their :orward voltage is below the maximum safe level determined by :he snubber circuit 18.

In the example described above, the switching of transistors QIA, Q2B and QC2 corresponds to the positive half cycle of the synthesized output waveform V 0 For the negative half cycle, operation of the complementary components would take place.

The bridge circuit 10 shown is not self starting, rather an initiating circuit must be included to charge the capacitors CSI-4, which could be achieved by a pair of relatively low current FET's or BJT's with series resistors.

As noted, the transistors 22 and iiodes 24 in the resonant circuit 30 must be rated for full loal current, but it is also possible to duplicate the transistor 22, diode 24 and inductor LC structure shown and provide an interconnecting centrepoint between the duplicated sections which is at a zero voltage reference level, whereby the voltage ratings of the transistors could be halved.

If the inverter bridge circuit 10 were only a half wave bridge, the limbs containing transistors QlB and Q2B would not be required and therefore, the output terminal V

B

would simply be connected to a zero voltage reference level.

A further embodiment is the extension to a three phase application as shown in Figure 5. The three phase inverter 60 is shown in block diagram form, as is the inductive load 55. The resonant circuit 30 of the previous embodiment is provided in three equivalent circuits 70, each of which is connected to the output phases 'A "The transistors QC5-10 are in a symmetric arrangement and are shown connected by a pair of diodes 72 between the respective WO90/13177 PCr/AU90/00152 12 phase outputs, each pair having a common connection to a neutral point, N. The neutral point, N is also connected to the respective third output phase via inductors LCI-3. The function of capacitors CSI-CS4 as discussed in the single-phase embodiment is achieved by six inter-phase capacitors provided within the inverter This example allows one simultaneous state change from a present state to the diagonally opposite state. All other state combination must be as a result of switch-off of I 10 the bridge transistors in the three phase inverter 60 from the h opposite state.

Modification may be made to the examples referred to above as would be apparent to persons skilled in the electronics arts. These and other modifications may be made without departing from the ambit of the invention, the nature of which is to be determined from the foregoing description.

Ii

Claims (7)

1. An electrical circuit with switching protection comprising: a controlled circuit having an input DC voltage supply and including switching devices which can be switched by a control electrode between a current conducting on-state and a current blocking off-state, the controlled circuit being adapted to generate by the switching devices one or more voltage outputs; an electrical load having an inductive component connected to the one or each voltage output of the controlled circuit; and a switching protection circuit having inductive and capacitive elements and being controllable by switching means to be connected to the one or each voltage output of the controlled circuit, the switching protection circuit being controllable by control means so that during an off- state between sequential on-states of the switching devices the switching protection circuit is connected to the one or each voltage output to cooperate with the load and form a S" resonant circuit therewith and providing a path for charge stored in the said capacitive elements to dissipate the said stored charge so that the switching devices that are SL.: Csw to bels from the off-state to the on-state are not: subjected to large in-rush currents upon such switching and; swit n (ii) to reduce the voltage appearing across the switching devices so that the switching devices are not 30 inordinately stressed upon so switching.

2. A circuit as claimed in claim i, wherein the controlled circuit is operable by a pulse width modulation (PWM) technique. cr QI M ii LLL ,I

3. A circuit as claimed in claim 1, wherein the switching protection circuit is symmetrical and separately controllable by anti-parallel connected semiconductor devices with respect to positive and negative half-cycle waveforms forming the one or each voltage output.

4. A circuit as claimed in claim 3, wherein the switching protection circuit comprises the anti-parallel ±0 connected semiconductor devices i t I.rT..r.trr connected in series with the said inductive and capacitive elements.

A circuit as claimed in claim 4, wherein the resonant circuit further includes a blocking diode in series connection with each of the semiconductor devices.

6. A circuit as claimed in claim 2, wherein the PWM controlled circuit is a full-wave inverter.

7. An electrical circuit with switching protection comprising: a controlled circuit having an input DC voltage :i supply and including switching devices which can be 25 switched by a control electrode between a current i.i conducting on-state and a current blocking off-state, the controlled circuit being adapted to generate by the switching devices one or more voltage outputs; -an electrical load having an inductive component S 30 connected to the one or each voltage output of the controlled circuit; and a switching protection circuit having inductive and capacitive elements and being controllable by switching means to be connected to the one or each voltage output of the controlled circuit, the switching protection circuit being controllable by control means so that during an off- state between sequential on-states of the switching devices the switching protection circuit is connected to the one or each voltage output to cooperate with the load and form a resonant circuit therewith and providing a path for charge stored in the said capacitive elements to dissipate the said stored charge so that the switching devices that are to be disposed from the off-state to the on-state are not: subjected to large in-rush currents upon such switching; and (ii) to reduce the voltage appearing across the switching devices so that the switching devices are not inordinately stressed upon so switching; and subsequent to the on-state having occurred, the said inductive components and capacitive components resonantly cooperating to recharge ones of the capacitive components for a subsequent transition for the on-state to the off-state, thereby increasing the switching efficiency. Dated this 4th day of September 1992 BORAL JOHNS PERRY INDUSTRIES PTY. LTD. By Its Patent Attorneys: GRIFFITH HACK CO. Fellows Institute of Patent S"Attorneys of Australia. ooo. i 'o