AU5567499A - Packet processing architecture and methods - Google Patents

Packet processing architecture and methods

Info

Publication number
AU5567499A
AU5567499A AU55674/99A AU5567499A AU5567499A AU 5567499 A AU5567499 A AU 5567499A AU 55674/99 A AU55674/99 A AU 55674/99A AU 5567499 A AU5567499 A AU 5567499A AU 5567499 A AU5567499 A AU 5567499A
Authority
AU
Australia
Prior art keywords
methods
packet processing
processing architecture
architecture
packet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU55674/99A
Inventor
Alak K. Deb
Namakkal S. Sambamurthy
Devendra K. Tripathi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Communications Inc
Original Assignee
Vitesse Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vitesse Semiconductor Corp filed Critical Vitesse Semiconductor Corp
Publication of AU5567499A publication Critical patent/AU5567499A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H04L49/309—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651—Priority, marking, classes
AU55674/99A 1998-08-17 1999-08-16 Packet processing architecture and methods Abandoned AU5567499A (en)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US9677198P 1998-08-17 1998-08-17
US60096771 1998-08-17
US9948998P 1998-09-08 1998-09-08
US60099489 1998-09-08
US13324199P 1999-05-07 1999-05-07
US60133241 1999-05-07
US37380099A 1999-08-13 1999-08-13
US09373800 1999-08-13
PCT/US1999/018665 WO2000010297A1 (en) 1998-08-17 1999-08-16 Packet processing architecture and methods

Publications (1)

Publication Number Publication Date
AU5567499A true AU5567499A (en) 2000-03-06

Family

ID=27492871

Family Applications (1)

Application Number Title Priority Date Filing Date
AU55674/99A Abandoned AU5567499A (en) 1998-08-17 1999-08-16 Packet processing architecture and methods

Country Status (2)

Country Link
AU (1) AU5567499A (en)
WO (1) WO2000010297A1 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6810031B1 (en) 2000-02-29 2004-10-26 Celox Networks, Inc. Method and device for distributing bandwidth
US7085285B2 (en) 2000-03-01 2006-08-01 Realtek Semiconductor Corp. xDSL communications systems using shared/multi-function task blocks
US6496935B1 (en) * 2000-03-02 2002-12-17 Check Point Software Technologies Ltd System, device and method for rapid packet filtering and processing
EP1260067A1 (en) * 2000-03-03 2002-11-27 Celox Networks, Inc. Broadband mid-network server
US6654373B1 (en) * 2000-06-12 2003-11-25 Netrake Corporation Content aware network apparatus
WO2002096043A1 (en) * 2001-05-21 2002-11-28 Xelerated Ab Method and apparatus for processing blocks in a pipeline
GB2382960B (en) * 2001-12-05 2005-03-16 Ipwireless Inc Method and arrangement for data processing in a communication system
SE525183C2 (en) 2002-04-04 2004-12-21 Xelerated Ab Procedure and means for processing by pipelining of data packets
FI115940B (en) * 2002-06-10 2005-08-15 First Hop Oy Method and apparatus for implementing service quality in data transmissions
US20040210663A1 (en) * 2003-04-15 2004-10-21 Paul Phillips Object-aware transport-layer network processing engine
US7805535B2 (en) 2003-12-31 2010-09-28 Alcatel Lucent Parallel data link layer controllers in a network switching device
US7698412B2 (en) * 2003-12-31 2010-04-13 Alcatel Lucent Parallel data link layer controllers in a network switching device
US7508764B2 (en) 2005-09-12 2009-03-24 Zeugma Systems Inc. Packet flow bifurcation and analysis
DE102005046702B4 (en) 2005-09-29 2009-09-03 Infineon Technologies Ag Method and processor for classifying data packet units

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68926795T2 (en) * 1988-03-31 1997-01-09 At & T Corp Architecture and organization of a high-performance metropolitan data transmission network
CA2049428C (en) * 1990-08-20 1996-06-18 Yasuro Shobatake Atm communication system
JP3599392B2 (en) * 1994-12-15 2004-12-08 富士通株式会社 switch
EP0719065A1 (en) * 1994-12-20 1996-06-26 International Business Machines Corporation Multipurpose packet switching node for a data communication network

Also Published As

Publication number Publication date
WO2000010297A1 (en) 2000-02-24

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase