AU3879293A - A method and an arrangement for adapting the rate at which data information is read from a memory to the rate at which data information is written into the memory - Google Patents
A method and an arrangement for adapting the rate at which data information is read from a memory to the rate at which data information is written into the memoryInfo
- Publication number
- AU3879293A AU3879293A AU38792/93A AU3879293A AU3879293A AU 3879293 A AU3879293 A AU 3879293A AU 38792/93 A AU38792/93 A AU 38792/93A AU 3879293 A AU3879293 A AU 3879293A AU 3879293 A AU3879293 A AU 3879293A
- Authority
- AU
- Australia
- Prior art keywords
- memory
- rate
- data information
- adapting
- written
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
- H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
- G06F2205/061—Adapt frequency, i.e. clock frequency at one side is adapted to clock frequency, or average clock frequency, at the other side; Not pulse stuffing only
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Time-Division Multiplex Systems (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9201672 | 1992-05-27 | ||
SE9201672A SE470392B (en) | 1992-05-27 | 1992-05-27 | Method and device for writing and reading data in a memory, method and device for the transfer of data from a synchronous digital hierarchical system to a plesiochronous digital hierarchical system and method and device for adjusting the rate of reading of data from a FIFO register |
SE9202774A SE470472B (en) | 1992-09-25 | 1992-09-25 | Method and device for matching the rate at which data information is read from a memory to the rate at which data information is written into the memory |
SE9202774 | 1992-09-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU3879293A true AU3879293A (en) | 1993-12-02 |
AU664087B2 AU664087B2 (en) | 1995-11-02 |
Family
ID=26661435
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU38795/93A Ceased AU666005B2 (en) | 1992-05-27 | 1993-05-26 | A method and an arrangement relating to memory write-in and read-out |
AU38792/93A Ceased AU664087B2 (en) | 1992-05-27 | 1993-05-26 | A method and an arrangement for adapting the rate at which data information is read from a memory to the rate at which data information is written into the memory |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU38795/93A Ceased AU666005B2 (en) | 1992-05-27 | 1993-05-26 | A method and an arrangement relating to memory write-in and read-out |
Country Status (5)
Country | Link |
---|---|
EP (2) | EP0572366B1 (en) |
AU (2) | AU666005B2 (en) |
DE (2) | DE69324522T2 (en) |
ES (1) | ES2121979T3 (en) |
MX (2) | MX9303094A (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2291230B (en) * | 1992-10-15 | 1996-10-16 | Fujitsu Ltd | Fifo memory devices |
GB2297639B (en) * | 1992-10-15 | 1996-10-16 | Fujitsu Ltd | Fifo memory devices |
DE69429574T2 (en) * | 1993-11-10 | 2002-09-26 | Nortel Networks Ltd., St.Laurent | Control the flow of pointer adjustment events |
SE505380C2 (en) * | 1995-11-06 | 1997-08-18 | Ericsson Telefon Ab L M | System at a transmission buffer |
JPH09167076A (en) * | 1995-12-15 | 1997-06-24 | Fuji Photo Film Co Ltd | Method and device for output synchronization |
JPH1132042A (en) * | 1997-07-11 | 1999-02-02 | Fujitsu Ltd | Sdh communication network/existing communication network monitor synthesizing device and method therefor |
AU2002251700A1 (en) * | 2000-12-20 | 2002-07-30 | Primarion, Inc. | Pll/dll dual loop data synchronization |
DE10121198A1 (en) * | 2001-04-30 | 2002-11-07 | Infineon Technologies Ag | Method and device for adapting the data rate of a data stream |
CN111198874B (en) * | 2018-11-16 | 2023-07-04 | 中国电信股份有限公司 | Data processing method, device, system and computer readable storage medium |
US11907119B2 (en) * | 2021-07-14 | 2024-02-20 | Micron Technology, Inc. | Array access with receiver masking |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4884286A (en) * | 1985-12-12 | 1989-11-28 | Texas Instruments Inc. | Elastic buffer for local area networks |
JPH01502711A (en) * | 1987-03-17 | 1989-09-14 | カントニ・アントニオ | Jitter control in digital communication links |
US5146477A (en) * | 1987-03-17 | 1992-09-08 | Antonio Cantoni | Jitter control in digital communication links |
US4941156A (en) * | 1987-05-19 | 1990-07-10 | Crystal Semiconductor | Linear jitter attenuator |
US4764941A (en) * | 1987-05-22 | 1988-08-16 | American Telephone And Telegraph Company, At&T Bell Laboratories | Digital frame synchronizer |
US4942593A (en) * | 1989-03-16 | 1990-07-17 | Dallas Semiconductor Corporation | Telecommunications interface with improved jitter reporting |
US5119406A (en) * | 1990-05-30 | 1992-06-02 | At&T Bell Laboratories | Digital signal synchronization employing single elastic store |
US5052025A (en) * | 1990-08-24 | 1991-09-24 | At&T Bell Laboratories | Synchronous digital signal to asynchronous digital signal desynchronizer |
DE4027967A1 (en) * | 1990-09-04 | 1992-03-05 | Philips Patentverwaltung | PLUG DECISION CIRCUIT FOR A BITRATE ADJUSTMENT ARRANGEMENT |
DE4110933A1 (en) * | 1991-04-04 | 1992-10-08 | Philips Patentverwaltung | TRANSMISSION SYSTEM FOR THE SYNCHRONOUS DIGITAL HIERACHIE |
-
1993
- 1993-05-14 EP EP19930850103 patent/EP0572366B1/en not_active Expired - Lifetime
- 1993-05-14 ES ES93850103T patent/ES2121979T3/en not_active Expired - Lifetime
- 1993-05-14 EP EP19930850104 patent/EP0572367B1/en not_active Expired - Lifetime
- 1993-05-14 DE DE1993624522 patent/DE69324522T2/en not_active Expired - Fee Related
- 1993-05-14 DE DE1993620257 patent/DE69320257T2/en not_active Expired - Fee Related
- 1993-05-26 AU AU38795/93A patent/AU666005B2/en not_active Ceased
- 1993-05-26 AU AU38792/93A patent/AU664087B2/en not_active Ceased
- 1993-05-26 MX MX9303094A patent/MX9303094A/en not_active IP Right Cessation
- 1993-05-27 MX MX9303151A patent/MX9303151A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69324522D1 (en) | 1999-05-27 |
EP0572367A1 (en) | 1993-12-01 |
EP0572366A1 (en) | 1993-12-01 |
AU666005B2 (en) | 1996-01-25 |
DE69324522T2 (en) | 1999-09-16 |
AU3879593A (en) | 1993-12-02 |
MX9303094A (en) | 1994-06-30 |
DE69320257D1 (en) | 1998-09-17 |
AU664087B2 (en) | 1995-11-02 |
ES2121979T3 (en) | 1998-12-16 |
EP0572367B1 (en) | 1999-04-21 |
EP0572366B1 (en) | 1998-08-12 |
DE69320257T2 (en) | 1999-01-28 |
MX9303151A (en) | 1994-06-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |