AU3437293A - Digital signal processor architecture - Google Patents
Digital signal processor architectureInfo
- Publication number
- AU3437293A AU3437293A AU34372/93A AU3437293A AU3437293A AU 3437293 A AU3437293 A AU 3437293A AU 34372/93 A AU34372/93 A AU 34372/93A AU 3437293 A AU3437293 A AU 3437293A AU 3437293 A AU3437293 A AU 3437293A
- Authority
- AU
- Australia
- Prior art keywords
- digital signal
- signal processor
- processor architecture
- architecture
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Databases & Information Systems (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US1993/000119 WO1994016383A1 (en) | 1993-01-06 | 1993-01-06 | Digital signal processor architecture |
Publications (1)
Publication Number | Publication Date |
---|---|
AU3437293A true AU3437293A (en) | 1994-08-15 |
Family
ID=22236208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU34372/93A Abandoned AU3437293A (en) | 1993-01-06 | 1993-01-06 | Digital signal processor architecture |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU3437293A (en) |
WO (1) | WO1994016383A1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5822609A (en) * | 1995-06-22 | 1998-10-13 | International Business Machines Corporation | Processing circuit for performing a convolution computation |
AU5686599A (en) * | 1998-08-21 | 2000-03-14 | California Institute Of Technology | Processing element with special application for branch functions |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3713108A (en) * | 1971-03-25 | 1973-01-23 | Ibm | Branch control for a digital machine |
US4210960A (en) * | 1977-09-02 | 1980-07-01 | Sperry Corporation | Digital computer with overlapped operation utilizing conditional control to minimize time losses |
GB1543515A (en) * | 1978-01-16 | 1979-04-04 | Sojuz Kt Bjuro P Schetnykh Mas | Statistical data processing digital computer |
US4338661A (en) * | 1979-05-21 | 1982-07-06 | Motorola, Inc. | Conditional branch unit for microprogrammed data processor |
US4428022A (en) * | 1980-04-15 | 1984-01-24 | Westinghouse Electric Corp. | Circuit interrupter with digital trip unit and automatic reset |
GB2075729B (en) * | 1980-05-12 | 1984-08-08 | Suwa Seikosha Kk | Microprogramm control circuit |
US4393443A (en) * | 1980-05-20 | 1983-07-12 | Tektronix, Inc. | Memory mapping system |
US4400794A (en) * | 1981-11-17 | 1983-08-23 | Burroughs Corporation | Memory mapping unit |
JPS6043751A (en) * | 1983-08-18 | 1985-03-08 | Hitachi Ltd | Information processor |
US4785393A (en) * | 1984-07-09 | 1988-11-15 | Advanced Micro Devices, Inc. | 32-Bit extended function arithmetic-logic unit on a single chip |
CA1250667A (en) * | 1985-04-15 | 1989-02-28 | Larry D. Larsen | Branch control in a three phase pipelined signal processor |
GB2177241B (en) * | 1985-07-05 | 1989-07-19 | Motorola Inc | Watchdog timer |
DE3650740D1 (en) * | 1985-11-08 | 2000-04-06 | Nec Corp | Micro program control unit |
US4835738A (en) * | 1986-03-31 | 1989-05-30 | Texas Instruments Incorporated | Register stack for a bit slice processor microsequencer |
US5091846A (en) * | 1986-10-03 | 1992-02-25 | Intergraph Corporation | Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency |
US4891787A (en) * | 1986-12-17 | 1990-01-02 | Massachusetts Institute Of Technology | Parallel processing system with processor array having SIMD/MIMD instruction processing |
US4774652A (en) * | 1987-02-18 | 1988-09-27 | Apple Computer, Inc. | Memory mapping unit for decoding address signals |
US4922413A (en) * | 1987-03-24 | 1990-05-01 | Center For Innovative Technology | Method for concurrent execution of primitive operations by dynamically assigning operations based upon computational marked graph and availability of data |
US5136717A (en) * | 1988-11-23 | 1992-08-04 | Flavors Technology Inc. | Realtime systolic, multiple-instruction, single-data parallel computer system |
US5157777A (en) * | 1989-12-22 | 1992-10-20 | Intel Corporation | Synchronous communication between execution environments in a data processing system employing an object-oriented memory protection mechanism |
-
1993
- 1993-01-06 WO PCT/US1993/000119 patent/WO1994016383A1/en active Application Filing
- 1993-01-06 AU AU34372/93A patent/AU3437293A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO1994016383A1 (en) | 1994-07-21 |
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