AU2437297A - Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane - Google Patents

Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane

Info

Publication number
AU2437297A
AU2437297A AU24372/97A AU2437297A AU2437297A AU 2437297 A AU2437297 A AU 2437297A AU 24372/97 A AU24372/97 A AU 24372/97A AU 2437297 A AU2437297 A AU 2437297A AU 2437297 A AU2437297 A AU 2437297A
Authority
AU
Australia
Prior art keywords
lamination
fabricating
interconnect structure
porous dielectric
dielectric membrane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU24372/97A
Inventor
David B. Noddin
C. Thomas Rosenmayer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WL Gore and Associates Inc
Original Assignee
WL Gore and Associates Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WL Gore and Associates Inc filed Critical WL Gore and Associates Inc
Publication of AU2437297A publication Critical patent/AU2437297A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H01L21/0212Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laminated Bodies (AREA)
AU24372/97A 1996-04-12 1997-04-02 Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane Abandoned AU2437297A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US63139196A 1996-04-12 1996-04-12
US08631391 1996-04-12
PCT/US1997/005555 WO1997039484A1 (en) 1996-04-12 1997-04-02 Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane

Publications (1)

Publication Number Publication Date
AU2437297A true AU2437297A (en) 1997-11-07

Family

ID=24530995

Family Applications (1)

Application Number Title Priority Date Filing Date
AU24372/97A Abandoned AU2437297A (en) 1996-04-12 1997-04-02 Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane

Country Status (2)

Country Link
AU (1) AU2437297A (en)
WO (1) WO1997039484A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE513300C2 (en) * 1997-10-07 2000-08-21 Abb Ab Gas or air insulated electric device including a low dielectric constant carrier for a conductor
JP2002064137A (en) * 2000-08-15 2002-02-28 Tokyo Electron Ltd Semiconductor device and method of manufacturing the same
DE10142223C2 (en) 2001-08-29 2003-10-16 Infineon Technologies Ag Method for producing cavities with submicron dimensions in a semiconductor device by means of polymerization
DE10142201C2 (en) * 2001-08-29 2003-10-16 Infineon Technologies Ag Method for creating cavities with submicron structures in a semiconductor device using a freezing process liquid
DE10142224C2 (en) * 2001-08-29 2003-11-06 Infineon Technologies Ag Method for creating cavities with submicron dimensions in a semiconductor device by means of a swelling process
CN102260378B (en) 2011-05-06 2013-03-20 广东生益科技股份有限公司 Composite material, high-frequency circuit board manufactured therefrom and manufacturing method of high-frequency circuit board
DE112016005452B4 (en) 2015-11-30 2022-05-05 W.L. Gore & Associates, Inc. Environmental protection barrier for a chip

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5034801A (en) * 1989-07-31 1991-07-23 W. L. Gore & Associates, Inc. Intergrated circuit element having a planar, solvent-free dielectric layer
US5461003A (en) * 1994-05-27 1995-10-24 Texas Instruments Incorporated Multilevel interconnect structure with air gaps formed between metal leads

Also Published As

Publication number Publication date
WO1997039484A1 (en) 1997-10-23

Similar Documents

Publication Publication Date Title
AU6365498A (en) Method of producing hydrogen using solid electrolyte membrane
AU7280098A (en) Methods of fabricating electrochemical cells
AU7587100A (en) Method of making multi-layer electrochemical cell devices
AU3828695A (en) Electrical connector assembly with interleaved multilayer structure fabrication method
AU4706497A (en) Method of manufacturing a photovoltaic foil
AU3915897A (en) Encapsulated micro-relay modules and methods of fabricating same
AU4550397A (en) Method of manufacturing a sandwich board and a board and structure manufactured by the method
AU4964397A (en) Method of manufacturing thermionic element
AU2341000A (en) Nanoparticle-based electrical, chemical, and mechanical structures and methods of making same
EP0758145A3 (en) Method of manufacturing circuit module
AU3212695A (en) Improved method for fabricating a hearing aid housing
AU4055097A (en) Improved structure for laminated superconducting ceramic composite conductors and method of manufacture
AU2150299A (en) An electrical connecting element and a method of making such an element
AU1454400A (en) Multilayer conductive polymer device and method of manufacturing same
AU2437297A (en) Method of fabricating an interconnect structure comprising lamination of a porous dielectric membrane
AU4909696A (en) Stacked laminate mold and method of making
AU4312597A (en) Method of producing a hollow structure
AU1362597A (en) Membrane microfilter manufacturing process
AU6000598A (en) Fabrication method and apparatus for fabricating an object as a plurality of successive laminae
AU6686996A (en) Extrudable microporous insulation
AU5505898A (en) A combined electrical and optical edge contact for compact connection of a part to another part, a use thereof and method of manufacturing such an interconnection
AU3742997A (en) Method of making a laminate comprising a conductive polymer composition
AU4674597A (en) Method of fabricating a cushion assembly
AU5188396A (en) Method for making improved lsco stack electrode
AU5517000A (en) Heterogeneous ion exchange membrane and method of manufacturing thereof