AU2072697A - Method for fabricating mesa interconnect structures - Google Patents

Method for fabricating mesa interconnect structures

Info

Publication number
AU2072697A
AU2072697A AU20726/97A AU2072697A AU2072697A AU 2072697 A AU2072697 A AU 2072697A AU 20726/97 A AU20726/97 A AU 20726/97A AU 2072697 A AU2072697 A AU 2072697A AU 2072697 A AU2072697 A AU 2072697A
Authority
AU
Australia
Prior art keywords
interconnect structures
mesa
fabricating
fabricating mesa
interconnect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU20726/97A
Inventor
L. Richard Carley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Carnegie Wave Energy Ltd
Original Assignee
Carnegie Mellon University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Carnegie Mellon University filed Critical Carnegie Mellon University
Publication of AU2072697A publication Critical patent/AU2072697A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
AU20726/97A 1996-03-05 1997-03-05 Method for fabricating mesa interconnect structures Abandoned AU2072697A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US1281996P 1996-03-05 1996-03-05
US60012819 1996-03-05
PCT/US1997/003600 WO1997033314A1 (en) 1996-03-05 1997-03-05 Method for fabricating mesa interconnect structures

Publications (1)

Publication Number Publication Date
AU2072697A true AU2072697A (en) 1997-09-22

Family

ID=21756853

Family Applications (1)

Application Number Title Priority Date Filing Date
AU20726/97A Abandoned AU2072697A (en) 1996-03-05 1997-03-05 Method for fabricating mesa interconnect structures

Country Status (2)

Country Link
AU (1) AU2072697A (en)
WO (1) WO1997033314A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0907272A1 (en) 1997-09-25 1999-04-07 Alcatel System with self-triggering mechanism for exchanging data between a terminal and access means via a telephone network
CN100456470C (en) * 2003-07-02 2009-01-28 阿纳洛格装置公司 Semi-fusible link system for a multi-layer integrated circuit and method of making same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0393635B1 (en) * 1989-04-21 1997-09-03 Nec Corporation Semiconductor device having multi-level wirings
GB2247986A (en) * 1990-09-12 1992-03-18 Marconi Gec Ltd Reducing interconnection capacitance in integrated circuits
JPH05234959A (en) * 1991-08-16 1993-09-10 Hitachi Ltd Method and system for performing dry etching

Also Published As

Publication number Publication date
WO1997033314A1 (en) 1997-09-12

Similar Documents

Publication Publication Date Title
AU7101698A (en) Methods for fabricating enclosed microchannel structures
AU2262999A (en) Method for producing porous structures
AU6137798A (en) Method and apparatus for manufacturing composite structures
AU1327201A (en) An optoelectronic assembly and method for fabricating the same
AU4843397A (en) Method for producing photovoltaic element
AU5751298A (en) Method for producing arylcyanates
AU3876399A (en) Waders and the method for manufacturing them
AU2628099A (en) Handover method
AU4692196A (en) Method for manufacturing composite pads
AU3600999A (en) Spar construction method
AU4335197A (en) Technique for manufacturing hose
AU3565495A (en) Method for manufacturing metallic structures
AU3704297A (en) Method
AU4872397A (en) Method for making elongated structures and elongated structures obtained by said method
AU7552398A (en) Exposure system, process for manufacturing the exposure system, and process for fabricating devices
AU2790597A (en) Frame structure and method for forming the same
AU2072697A (en) Method for fabricating mesa interconnect structures
AU7063298A (en) Etching method
AUPO870297A0 (en) Method
AUPO937097A0 (en) Method
AU6670796A (en) Method for manufacturing fishtraps
AU1966799A (en) Method for producing chlorobenzoxazolene
AU8212898A (en) Method for producing 2-cyclododecyl-1-propanol
AU6532496A (en) Method for manufacturing members for an aircleaner
AU8437998A (en) Method for producing 4,4' dihalogendiphenylsulfone