AU2003241408A1 - A surface geometry for mos-gated device - Google Patents

A surface geometry for mos-gated device

Info

Publication number
AU2003241408A1
AU2003241408A1 AU2003241408A AU2003241408A AU2003241408A1 AU 2003241408 A1 AU2003241408 A1 AU 2003241408A1 AU 2003241408 A AU2003241408 A AU 2003241408A AU 2003241408 A AU2003241408 A AU 2003241408A AU 2003241408 A1 AU2003241408 A1 AU 2003241408A1
Authority
AU
Australia
Prior art keywords
mos
surface geometry
gated device
gated
geometry
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003241408A
Inventor
Richard A. Blanchard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Semiconductor Inc
Original Assignee
General Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/142,600 external-priority patent/US6710414B2/en
Priority claimed from US10/142,622 external-priority patent/US6861337B2/en
Application filed by General Semiconductor Inc filed Critical General Semiconductor Inc
Publication of AU2003241408A1 publication Critical patent/AU2003241408A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
AU2003241408A 2002-05-10 2003-05-09 A surface geometry for mos-gated device Abandoned AU2003241408A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/142,600 US6710414B2 (en) 2002-05-10 2002-05-10 Surface geometry for a MOS-gated device that allows the manufacture of dice having different sizes
US10/142,600 2002-05-10
US10/142,622 2002-05-10
US10/142,622 US6861337B2 (en) 2002-05-10 2002-05-10 Method for using a surface geometry for a MOS-gated device in the manufacture of dice having different sizes
PCT/US2003/014626 WO2003096406A1 (en) 2002-05-10 2003-05-09 A surface geometry for mos-gated device

Publications (1)

Publication Number Publication Date
AU2003241408A1 true AU2003241408A1 (en) 2003-11-11

Family

ID=29423049

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003241408A Abandoned AU2003241408A1 (en) 2002-05-10 2003-05-09 A surface geometry for mos-gated device

Country Status (6)

Country Link
EP (1) EP1504467A1 (en)
JP (1) JP4938236B2 (en)
CN (2) CN101697349A (en)
AU (1) AU2003241408A1 (en)
TW (1) TWI268549B (en)
WO (1) WO2003096406A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004048278B3 (en) * 2004-10-05 2006-06-01 X-Fab Semiconductor Foundries Ag Simulation and / or layout method for power transistors designed for different powers
CN102105986B (en) * 2008-07-28 2013-05-01 Nxp股份有限公司 Integrated circuit and method for manufacturing an integrated circuit
JP5742627B2 (en) 2011-09-26 2015-07-01 住友電気工業株式会社 Semiconductor device and manufacturing method of semiconductor device
JP5630552B2 (en) * 2013-10-15 2014-11-26 富士電機株式会社 Silicon carbide semiconductor device and manufacturing method thereof
JP6598037B2 (en) * 2015-07-01 2019-10-30 パナソニックIpマネジメント株式会社 Semiconductor device
US11031343B2 (en) 2019-06-21 2021-06-08 International Business Machines Corporation Fins for enhanced die communication
EP3863065A1 (en) 2020-02-04 2021-08-11 Infineon Technologies Austria AG Semiconductor die and method of manufacturing the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5016080A (en) * 1988-10-07 1991-05-14 Exar Corporation Programmable die size continuous array
US5499124A (en) * 1990-12-31 1996-03-12 Vu; Duy-Phach Polysilicon transistors formed on an insulation layer which is adjacent to a liquid crystal material
GB9106720D0 (en) * 1991-03-28 1991-05-15 Secr Defence Large area liquid crystal displays
CA2222031C (en) * 1996-03-25 2002-01-29 Rainbow Displays, Inc. Tiled, flat-panel displays with color-correction capability
JP3276325B2 (en) * 1996-11-28 2002-04-22 松下電器産業株式会社 Semiconductor device
JP2001352063A (en) * 2000-06-09 2001-12-21 Sanyo Electric Co Ltd Insulation gate type semiconductor device
JP3597762B2 (en) * 2000-07-24 2004-12-08 株式会社日立製作所 Semiconductor integrated circuit and method of manufacturing the same

Also Published As

Publication number Publication date
TWI268549B (en) 2006-12-11
JP2005525701A (en) 2005-08-25
WO2003096406A1 (en) 2003-11-20
CN101697349A (en) 2010-04-21
CN1653602A (en) 2005-08-10
EP1504467A1 (en) 2005-02-09
JP4938236B2 (en) 2012-05-23
TW200403730A (en) 2004-03-01
CN100530568C (en) 2009-08-19

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase
TH Corrigenda

Free format text: IN VOL 18, NO 2, PAGE(S) 516 UNDER THE HEADING APPLICATIONS OPI - NAME INDEX UNDER THE NAME GENERALSEMICONDUCTOR, INC., APPLICATION NO. 2003241408, UNDER INID (43) CORRECT THE PUBLICATION DATE TO READ 24.11.2003