AU2001265910A1 - Data processing system and method - Google Patents

Data processing system and method

Info

Publication number
AU2001265910A1
AU2001265910A1 AU2001265910A AU6591001A AU2001265910A1 AU 2001265910 A1 AU2001265910 A1 AU 2001265910A1 AU 2001265910 A AU2001265910 A AU 2001265910A AU 6591001 A AU6591001 A AU 6591001A AU 2001265910 A1 AU2001265910 A1 AU 2001265910A1
Authority
AU
Australia
Prior art keywords
data processing
processing system
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001265910A
Inventor
Per Anders Holmberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of AU2001265910A1 publication Critical patent/AU2001265910A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6028—Prefetching based on hints or prefetch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AU2001265910A 2000-04-28 2001-04-27 Data processing system and method Abandoned AU2001265910A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP00109045 2000-04-28
EP00109045A EP1150213B1 (en) 2000-04-28 2000-04-28 Data processing system and method
PCT/EP2001/004826 WO2001084322A1 (en) 2000-04-28 2001-04-27 Data processing system and method

Publications (1)

Publication Number Publication Date
AU2001265910A1 true AU2001265910A1 (en) 2001-11-12

Family

ID=8168571

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001265910A Abandoned AU2001265910A1 (en) 2000-04-28 2001-04-27 Data processing system and method

Country Status (4)

Country Link
US (1) US6539458B2 (en)
EP (1) EP1150213B1 (en)
AU (1) AU2001265910A1 (en)
WO (1) WO2001084322A1 (en)

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Also Published As

Publication number Publication date
EP1150213A1 (en) 2001-10-31
EP1150213B1 (en) 2012-01-25
WO2001084322A1 (en) 2001-11-08
US20020138700A1 (en) 2002-09-26
US6539458B2 (en) 2003-03-25

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