AU2001249992A1 - Implementation of quantization for simd architecture - Google Patents

Implementation of quantization for simd architecture

Info

Publication number
AU2001249992A1
AU2001249992A1 AU2001249992A AU4999201A AU2001249992A1 AU 2001249992 A1 AU2001249992 A1 AU 2001249992A1 AU 2001249992 A AU2001249992 A AU 2001249992A AU 4999201 A AU4999201 A AU 4999201A AU 2001249992 A1 AU2001249992 A1 AU 2001249992A1
Authority
AU
Australia
Prior art keywords
quantization
implementation
simd architecture
simd
architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001249992A
Inventor
Chung-Tao Chu
Wei Ding
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INTERVIDEO Inc
Original Assignee
INTERVIDEO Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INTERVIDEO Inc filed Critical INTERVIDEO Inc
Publication of AU2001249992A1 publication Critical patent/AU2001249992A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124—Quantisation
    • H04N19/126—Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
AU2001249992A 2000-02-22 2001-02-20 Implementation of quantization for simd architecture Abandoned AU2001249992A1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
USNOTGIVEN 1994-02-28
US18406600P 2000-02-22 2000-02-22
US60184066 2000-02-22
PCT/US2001/040150 WO2001063923A1 (en) 2000-02-22 2001-02-20 Implementation of quantization for simd architecture

Publications (1)

Publication Number Publication Date
AU2001249992A1 true AU2001249992A1 (en) 2001-09-03

Family

ID=22675423

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001249992A Abandoned AU2001249992A1 (en) 2000-02-22 2001-02-20 Implementation of quantization for simd architecture

Country Status (3)

Country Link
AU (1) AU2001249992A1 (en)
TW (1) TW516320B (en)
WO (1) WO2001063923A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9047094B2 (en) * 2004-03-31 2015-06-02 Icera Inc. Apparatus and method for separate asymmetric control processing and data path processing in a dual path processor
US8484441B2 (en) 2004-03-31 2013-07-09 Icera Inc. Apparatus and method for separate asymmetric control processing and data path processing in a configurable dual path processor that supports instructions having different bit widths
US7949856B2 (en) 2004-03-31 2011-05-24 Icera Inc. Method and apparatus for separate control processing and data path processing in a dual path processor with a shared load/store unit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353026A (en) * 1992-12-15 1994-10-04 Analog Devices, Inc. Fir filter with quantized coefficients and coefficient quantization method
FR2746564B1 (en) * 1996-03-22 1998-06-05 Matra Communication METHOD FOR CORRECTING NON-LINEARITIES OF AN AMPLIFIER, AND RADIO TRANSMITTER IMPLEMENTING SUCH A METHOD

Also Published As

Publication number Publication date
TW516320B (en) 2003-01-01
WO2001063923A1 (en) 2001-08-30

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