AU2001247324A1 - Vliw computer processing architecture with on-chip dynamic ram - Google Patents

Vliw computer processing architecture with on-chip dynamic ram

Info

Publication number
AU2001247324A1
AU2001247324A1 AU2001247324A AU4732401A AU2001247324A1 AU 2001247324 A1 AU2001247324 A1 AU 2001247324A1 AU 2001247324 A AU2001247324 A AU 2001247324A AU 4732401 A AU4732401 A AU 4732401A AU 2001247324 A1 AU2001247324 A1 AU 2001247324A1
Authority
AU
Australia
Prior art keywords
dynamic ram
computer processing
processing architecture
chip dynamic
vliw computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001247324A
Inventor
Nyles Nettleton
Michael Parkin
Ashley Saulsbury
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2001247324A1 publication Critical patent/AU2001247324A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/7857Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using interleaved memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
AU2001247324A 2000-03-08 2001-03-08 Vliw computer processing architecture with on-chip dynamic ram Abandoned AU2001247324A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US18779600P 2000-03-08 2000-03-08
US60187796 2000-03-08
PCT/US2001/007445 WO2001067273A2 (en) 2000-03-08 2001-03-08 Vliw computer processing architecture with on-chip dynamic ram

Publications (1)

Publication Number Publication Date
AU2001247324A1 true AU2001247324A1 (en) 2001-09-17

Family

ID=22690503

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001247324A Abandoned AU2001247324A1 (en) 2000-03-08 2001-03-08 Vliw computer processing architecture with on-chip dynamic ram

Country Status (7)

Country Link
US (1) US6631439B2 (en)
EP (1) EP1261921A2 (en)
JP (1) JP2003526157A (en)
KR (1) KR20020091116A (en)
AU (1) AU2001247324A1 (en)
HK (1) HK1048537A1 (en)
WO (1) WO2001067273A2 (en)

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US7224595B2 (en) * 2004-07-30 2007-05-29 International Business Machines Corporation 276-Pin buffered memory module with enhanced fault tolerance
US7890735B2 (en) * 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
US7356737B2 (en) 2004-10-29 2008-04-08 International Business Machines Corporation System, method and storage medium for testing a memory module
US7277988B2 (en) * 2004-10-29 2007-10-02 International Business Machines Corporation System, method and storage medium for providing data caching and data compression in a memory subsystem
US7299313B2 (en) 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7512762B2 (en) 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7305574B2 (en) * 2004-10-29 2007-12-04 International Business Machines Corporation System, method and storage medium for bus calibration in a memory subsystem
US7395476B2 (en) 2004-10-29 2008-07-01 International Business Machines Corporation System, method and storage medium for providing a high speed test interface to a memory subsystem
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
GB2420884B (en) * 2004-12-03 2009-04-15 Picochip Designs Ltd Processor architecture
US7937709B2 (en) * 2004-12-29 2011-05-03 Intel Corporation Synchronizing multiple threads efficiently
US7478259B2 (en) 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7870459B2 (en) 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7477522B2 (en) * 2006-10-23 2009-01-13 International Business Machines Corporation High density high reliability memory module with a fault tolerant address and command bus
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
GB2454865B (en) 2007-11-05 2012-06-13 Picochip Designs Ltd Power control
JP5326314B2 (en) * 2008-03-21 2013-10-30 富士通株式会社 Processor and information processing device
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2474071B (en) 2009-10-05 2013-08-07 Picochip Designs Ltd Femtocell base station
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2491098B (en) 2011-05-16 2015-05-20 Intel Corp Accessing a base station
CN102594831A (en) * 2012-03-06 2012-07-18 河海大学 3S space data processing system
CN102624889A (en) * 2012-03-06 2012-08-01 河海大学 Mass data concurrency processing method based on receiving and processing separation
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Also Published As

Publication number Publication date
JP2003526157A (en) 2003-09-02
WO2001067273A3 (en) 2002-02-28
WO2001067273A2 (en) 2001-09-13
EP1261921A2 (en) 2002-12-04
KR20020091116A (en) 2002-12-05
US20020032831A1 (en) 2002-03-14
US6631439B2 (en) 2003-10-07
HK1048537A1 (en) 2003-04-04

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