ATE373922T1 - Integrierter schaltkreis und verfahren zum erstellen von transaktionen - Google Patents
Integrierter schaltkreis und verfahren zum erstellen von transaktionenInfo
- Publication number
- ATE373922T1 ATE373922T1 AT03740945T AT03740945T ATE373922T1 AT E373922 T1 ATE373922 T1 AT E373922T1 AT 03740945 T AT03740945 T AT 03740945T AT 03740945 T AT03740945 T AT 03740945T AT E373922 T1 ATE373922 T1 AT E373922T1
- Authority
- AT
- Austria
- Prior art keywords
- module
- address
- integrated circuit
- addressed
- slave
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9063—Intermediate storage in different physical parts of a node or terminal
- H04L49/9068—Intermediate storage in different physical parts of a node or terminal in the network interface card
- H04L49/9073—Early interruption upon arrival of a fraction of a packet
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
- Multi Processors (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Bus Control (AREA)
- Semiconductor Integrated Circuits (AREA)
- Microcomputers (AREA)
- Computer And Data Communications (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02079196 | 2002-10-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE373922T1 true ATE373922T1 (de) | 2007-10-15 |
Family
ID=32088020
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT03740945T ATE373922T1 (de) | 2002-10-08 | 2003-07-04 | Integrierter schaltkreis und verfahren zum erstellen von transaktionen |
AT03748424T ATE374399T1 (de) | 2002-10-08 | 2003-10-07 | Integrierter schaltkreis und verfahren zum erstellen von transaktionen |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT03748424T ATE374399T1 (de) | 2002-10-08 | 2003-10-07 | Integrierter schaltkreis und verfahren zum erstellen von transaktionen |
Country Status (10)
Country | Link |
---|---|
US (3) | US7769893B2 (de) |
EP (3) | EP1552669B1 (de) |
JP (3) | JP4560409B2 (de) |
KR (1) | KR101016987B1 (de) |
CN (5) | CN100342370C (de) |
AT (2) | ATE373922T1 (de) |
AU (3) | AU2003299282A1 (de) |
DE (2) | DE60316458T2 (de) |
TW (1) | TWI307840B (de) |
WO (3) | WO2004034173A2 (de) |
Families Citing this family (80)
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CN1829982A (zh) * | 2003-07-30 | 2006-09-06 | 皇家飞利浦电子股份有限公司 | 具有动态通信服务选择的集成电路 |
EP1726132A2 (de) * | 2004-03-03 | 2006-11-29 | Koninklijke Philips Electronics N.V. | Datenverarbeitungsschaltung, wobei datenverarbeitungseinheiten über ein netzwerk kommunizieren |
KR20070010152A (ko) * | 2004-04-26 | 2007-01-22 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 트랜잭션을 발행하기 위한 집적 회로 및 방법 |
DE602005007014D1 (de) | 2004-05-18 | 2008-07-03 | Koninkl Philips Electronics Nv | Integrierte schaltung und verfahren zur pufferung zur optimierung der burst-länge in netzwerken auf chips |
EP1605727A1 (de) * | 2004-06-09 | 2005-12-14 | Koninklijke Philips Electronics N.V. | Integrierte Schaltungsanordnung und Verfahren zur Zuordnung von Zeitlagen |
FR2875982B1 (fr) * | 2004-09-28 | 2006-12-22 | Commissariat Energie Atomique | Architecture de communication semi-automatique noc pour applications "flots de donnees" |
US7596653B2 (en) * | 2004-11-08 | 2009-09-29 | Intel Corporation | Technique for broadcasting messages on a point-to-point interconnect |
US20080123666A1 (en) * | 2004-11-09 | 2008-05-29 | Nxp B.V. | Electronic Device And Method Of Communication Resource Allocation |
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2003
- 2003-07-04 WO PCT/IB2003/003035 patent/WO2004034173A2/en active Application Filing
- 2003-07-04 CN CNB038239132A patent/CN100342370C/zh not_active Expired - Lifetime
- 2003-07-04 CN CN038239159A patent/CN1689312B/zh not_active Expired - Lifetime
- 2003-07-04 EP EP03740945A patent/EP1552669B1/de not_active Expired - Lifetime
- 2003-07-04 AU AU2003299282A patent/AU2003299282A1/en not_active Abandoned
- 2003-07-04 AU AU2003299454A patent/AU2003299454A1/en not_active Abandoned
- 2003-07-04 KR KR1020057005986A patent/KR101016987B1/ko active IP Right Grant
- 2003-07-04 JP JP2004542689A patent/JP4560409B2/ja not_active Expired - Lifetime
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