ATE341857T1 - Bitdetektionsanordnung und vorrichtung zur wiedergabe von informationen - Google Patents

Bitdetektionsanordnung und vorrichtung zur wiedergabe von informationen

Info

Publication number
ATE341857T1
ATE341857T1 AT04734719T AT04734719T ATE341857T1 AT E341857 T1 ATE341857 T1 AT E341857T1 AT 04734719 T AT04734719 T AT 04734719T AT 04734719 T AT04734719 T AT 04734719T AT E341857 T1 ATE341857 T1 AT E341857T1
Authority
AT
Austria
Prior art keywords
sub
signal
phase
sample
phase difference
Prior art date
Application number
AT04734719T
Other languages
English (en)
Inventor
Albertus J A Rutten
Beurden Nicolaas J H M Van
Josephus A H M Kahlman
Albert H J Immink
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE341857T1 publication Critical patent/ATE341857T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10037—A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0994—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
  • Television Signal Processing For Recording (AREA)
  • Analogue/Digital Conversion (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT04734719T 2003-06-04 2004-05-25 Bitdetektionsanordnung und vorrichtung zur wiedergabe von informationen ATE341857T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03101620 2003-06-04

Publications (1)

Publication Number Publication Date
ATE341857T1 true ATE341857T1 (de) 2006-10-15

Family

ID=33495617

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04734719T ATE341857T1 (de) 2003-06-04 2004-05-25 Bitdetektionsanordnung und vorrichtung zur wiedergabe von informationen

Country Status (8)

Country Link
US (1) US7248194B2 (de)
EP (1) EP1634374B1 (de)
JP (1) JP2006526924A (de)
KR (1) KR20060015632A (de)
CN (1) CN1799198A (de)
AT (1) ATE341857T1 (de)
DE (1) DE602004002698T2 (de)
WO (1) WO2004109927A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4150049B2 (ja) * 2006-08-03 2008-09-17 株式会社東芝 集積回路、その自己診断方法、およびその集積回路を具備する光ディスク装置
TWI339499B (en) 2007-02-06 2011-03-21 Realtek Semiconductor Corp Configured circuit and method thereof
CN101246385B (zh) * 2007-02-12 2011-01-26 瑞昱半导体股份有限公司 组态设定电路及其方法
US8027114B1 (en) * 2008-06-02 2011-09-27 Marvell International Ltd. Spiral servo detection with phase-locked loop (PLL)
JP5684076B2 (ja) * 2011-09-06 2015-03-11 株式会社日立製作所 アナログデジタル変換器及び無線受信機
CN105684314B (zh) * 2013-07-01 2018-10-19 Ess技术有限公司 使用fir滤波器对固定模式抖动的抑制
US10098845B2 (en) * 2013-10-07 2018-10-16 Impax Laboratories, Llc Muco-adhesive, controlled release formulations of levodopa and/or esters of levodopa and uses thereof
CN105788027B (zh) * 2016-03-17 2019-12-17 中车株洲电力机车有限公司 一种事件记录装置及其记录方法
CN109213703B (zh) * 2017-06-30 2021-12-14 华为技术有限公司 一种数据检测方法及数据检测装置
CN111930271B (zh) * 2020-09-27 2021-01-22 深圳市汇顶科技股份有限公司 触控芯片、触控检测信号的处理方法和电子设备

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912729A (en) * 1988-05-16 1990-03-27 U.S. Philips Corporation Phase-locked-loop circuit and bit detection arrangement comprising such a phase-locked-loop circuit
JPH02166919A (ja) * 1988-12-21 1990-06-27 Hitachi Ltd ディジタルｐｌｌ方式
JPH0380644A (ja) * 1989-08-23 1991-04-05 Anritsu Corp デジタル位相同期回路
JP3040319B2 (ja) * 1994-10-14 2000-05-15 忠光 入谷 周波数シンセサイザ
JPH08167841A (ja) * 1994-12-13 1996-06-25 Pioneer Electron Corp ディジタルｐｌｌ回路
KR0186138B1 (ko) * 1995-12-23 1999-04-15 구자홍 디지탈 디스크의 데이타 재생장치
JP3707711B2 (ja) * 1997-05-20 2005-10-19 松下電器産業株式会社 再生クロック抽出装置
JP3109465B2 (ja) * 1997-12-04 2000-11-13 日本電気株式会社 ディジタルｐｌｌ回路及び信号再生方法
WO1999033179A2 (en) * 1997-12-22 1999-07-01 Koninklijke Philips Electronics N.V. Time-discrete phase-locked loop
JP4277938B2 (ja) * 1997-12-22 2009-06-10 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 出力タイムベースコレクタ
JP2001230765A (ja) * 2000-02-17 2001-08-24 Fujikura Ltd クロック信号抽出回路
JP4526194B2 (ja) * 2001-01-11 2010-08-18 ルネサスエレクトロニクス株式会社 オーバーサンプリングクロックリカバリ方法及び回路
KR100899180B1 (ko) * 2001-11-30 2009-05-27 코닌클리케 필립스 일렉트로닉스 엔.브이. 비트 검출장치 및 정보 재생장치
CN1235217C (zh) * 2001-12-26 2006-01-04 日本胜利株式会社 重放装置
JP3804650B2 (ja) * 2003-10-02 2006-08-02 日本電気株式会社 デジタルｐｌｌ回路およびこれを用いた情報記録装置

Also Published As

Publication number Publication date
JP2006526924A (ja) 2006-11-24
KR20060015632A (ko) 2006-02-17
DE602004002698T2 (de) 2007-08-30
DE602004002698D1 (de) 2006-11-16
US20070008204A1 (en) 2007-01-11
US7248194B2 (en) 2007-07-24
EP1634374A1 (de) 2006-03-15
WO2004109927A1 (en) 2004-12-16
CN1799198A (zh) 2006-07-05
EP1634374B1 (de) 2006-10-04

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