ATE236436T1 - Verfahren zur herstellung einer tragbaren elektronischen anordnung mit einer integrierten schaltung mit kostengünstigem dielektricum - Google Patents
Verfahren zur herstellung einer tragbaren elektronischen anordnung mit einer integrierten schaltung mit kostengünstigem dielektricumInfo
- Publication number
- ATE236436T1 ATE236436T1 AT00925432T AT00925432T ATE236436T1 AT E236436 T1 ATE236436 T1 AT E236436T1 AT 00925432 T AT00925432 T AT 00925432T AT 00925432 T AT00925432 T AT 00925432T AT E236436 T1 ATE236436 T1 AT E236436T1
- Authority
- AT
- Austria
- Prior art keywords
- integrated circuit
- electronic device
- grid
- dilectric
- producing
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Electric Clocks (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Details Of Aerials (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9906585A FR2794266B1 (fr) | 1999-05-25 | 1999-05-25 | Procede de fabrication de dispositif electronique portable a circuit integre comportant un dielectrique bas cout |
PCT/FR2000/001268 WO2000072254A1 (fr) | 1999-05-25 | 2000-05-11 | Procede de fabrication de dispositif electronique portable a circuit integre comportant un dielectrique bas cout |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE236436T1 true ATE236436T1 (de) | 2003-04-15 |
Family
ID=9545963
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT00925432T ATE236436T1 (de) | 1999-05-25 | 2000-05-11 | Verfahren zur herstellung einer tragbaren elektronischen anordnung mit einer integrierten schaltung mit kostengünstigem dielektricum |
Country Status (8)
Country | Link |
---|---|
US (1) | US6521985B1 (de) |
EP (1) | EP1190377B1 (de) |
CN (1) | CN1351733A (de) |
AT (1) | ATE236436T1 (de) |
AU (1) | AU4415800A (de) |
DE (1) | DE60001943D1 (de) |
FR (1) | FR2794266B1 (de) |
WO (1) | WO2000072254A1 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5817207A (en) | 1995-10-17 | 1998-10-06 | Leighton; Keith R. | Radio frequency identification card and hot lamination process for the manufacture of radio frequency identification cards |
US6791172B2 (en) * | 2001-04-25 | 2004-09-14 | General Semiconductor Of Taiwan, Ltd. | Power semiconductor device manufactured using a chip-size package |
US20050266611A1 (en) * | 2004-06-01 | 2005-12-01 | Jack Tu | Flip chip packaging method and flip chip assembly thereof |
EP1739596A1 (de) * | 2005-06-21 | 2007-01-03 | VisionCard PersonalisierungsgmbH | Karte und Herstellungsverfahren |
US7777317B2 (en) * | 2005-12-20 | 2010-08-17 | Assa Abloy Identification Technologies Austria GmbH (Austria) | Card and manufacturing method |
FR2968431B1 (fr) * | 2010-12-06 | 2012-12-28 | Oberthur Technologies | Procédé de fabrication d'un dispositif a microcircuit |
US9439334B2 (en) | 2012-04-03 | 2016-09-06 | X-Card Holdings, Llc | Information carrying card comprising crosslinked polymer composition, and method of making the same |
US9122968B2 (en) | 2012-04-03 | 2015-09-01 | X-Card Holdings, Llc | Information carrying card comprising a cross-linked polymer composition, and method of making the same |
CN110163327B (zh) | 2013-03-15 | 2023-03-10 | X卡控股有限公司 | 用于制作信息携带卡的芯层的方法以及结果产品 |
US10043541B1 (en) * | 2015-12-12 | 2018-08-07 | Magnecomp Corporation | Disk drive head stack assembly having height-controlled suspension circuit tail tack |
WO2019173455A1 (en) | 2018-03-07 | 2019-09-12 | X-Card Holdings, Llc | Metal card |
TWI688317B (zh) * | 2018-10-31 | 2020-03-11 | 台灣愛司帝科技股份有限公司 | 發光二極體晶片的固接方法及固接裝置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH074995B2 (ja) * | 1986-05-20 | 1995-01-25 | 株式会社東芝 | Icカ−ド及びその製造方法 |
JPH01108095A (ja) * | 1987-10-20 | 1989-04-25 | Ryoden Kasei Co Ltd | Icカード |
JP3061954B2 (ja) * | 1991-08-20 | 2000-07-10 | 株式会社東芝 | 半導体装置 |
EP0689241A2 (de) * | 1991-10-17 | 1995-12-27 | Fujitsu Limited | Halter für Halbleiterteil |
TW258829B (de) * | 1994-01-28 | 1995-10-01 | Ibm | |
EP0688050A1 (de) * | 1994-06-15 | 1995-12-20 | Philips Cartes Et Systemes | Montageverfahren für IC-Karte und so erhaltene Karte |
FR2733553B1 (fr) * | 1995-04-25 | 1997-07-11 | Pem Sa Protection Electrolytiq | Dispositif de contre-collage pour la solidarisation d'une bande metallique et d'une bande de materiau isolant |
US5710695A (en) * | 1995-11-07 | 1998-01-20 | Vlsi Technology, Inc. | Leadframe ball grid array package |
FR2741191B1 (fr) * | 1995-11-14 | 1998-01-09 | Sgs Thomson Microelectronics | Procede de fabrication d'un micromodule, notamment pour cartes a puces |
DE19621044A1 (de) * | 1996-05-24 | 1997-11-27 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung eines kartenförmigen Datenträgers |
JPH09327990A (ja) * | 1996-06-11 | 1997-12-22 | Toshiba Corp | カード型記憶装置 |
-
1999
- 1999-05-25 FR FR9906585A patent/FR2794266B1/fr not_active Expired - Fee Related
-
2000
- 2000-05-11 US US09/979,601 patent/US6521985B1/en not_active Expired - Fee Related
- 2000-05-11 WO PCT/FR2000/001268 patent/WO2000072254A1/fr active IP Right Grant
- 2000-05-11 EP EP00925432A patent/EP1190377B1/de not_active Expired - Lifetime
- 2000-05-11 DE DE60001943T patent/DE60001943D1/de not_active Expired - Lifetime
- 2000-05-11 AU AU44158/00A patent/AU4415800A/en not_active Abandoned
- 2000-05-11 AT AT00925432T patent/ATE236436T1/de not_active IP Right Cessation
- 2000-05-11 CN CN00807974A patent/CN1351733A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2000072254A1 (fr) | 2000-11-30 |
EP1190377B1 (de) | 2003-04-02 |
AU4415800A (en) | 2000-12-12 |
FR2794266A1 (fr) | 2000-12-01 |
CN1351733A (zh) | 2002-05-29 |
EP1190377A1 (de) | 2002-03-27 |
FR2794266B1 (fr) | 2002-01-25 |
DE60001943D1 (de) | 2003-05-08 |
US6521985B1 (en) | 2003-02-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |