WO2019208072A1 - 半導体装置製造方法 - Google Patents

半導体装置製造方法 Download PDF

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Publication number
WO2019208072A1
WO2019208072A1 PCT/JP2019/013149 JP2019013149W WO2019208072A1 WO 2019208072 A1 WO2019208072 A1 WO 2019208072A1 JP 2019013149 W JP2019013149 W JP 2019013149W WO 2019208072 A1 WO2019208072 A1 WO 2019208072A1
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Prior art keywords
sintered
sintering
bonding
semiconductor device
substrate
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PCT/JP2019/013149
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English (en)
French (fr)
Inventor
三田亮太
市川智昭
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日東電工株式会社
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Application filed by 日東電工株式会社 filed Critical 日東電工株式会社
Priority to US17/050,568 priority Critical patent/US11594513B2/en
Priority to JP2020516125A priority patent/JP7228577B2/ja
Priority to CN201980028570.2A priority patent/CN112041972A/zh
Priority to EP19791911.1A priority patent/EP3787011A4/en
Publication of WO2019208072A1 publication Critical patent/WO2019208072A1/ja

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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a method of manufacturing a semiconductor device such as a so-called power semiconductor device.
  • Au-Si eutectic is used between a substrate and a chip as a technique for die bonding of a semiconductor chip to a substrate such as a lead frame or an insulating circuit substrate while maintaining electrical connection with the substrate side.
  • a technique for forming an alloy layer to realize a bonded state and a technique for using solder or conductive particle-containing resin as a bonding material are known.
  • a semiconductor chip is bonded to a predetermined chip bonding portion of a substrate at a predetermined temperature and load condition via the sintered bonding material. Placed. Thereafter, the solvent in the sintered bonding material is volatilized between the substrate and the semiconductor chip on the substrate, and the sintering proceeds between the sinterable particles. A sintering process is performed. As a result, a sintered layer is formed between the substrate and the semiconductor chip, and the semiconductor chip is mechanically bonded to the substrate while being electrically connected.
  • Patent Documents 1 and 2 Such a technique is described in Patent Documents 1 and 2 below, for example.
  • a heating press machine including a pair of parallel flat plates for heating press may be used.
  • the substrate and the semiconductor chip that are temporarily fixed through the sintered bonding material layer, that is, the workpiece is sandwiched between a pair of parallel flat plates that open in the stacking direction of the substrate and the semiconductor chip.
  • heating is performed while applying pressure by the pair of parallel flat plates.
  • a sintered layer is formed from the sintered bonding material layer, and the semiconductor chip is sintered and bonded to the substrate.
  • a plurality of semiconductor chips may be collectively sintered and bonded to the substrate.
  • the peripheral edge portion is not joined to the substrate or the semiconductor chip. There is.
  • Such a joint failure is considered to be caused by non-uniformity among a plurality of material layers for sintered joints with respect to a load acting on a work sandwiched between parallel flat plates in a sintering joint process. It is done.
  • the thickness of the semiconductor chip and the material layer for sintered bonding in the workpiece is as small as several ⁇ m to several hundred ⁇ m, and in the sintering bonding process using a heating press machine equipped with a pair of parallel plates, the ideal for parallel plates Deviations or inclinations from a common parallel posture tend to cause a difference in load for each semiconductor chip or sintered bonding material layer. It is considered that the above-described bonding failure is likely to occur when the parallelism in the parallel plate and the accuracy of attitude control do not match the thinness of the semiconductor chip or the sintered bonding material layer.
  • the present invention has been conceived under the circumstances as described above, and its purpose is to provide a substrate in a semiconductor device manufacturing method that undergoes a semiconductor chip sintering bonding process performed under pressure. On the other hand, it is an object to provide a technique suitable for collectively sintering and joining a plurality of semiconductor chips.
  • the semiconductor device manufacturing method provided by the present invention includes the following preparation process and sintering joining process. This method is suitable for manufacturing a semiconductor device such as a power semiconductor device having a sintered joint portion of a semiconductor chip.
  • the sintered bonded workpiece includes a substrate having a first surface and a second surface opposite to the first surface, a plurality of semiconductor chips disposed on and bonded to the first surface, and each of the semiconductor chips and the substrate. It includes a plurality of sintered joining material layers containing sinterable particles with each interposed therebetween.
  • a sintered bonded workpiece can be prepared by pressing and temporarily fixing a semiconductor chip with a sintered bonding material layer to a substrate via the sintered bonding material layer.
  • a sheet body (sintered bonding sheet) of a composition containing a thermally decomposable polymer binder together with sinterable particles can be used.
  • each semiconductor chip is sintered and bonded to the substrate in the sintered bonding workpiece while the buffer material sheet is used.
  • the buffer material sheet used has a thickness of 5 to 5000 ⁇ m and a tensile modulus of 2 to 150 MPa.
  • the tensile elastic modulus of the cushioning material sheet is determined under the conditions of an initial chuck distance of 10 mm, 23 ° C., and a tensile speed of 50 mm / min for a cushioning material sheet sample piece having a width of 10 mm ⁇ length of 40 mm ⁇ thickness of 100 ⁇ m. The value is determined based on the measurement in the tensile test.
  • a buffer material sheet and a sintered joining work are stacked and sandwiched between a pair of press faces in a heating press, and the sintered joining work is placed between the press faces.
  • a sintered layer is formed from each sintered joining material layer in the workpiece.
  • the pair of press surfaces are, for example, a pair of opposed surfaces in a pair of parallel flat plates for heating press.
  • the buffer material sheet is stacked on the semiconductor chip arrangement side or the second surface side of the substrate with respect to the sintered bonded workpiece. By forming a sintered layer between the substrate and each semiconductor chip, each semiconductor chip is sintered and bonded to the substrate.
  • a buffer sheet having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa and a sintered joining work are stacked to form a press surface of a hot press machine.
  • the sintered bonded workpiece is heated while being pressurized.
  • the cushioning material sheet having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa, which is superimposed on the sintered joining workpiece, has an ideal parallel posture on a pair of press surfaces. If there is a difference between the semiconductor chips in terms of deviation or inclination of the height and the height from the first surface of the substrate to the top surface of the semiconductor chip, a cushion function can be achieved that substantially absorbs and reduces or eliminates the differences. Because.
  • the cushioning material sheet having a thickness of 5 to 5000 ⁇ m and a tensile modulus of 2 to 150 MPa has sufficient shape retention and is easy to handle in the semiconductor device manufacturing process.
  • Such a cushioning material sheet is easily and efficiently stacked on the sintered joint work in the above-described sintering joint process.
  • the semiconductor device manufacturing method according to the present invention is suitable for collectively sintering and bonding a plurality of semiconductor chips to a substrate.
  • the cushioning material sheet used in the above-mentioned sintered joining process has a weight reduction rate at 350 ° C. in a weight reduction measurement under the conditions of a standard weight temperature of 25 ° C. and a heating rate of 10 ° C./min in an air atmosphere. It is 0.1% or less. Such a configuration is suitable for sufficiently exhibiting the cushioning function and the like of the cushioning material sheet in the sintering joining process through a high-temperature heating process.
  • the weight reduction rate of the buffer material sheet can be measured, for example, using a differential thermal-thermogravimetric simultaneous measurement apparatus for a buffer material sheet sample of about 10 mg.
  • the heating temperature is 200 ° C. or higher and the applied pressure is 5 MPa or higher. That is, in the sinter bonding step, by passing through a heating process at a temperature of preferably 200 ° C. or higher while pressurizing a sintered bonded workpiece between the pair of press surfaces, preferably at a pressure of 5 MPa or more, in the laminating direction, A sintered layer is formed from the sintered bonding material layer. Such a configuration is suitable for forming a strong sintered layer between the substrate to be sintered and each semiconductor chip.
  • the sinterable particles in the above-mentioned sintered bonding material layer preferably include at least one selected from the group consisting of silver particles, copper particles, silver oxide particles, and copper oxide particles. Such a configuration is suitable for forming a strong sintered layer between the substrate to be sintered and the semiconductor chip.
  • the content of the sinterable particles in the material layer for sintered bonding is preferably 60 to 99% by mass, more preferably 65 to 98% by mass, more preferably from the viewpoint of realizing highly reliable sintered bonding. Is 70 to 97% by mass.
  • FIG. 4 illustrates some steps in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
  • An example of a method for producing a sintered bonded workpiece is shown.
  • the process following the process shown in FIG. 1 is represented.
  • the process following the process shown in FIG. 3 is represented.
  • the variation about the use aspect of the buffer material sheet in a sintering joining process is represented.
  • the variation about the use aspect of the buffer material sheet in a sintering joining process is represented.
  • the variation about the use aspect of the buffer material sheet in a sintering joining process is represented.
  • the variation about the use aspect of the buffer material sheet in a sintering joining process is represented.
  • the variation about the use aspect of the buffer material sheet in a sintering joining process is represented.
  • the semiconductor device manufacturing method of the present embodiment is a method for manufacturing a semiconductor device such as a power semiconductor device having a sintered bonding portion of a semiconductor chip, and includes at least a preparation step and a sintering bonding step as described below. It is a waste.
  • the sintered joining workpiece X has a laminated structure including a substrate S, a plurality of chips C, and a plurality of sintered joining material layers 11.
  • the substrate S has a surface Sa and a surface Sb opposite to the surface Sa.
  • the substrate S include an insulating circuit substrate with wiring on the surface, such as copper wiring, and a lead frame.
  • the chip mounting location on the substrate S may be a substrate surface such as a copper wiring or a lead frame, or may be a surface of a plating film formed on the substrate surface.
  • the plating film include a gold plating film, a silver plating film, a nickel plating film, a palladium plating film, and a platinum plating film.
  • Each chip C is a semiconductor chip, and has an element forming surface on the side where a semiconductor element is built and a back surface opposite to the element forming surface.
  • a flat electrode (not shown) as an external electrode is formed on the back surface.
  • the chip back surface (the lower surface in FIG. 1) side is temporarily fixed to the surface Sa side of the substrate S via the sintered bonding material layer 11.
  • Examples of the constituent material for forming the chip body in the chip C include semiconductor materials for power semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN).
  • the thickness of the chip C is, for example, 20 to 1000 ⁇ m.
  • Each sintered bonding material layer 11 is a layer of a composition containing conductive metal-containing sinterable particles and a binder component in this embodiment, and is interposed between the chip C and the substrate S for each chip C. To do.
  • the sintered bonded workpiece X having the above-described laminated structure can be manufactured as follows.
  • a plurality of chips C and a sintered joining sheet 10 are prepared.
  • Each of the plurality of chips C has a predetermined semiconductor element already formed, and is fixed on the adhesive surface T1a of the chip fixing tape T1.
  • a planar electrode (not shown) is already formed as an external electrode on the surface (upper surface in FIG. 2) on which the sintered bonding sheet 10 is bonded.
  • On the other surface (lower surface in FIG. 2) of each chip C other electrode pads or the like (not shown) are formed as necessary.
  • the sintered joining sheet 10 is a sheet body of a composition containing at least conductive metal-containing sinterable particles and a binder component, and the release liner L is accompanied on one side thereof.
  • the sintered joining sheet 10 is bonded to the plurality of chips C.
  • the sintered bonding sheet 10 is bonded to the plurality of chips C while the sintered bonding sheet 10 is pressed from the release liner L side to the chip C side.
  • An example of the pressing means is a pressure roll.
  • the bonding temperature is, for example, in the range of room temperature to 200 ° C.
  • the laminating load is, for example, 0.01 to 10 MPa.
  • the release liner L is peeled off. Thereby, each part of the sheet
  • the chip C is temporarily fixed to the substrate S described above. Specifically, for example, using a chip mounter, the chip C with the sintered bonding material layer is pressed against the substrate S through the sintered bonding material layer 11 and temporarily fixed. As described above, the sintered bonded workpiece X can be prepared.
  • the sintered bonding sheet 10 used for producing the sintered bonded workpiece X is a supply material for the sintered bonding material, and as described above, conductive metal-containing sinterable particles, a binder component, and the like. It is a sheet body of the composition containing at least.
  • Sinterable particles in the sintered bonding sheet 10 are particles that contain a conductive metal element and can be sintered.
  • the conductive metal element include gold, silver, copper, palladium, tin, and nickel.
  • the constituent material of such sinterable particles include gold, silver, copper, palladium, tin, nickel, and alloys of two or more metals selected from these groups.
  • the constituent material of the sinterable particles include silver oxide and metal oxides such as copper oxide, palladium oxide, and tin oxide.
  • the sinterable particles may be particles having a core-shell structure.
  • the sinterable particle may be a core-shell structure particle having a core mainly composed of copper and a shell mainly composed of gold or silver and covering the core.
  • the sinterable particles preferably include at least one selected from the group consisting of silver particles, copper particles, silver oxide particles, and copper oxide particles.
  • silver particles and copper particles are preferable as the sinterable particles.
  • silver particles are preferable because they are easy to handle.
  • a sintered material containing copper particles as sinterable particles in sintering bonding of a semiconductor chip to a copper substrate with silver plating it is necessary to perform a sintering process in an inert environment such as a nitrogen atmosphere.
  • a sintered material in which silver particles form sinterable particles is used, it is possible to appropriately perform the sintering process even in an air atmosphere.
  • the average particle size of the sinterable particles used is preferably 2000 nm or less, more preferably 800 nm or less, from the viewpoint of ensuring good sinterability by realizing a low sintering temperature for the sinterable particles. More preferably, it is 500 nm or less. From the viewpoint of realizing good dispersibility for the sinterable particles in the sintered bonding sheet 10 or the composition for forming the same, the average particle diameter of the sinterable particles is preferably 1 nm or more, preferably It is 10 nm or more, more preferably 50 nm or more, more preferably 100 nm or more. The average particle diameter of the sinterable particles can be measured by observation using a scanning electron microscope (SEM).
  • SEM scanning electron microscope
  • the content of the sinterable particles in the sintered bonding sheet 10 is preferably 60 to 99% by mass, more preferably 65 to 98% by mass, more preferably from the viewpoint of realizing highly reliable sintered bonding. Is 70 to 97% by mass.
  • the binder component in the sintered bonding sheet 10 includes at least a thermally decomposable polymer binder and a low boiling point binder, and may further include other components such as a plasticizer.
  • the thermally decomposable polymer binder is a binder component that can be thermally decomposed in a high-temperature heating process for sintering bonding, and is an element that contributes to maintaining the sheet shape of the sintered bonding sheet 10 before the heating process.
  • the thermally decomposable polymer binder is a solid material at room temperature (23 ° C.) from the viewpoint of ensuring the sheet shape maintaining function. Examples of such a thermally decomposable polymer binder include a polycarbonate resin and an acrylic resin.
  • polycarbonate resin as the thermally decomposable polymer binder examples include an aliphatic polycarbonate composed of an aliphatic chain that does not contain an aromatic compound such as a benzene ring between carbonic acid ester groups (—O—CO—O—) of the main chain. And an aromatic polycarbonate containing an aromatic compound between carbonic acid ester groups (—O—CO—O—) of the main chain.
  • the aliphatic polycarbonate include polyethylene carbonate and polypropylene carbonate.
  • aromatic polycarbonate examples include polycarbonate having a bisphenol A structure in the main chain.
  • acrylic resin as the thermally decomposable polymer binder examples include polymers of acrylic acid esters and / or methacrylic acid esters having a linear or branched alkyl group having 4 to 18 carbon atoms.
  • (meth) acryl represents “acryl” and / or “methacryl”
  • (meth) acrylate” represents “acrylate” and / or “methacrylate”.
  • alkyl group of (meth) acrylic acid ester for forming an acrylic resin as a thermally decomposable polymer binder examples include, for example, methyl group, ethyl group, propyl group, isopropyl group, n-butyl group, t-butyl group, Isobutyl, amyl, isoamyl, hexyl, heptyl, cyclohexyl, 2-ethylhexyl, octyl, isooctyl, nonyl, isononyl, decyl, isodecyl, undecyl, lauryl, tridecyl , Tetradecyl group, stearyl group, and octadecyl group.
  • the acrylic resin as the thermally decomposable polymer binder may be a polymer containing a monomer unit derived from a monomer other than the (meth) acrylic acid ester.
  • examples of such other monomers include carboxy group-containing monomers, acid anhydride monomers, hydroxy group-containing monomers, sulfonic acid group-containing monomers, and phosphate group-containing monomers.
  • examples of the carboxy group-containing monomer include acrylic acid, methacrylic acid, carboxyethyl acrylate, carboxypentyl acrylate, itaconic acid, maleic acid, fumaric acid, and crotonic acid.
  • examples of the acid anhydride monomer include maleic anhydride and itaconic anhydride.
  • Examples of the hydroxy group-containing monomer include 2-hydroxyethyl (meth) acrylate, 2-hydroxypropyl (meth) acrylate, 4-hydroxybutyl (meth) acrylate, 6-hydroxyhexyl (meth) acrylate, ( Examples include 8-hydroxyoctyl (meth) acrylate, 10-hydroxydecyl (meth) acrylate, 12-hydroxylauryl (meth) acrylate, and 4- (hydroxymethyl) cyclohexylmethyl (meth) acrylate.
  • sulfonic acid group-containing monomer examples include styrene sulfonic acid, allyl sulfonic acid, 2- (meth) acrylamide-2-methylpropane sulfonic acid, (meth) acrylamide propane sulfonic acid, sulfopropyl (meth) acrylate, and (meth) ) Acryloyloxynaphthalene sulfonic acid.
  • phosphate group-containing monomer include 2-hydroxyethyl acryloyl phosphate.
  • the weight average molecular weight of the thermally decomposable polymer binder is preferably 10,000 or more.
  • the weight average molecular weight of the thermally decomposable polymer binder is measured by gel permeation chromatography (GPC) and calculated as polystyrene.
  • the content of the thermally decomposable polymer binder in the sintered bonding sheet 10 is preferably 0.5 to 10% by mass, more preferably 0.8, from the viewpoint of appropriately exerting the above-described sheet shape maintaining function. It is ⁇ 8% by mass, more preferably 1 to 6% by mass.
  • the low boiling point binder in the sintered bonding sheet 10 has a viscosity at 23 ° C. of 1 ⁇ 10 measured using a dynamic viscoelasticity measuring apparatus (trade name “HAAKE MARS III”, manufactured by Thermo Fisher Scientific). It shall be liquid or semi-liquid indicating 5 Pa ⁇ s or less.
  • a 20 mm ⁇ parallel plate is used as a jig, the gap between the plates is set to 100 ⁇ m, and the shear rate in rotational shearing is set to 1 s ⁇ 1 .
  • Examples of the low boiling point binder contained in the sintered bonding material layer 11 include terpene alcohols, alcohols other than terpene alcohols, alkylene glycol alkyl ethers, and ethers other than alkylene glycol alkyl ethers. It is done.
  • Examples of terpene alcohols include isobornylcyclohexanol, citronellol, geraniol, nerol, carveol, and ⁇ -terpineol.
  • alcohols other than terpene alcohols include pentanol, hexanol, heptanol, octanol, 1-decanol, ethylene glycol, diethylene glycol, propylene glycol, butylene glycol, and 2,4-diethyl-1,5-pentanediol. It is done.
  • alkylene glycol alkyl ethers include ethylene glycol butyl ether, diethylene glycol methyl ether, diethylene glycol ethyl ether, diethylene glycol butyl ether, diethylene glycol isobutyl ether, diethylene glycol hexyl ether, diethylene glycol dimethyl ether, diethylene glycol diethyl ether, diethylene glycol dibutyl ether, diethylene glycol butyl methyl ether, diethylene glycol Isopropyl methyl ether, triethylene glycol methyl ether, triethylene glycol dimethyl ether, triethylene glycol butyl methyl ether, propylene glycol propyl ether, dipropylene glycol methyl Ether, dipropylene glycol ethyl ether, dipropylene glycol propyl ether, dipropylene glycol butyl ether, dipropylene glycol dimethyl ether, tripropylene glycol methyl ether and tripropylene glycol
  • ethers other than alkylene glycol alkyl ethers include ethylene glycol ethyl ether acetate, ethylene glycol butyl ether acetate, diethylene glycol ethyl ether acetate, diethylene glycol butyl ether acetate, and dipropylene glycol methyl ether acetate.
  • one type of low boiling point binder may be used, and two or more types of low boiling point binders may be used.
  • the low boiling point binder in the sintered bonding sheet 10 is preferably terpene alcohols and more preferably isobornylcyclohexanol from the viewpoint of stability at room temperature.
  • the thickness of the sintered joining sheet 10 at 23 ° C. is preferably 5 ⁇ m or more, more preferably 10 ⁇ m or more, and preferably 300 ⁇ m or less, more preferably 200 ⁇ m or less, and more preferably 150 ⁇ m or less.
  • the viscosity at 70 ° C. of the sintered bonding sheet 10 or the sintered bonding composition forming the same is, for example, 5 ⁇ 10 3 to 1 ⁇ 10 7 Pa ⁇ s, and preferably 1 ⁇ 10 4 to 1 ⁇ 10 6 Pa ⁇ s.
  • the sintered bonding sheet 10 is prepared by, for example, mixing the above-described components in a solvent to prepare a varnish, applying the varnish on a separator as a base material, and forming a coating film. Can be produced by drying.
  • a solvent for preparing the varnish an organic solvent or an alcohol solvent can be used.
  • each chip C is sintered and bonded to the substrate S in the sintered bonded workpiece X (sintered bonding step). Specifically, it is as follows.
  • a pair of parallel flat plates P and P for a heating press provided in the heating press machine are formed by stacking the sintered joint workpiece X and the buffer material sheet 20. Between the pair of press surfaces Pa, Pa.
  • the buffer material sheet 20 is piled up by the chip
  • the constituent material of the cushioning sheet 20 include a fluorine resin such as tetrafluoroethylene resin (PTFE), a silicone resin such as polymethylsiloxane, and a carbon sheet.
  • the thickness of the buffer material sheet 20 used is 5 to 5000 ⁇ m. From the viewpoint of ensuring the rigidity of the cushioning material sheet 20 and thus the shape retention, the thickness of the cushioning material sheet 20 is preferably 10 ⁇ m or more, more preferably 20 ⁇ m or more, more preferably 30 ⁇ m or more. From the viewpoint of suppressing the cost relating to the buffer material sheet 20, and thus the manufacturing cost of the semiconductor device, the thickness of the buffer material sheet 20 is preferably 3000 ⁇ m or less, more preferably 1500 ⁇ m or less, more preferably 1000 ⁇ m or less, and more preferably. 500 ⁇ m or less. Moreover, the size of the planar view shape of the buffer material sheet 20 may be the same as the size of the sintered joint work X in plan view, or may be larger than the size of the sintered joint work X in plan view. .
  • the tensile elastic modulus of the cushioning material sheet 20 is 2 to 150 MPa.
  • the tensile elastic modulus of the buffer material sheet is a measurement in a tensile test performed on a buffer material sheet sample piece having a width of 10 mm, a length of 40 mm, and a thickness of 100 ⁇ m at an initial chuck distance of 10 mm, 23 ° C., and a tensile speed of 50 mm / min.
  • the value obtained based on Specifically, the tensile elastic modulus can be obtained from the slope of the rising straight line portion in the initial measurement period in the stress-strain curve obtained by this measurement.
  • Such a tensile test can be performed using, for example, a tensile tester (trade name “Autograph AGS-50NX”, manufactured by Shimadzu Corporation).
  • a tensile tester trade name “Autograph AGS-50NX”, manufactured by Shimadzu Corporation.
  • the tensile elastic modulus of the cushioning material sheet 20 is preferably 5 MPa or more, more preferably 15 MPa or more, more preferably 30 MPa or more.
  • the tensile modulus of the cushioning material sheet 20 is preferably 150 MPa or less, more preferably 120 MPa or less, and more preferably 100 MPa or less.
  • Buffer material sheet 20 has a weight reduction rate at 350 ° C. of 0.1% or less in a weight reduction measurement under conditions of a reference weight temperature of 25 ° C. and a heating rate of 10 ° C./min in an air atmosphere.
  • the weight reduction rate of the buffer material sheet can be measured by using a differential thermal-thermogravimetric simultaneous measurement apparatus for a buffer material sheet sample of about 10 mg.
  • An example of the apparatus is a differential thermobalance TG-DTA TG8120 manufactured by Rigaku Corporation.
  • a sintered layer 12 is formed from each of the sintering joining material layers 11 in the sintered joining workpiece X as shown in FIG. To do. Specifically, in a state where the buffer material sheet 20 and the sintered joint work X are overlapped and sandwiched between a pair of press surfaces Pa, Pa, the sintered joint work X is placed between the press surfaces Pa, Pa. A predetermined high-temperature heating process is performed while pressing in the thickness direction or the stacking direction.
  • the low boiling-point binder in the sintering joining material layer 11 is volatilized, a thermally decomposable polymer binder is thermally decomposed and volatilized, and sinterable particle
  • the conductive metal is sintered.
  • the sintered layer 12 is formed between the substrate S and each chip C, and the chip C is sintered and bonded to the substrate S or its surface Sa while being electrically connected to the substrate S side. Will be.
  • the heating temperature for sintering joining is, for example, 150 to 400 ° C., preferably 200 to 400 ° C., more preferably 250 to 350 ° C.
  • the applied pressure for sintering joining is preferably 5 MPa or more, for example, 60 MPa or less, and preferably 40 MPa or less. Such temperature conditions and pressure conditions are suitable for forming a strong sintered layer 12 between the substrate S to be sintered and the chips C.
  • the pressure heating time for sintering joining is, for example, 0.3 to 300 minutes, and preferably 0.5 to 240 minutes.
  • this step is preferably performed in a nitrogen atmosphere, a reduced pressure, or a reducing gas atmosphere.
  • the average thickness of the sintered layer 12 formed in this step is preferably 5 to 200 ⁇ m, more preferably 10 to 150 ⁇ m. Such a configuration relaxes internal stress caused by thermal stress in the sintered layer 12 to ensure sufficient thermal shock reliability, and also suppresses costs related to sintered joining and, consequently, semiconductor device manufacturing costs. ,preferable.
  • a terminal portion (not shown) of the chip C and a terminal portion (not shown) of the substrate S are bonded to the bonding wire W as necessary. Electrical connection through the wire (wire bonding process).
  • the connection between the terminal portion of the chip C or the terminal portion of the substrate S and the bonding wire W is realized by, for example, ultrasonic welding with heating.
  • the bonding wire W for example, a gold wire, an aluminum wire, or a copper wire can be used.
  • the wire heating temperature in wire bonding is, for example, 80 to 250 ° C., and preferably 80 to 220 ° C.
  • the heating time is several seconds to several minutes.
  • a sealing resin R for protecting the chip C and the bonding wire W on the substrate S is formed (sealing step).
  • the sealing resin R is formed by a transfer molding technique performed using a mold.
  • an epoxy resin can be used as a constituent material of the sealing resin R.
  • the heating temperature for forming the sealing resin R is, for example, 165 to 185 ° C., and the heating time is, for example, 60 seconds to several minutes.
  • the buffer material sheet 20 having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa and the sintered joining workpiece X are stacked and heated.
  • the sintered joint workpiece X is heated while being pressurized.
  • Such a configuration has a high pressurizing force or load acting on the sintered joint workpiece X sandwiched between the parallel flat plates P and P in the sintering joining process between the plurality of sintered joining material layers 11. Suitable for achieving uniformity.
  • the buffer sheet 20 having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa and superposed on the sintered joining workpiece X is ideal for a pair of press surfaces Pa and Pa. If there is a difference between the chips C in terms of deviation or inclination from the normal parallel posture and the height from the surface Sa of the substrate S to the top surface of the chip C, the difference is substantially absorbed and reduced or eliminated. This is because it can exert a cushioning function.
  • the buffer material sheet 20 having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa has sufficient shape retention and is easy to handle in the semiconductor device manufacturing process.
  • Such a cushioning material sheet 20 is easily and efficiently stacked on the sintered bonded workpiece X in the above-described sintered bonding process. Further, such a cushioning material sheet 20 is unlikely to cause excessive compressive deformation or sagging deformation in the above-described sintering joining process through a high-temperature pressurization process.
  • an excessive compressive deformation or a sagging deformation occurs in which the buffer material sheet used embeds the chip C on the substrate S, and the closed space around the chip C (the substrate S, the chip C and the buffer material sheet If a space closed by the above is formed, a component that volatilizes and escapes from the sintered bonding material layer 11 may be deposited on the substrate S. If such deposition occurs, a separate cleaning step for cleaning the deposited portion is required, which is not preferable.
  • the above-described cushioning material sheet 20 that does not easily cause excessive compressive deformation or sagging deformation in the above-described sintering joining process that undergoes a high-temperature pressurization process is suitable for avoiding such problems.
  • the method for manufacturing a semiconductor device according to this embodiment is suitable for collectively sintering and bonding a plurality of chips C to the substrate S.
  • the weight reduction rate of 25 to 350 ° C. in the buffer material sheet 20 is preferably 0.1% or less.
  • Such a configuration is suitable for sufficiently exhibiting the cushioning function and the like of the cushioning material sheet 20 in the sintering joining process through a high-temperature heating process.
  • a plurality of sintered joining workpieces X may be collectively sintered and joined. Specifically, as shown in FIG. 5, a state in which a plurality of sintered joint workpieces X each including a plurality of chips C and a buffer material sheet 20 are stacked and sandwiched between a pair of press surfaces Pa, Pa. Thus, a predetermined high-temperature heating process may be performed while pressing the plurality of sintered bonded workpieces X in the thickness direction or the laminating direction between the press surfaces Pa and Pa.
  • the plurality of sintered joint workpieces X that are overlapped with the buffer material sheet 20 in the sintering joining step are arranged in a plurality of rows and a plurality of columns as shown in FIG. Also good.
  • the cushioning material sheet 20 having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa and being stacked with the plurality of sintered joining workpieces X is the thickness of the substrate S.
  • the cushioning material sheet 20 is overlapped with the sintered joining workpiece X on the surface Sb side of the substrate S. Also good. Even in such a configuration, the cushioning function of the cushioning material sheet 20 is exerted to provide a plurality of sintered bonding material layers for the applied pressure or load acting on the sintered bonded workpiece X sandwiched between the parallel plates P and P. 11 is made uniform.
  • the buffer material sheet 20 is placed on the chip placement side with respect to the sintered joining workpiece X having the orientation in which the chip placement side is directed downward. You may overlap. Even in such a configuration, the cushioning function of the cushioning material sheet 20 is exerted to provide a plurality of sintered bonding material layers for the applied pressure or load acting on the sintered bonded workpiece X sandwiched between the parallel plates P and P. 11 is made uniform. In addition, such a configuration is suitable for avoiding the formation of the above-described closed space that causes deposition of the component derived from the sintered bonding material layer 11 on the substrate S.
  • the above-described cushioning material sheet 20 used in the present semiconductor device manufacturing method may be formed with a plurality of through holes penetrating it in the thickness direction. Such a configuration is suitable for avoiding the formation of the above-described closed space that causes deposition of the component derived from the sintered bonding material layer 11 on the substrate S.
  • [Preparation of sintered bonding sheet] 35.86 parts by mass of first silver particles (average particle size 60 nm, DOWA Electronics Co., Ltd.) as sinterable particles and second silver particles (average particle size 1100 nm, Mitsui Metals Mining) as sinterable particles 23.90 parts by mass), polycarbonate resin as a thermally decomposable polymer binder (trade name “QPAC40”, weight average molecular weight is 150,000, solid at room temperature, manufactured by Empower Materials), 0.87 parts by mass, A hybrid of 3.47 parts by mass of isobornylcyclohexanol (trade name “Telsolve MTPH” as a low boiling point binder, liquid at room temperature, manufactured by Nippon Terpene Chemical Co., Ltd.) and 35.91 parts by mass of methyl ethyl ketone as a solvent Mix by using a mixer (trade name “HM-500”, manufactured by Keyence Corporation) in the stirring mode to prepare the varnish.
  • HM-500 manufactured
  • Example 1 Production of a silicon chip with a material layer for sintered bonding as described below, production of a sintered bonded workpiece by temporarily fixing the chip to a copper substrate, and batch sintering bonding of the workpiece were performed. And the observation about a sintering joining location was performed.
  • a silicon chip (5 mm square, 350 ⁇ m thick) having a planar electrode (5 mm square) on one surface was prepared.
  • the planar electrode has a laminated structure of a Ti layer (thickness 50 nm) on the silicon chip surface and an Au layer (thickness 100 nm) thereon.
  • seat for sintering joining was bonded together to the plane electrode of the silicon chip using the laminator provided with a crimping
  • the laminating temperature is 70 ° C.
  • the portion bonded to the planar electrode of the silicon chip in the sintered bonding sheet is left on the electrode, and the other portion of the sheet is removed, with a 5 mm square sintered bonding material layer on one side.
  • a silicon chip was obtained. In this way, a necessary number of silicon chips with a sintered bonding material layer were produced.
  • a sintered layer was formed from each sintered bonding material layer in each sintered bonded workpiece.
  • the applied pressure was 10 MPa.
  • the temperature was raised from 80 ° C. to 300 ° C. at a temperature raising rate of 1.5 ° C./second, and held at 300 ° C. for 2.5 minutes. Thereafter, the temperature was lowered to 170 ° C. by air cooling, and the temperature was lowered to 80 ° C. by water cooling.
  • the water cooling is based on a water cooling mechanism provided in the parallel plate.
  • Example 2 Example 1 except that a second buffer material sheet (trade name “900UL”, manufactured by Nitto Denko Corporation) having a thickness of 100 ⁇ m was used instead of the first buffer material sheet having a thickness of 30 ⁇ m in the sintering joining process.
  • a second buffer material sheet trade name “900UL”, manufactured by Nitto Denko Corporation
  • the sintered bonding locations were observed.
  • bonding failure state where the peripheral edge of the sintered layer is not bonded to the substrate or the semiconductor chip
  • I could't see it. The results are listed in Table 1.
  • Example 3 Example 1 except that a third buffer material sheet (trade name “920UL”, manufactured by Nitto Denko Corporation) having a thickness of 30 ⁇ m was used in place of the first buffer material sheet having a thickness of 30 ⁇ m in the sintering joining process.
  • a third buffer material sheet (trade name “920UL”, manufactured by Nitto Denko Corporation) having a thickness of 30 ⁇ m was used in place of the first buffer material sheet having a thickness of 30 ⁇ m in the sintering joining process.
  • the sintered bonding locations were observed.
  • bonding failure state where the peripheral edge of the sintered layer is not bonded to the substrate or the semiconductor chip
  • I could't see it. The results are listed in Table 1.
  • thermosetting silicone resin composition was obtained.
  • polymethylsilsesquioxane fine particles (trade name “Tospearl 2000B”, average particle size 6.0 ⁇ m, manufactured by Momentive Performance Materials Japan) are blended with the thermosetting silicone resin composition ( The blending amount was 20% by mass), and the composition was stirred at room temperature (25 ° C.) for 10 minutes. After stirring, the composition was degassed for 30 minutes or more at room temperature using a vacuum dryer.
  • the thus-prepared resin composition for forming a cushioning sheet was applied on a polyester film (trade name “SS4C”, thickness 50 ⁇ m, manufactured by Nipper Corporation) as a release sheet, and then heated at 135 ° C. for 9 minutes. did.
  • a semi-cured silicone resin sheet having a thickness of 30 ⁇ m was formed on the release sheet.
  • the fourth cushioning material sheet used in Comparative Example 2 was produced as described above.
  • Example 1 except that a fifth buffer material sheet (trade name “9700UL”, manufactured by Nitto Denko Corporation) having a thickness of 30 ⁇ m was used in place of the first buffer material sheet having a thickness of 30 ⁇ m in the sintering joining process.
  • a fifth buffer material sheet (trade name “9700UL”, manufactured by Nitto Denko Corporation) having a thickness of 30 ⁇ m was used in place of the first buffer material sheet having a thickness of 30 ⁇ m in the sintering joining process.
  • the sintered bonding locations were observed.
  • Some sintered bonded workpieces cause defective bonding (a state in which the peripheral portion of the sintered layer is not bonded to the substrate or the semiconductor chip) in the sintered layer.
  • Table 1 The results are listed in Table 1.
  • a substrate having a first surface and a second surface opposite to the first surface, a plurality of semiconductor chips disposed on and bonded to the first surface, and a gap between each semiconductor chip and the substrate Preparing a sintered joint work having a laminated structure including a plurality of sintered joining material layers containing intervening sinterable particles; In a state where a buffer material sheet having a thickness of 5 to 5000 ⁇ m and a tensile elastic modulus of 2 to 150 MPa and the sintered joint work are stacked and sandwiched between a pair of press surfaces, the sintered joint is interposed between the pair of press surfaces.
  • a method for manufacturing a semiconductor device comprising: a sintering joining step of forming a sintered layer from the material layer for sintering joining by applying a heating process while pressing a workpiece in the laminating direction.
  • Appendix 2 The semiconductor device manufacturing method according to appendix 1, wherein the thickness of the buffer material sheet is 10 ⁇ m or more, preferably 20 ⁇ m or more, more preferably 30 ⁇ m or more.
  • Appendix 3 The thickness of the said buffer material sheet is 3000 micrometers or less, Preferably it is 1500 micrometers or less, More preferably, it is 1000 micrometers or less, More preferably, it is 500 micrometers or less, The semiconductor device manufacturing method of Additional remark 1 or 2.
  • [Appendix 4] The semiconductor device manufacturing method according to any one of appendices 1 to 3, wherein the tensile elastic modulus of the cushioning material sheet is 5 MPa or more, preferably 15 MPa or more, more preferably 30 MPa or more.
  • [Appendix 5] The semiconductor device manufacturing method according to any one of appendices 1 to 4, wherein the tensile elastic modulus of the cushioning material sheet is 120 MPa or less, preferably 100 MPa or less.
  • the buffer material sheet has a weight reduction rate at 350 ° C. of 0.1% or less in a weight reduction measurement under conditions of a reference weight temperature of 25 ° C. and a heating rate of 10 ° C./min in an air atmosphere. 6.
  • Appendix 7 The semiconductor device manufacturing method according to any one of appendices 1 to 6, wherein a heating temperature in the sintering joining step is 200 ° C. or more and a pressure is 5 MPa or more.
  • Appendix 8 The semiconductor device manufacturing method according to any one of appendices 1 to 7, wherein the sinterable particles include at least one selected from the group consisting of silver particles, copper particles, silver oxide particles, and copper oxide particles.
  • the content of the sinterable particles in the sintered bonding material layer is 60 to 99% by mass, preferably 65 to 98% by mass, and more preferably 70 to 97% by mass.

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Abstract

本半導体装置製造方法は、用意工程および焼結接合工程を含む。用意工程では、基板（Ｓ）、その片面側に配され且つ接合されることとなる複数の半導体チップ（Ｃ）、および、各半導体チップ（Ｃ）と基板（Ｓ）との間にそれぞれが介在する焼結性粒子含有の複数の焼結接合用材料層（１１）、を含む積層構成を有する焼結接合ワーク（Ｘ）を用意する。焼結接合工程では、厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シート（２０）および焼結接合ワーク（Ｘ）を重ねて一対のプレス面（Ｐａ,Ｐａ）の間に挟持させた状態で、当該プレス面（Ｐａ,Ｐａ）間にて焼結接合ワーク（Ｘ）をその積層方向に加圧しつつ加熱過程を経ることにより、各焼結接合用材料層（１１）から焼結層（１２）を形成する。このような半導体装置製造方法は、加圧条件下において、基板に対して複数の半導体チップを一括して焼結接合するのに適する。

Description

半導体装置製造方法
　本発明は、いわゆるパワー半導体装置などの半導体装置を製造する方法に関する。
　半導体装置の製造において、リードフレームや絶縁回路基板など基板に対し、半導体チップを基板側との電気的接続をとりつつダイボンディングするための手法として、基板とチップとの間にＡｕ-Ｓｉ共晶合金層を形成して接合状態を実現する手法や、接合材としてハンダや導電性粒子含有樹脂を利用する手法が、知られている。
　一方、電力の供給制御を担うパワー半導体装置の普及が近年では顕著である。パワー半導体装置は、動作時の通電量が大きいことに起因して発熱量が大きい場合が多い。そのため、パワー半導体装置の製造においては、半導体チップを基板側との電気的接続をとりつつ基板にダイボンディングする手法について、高温動作時にも信頼性の高い接合状態を実現可能であることが求められる。半導体材料としてＳｉＣやＧａＮが採用されて高温動作化の図られたパワー半導体装置においては特に、そのような要求が強い。そして、そのような要求に応えるべく、電気的接続を伴うダイボンディング手法として、焼結性粒子と溶剤等を含有する焼結接合用の組成物を使用する技術が提案されている。
　焼結性粒子含有の焼結接合用材料が用いられて行われるダイボンディングでは、まず、基板のチップ接合予定箇所に対して半導体チップが焼結接合用材料を介して所定の温度・荷重条件で載置される。その後、基板とその上の半導体チップとの間において焼結接合用材料中の溶剤の揮発などが生じ且つ焼結性粒子間で焼結が進行するように、所定の温度・加圧条件での焼結工程が行われる。これにより、基板と半導体チップとの間に焼結層が形成されて、基板に対して半導体チップが電気的に接続されつつ機械的に接合されることとなる。このような技術は、例えば下記の特許文献１,２に記載されている。
国際公開第２００８／０６５７２８号 特開２０１３－０３９５８０号公報
　焼結接合によるダイボンディングがなされる半導体装置製造過程におけるその焼結接合の工程では、加熱プレス用の一対の平行平板を備える加熱プレス機が使用される場合がある。当該工程では、具体的には、焼結接合用材料層を介して仮固定されている基板と半導体チップ、即ちワークを、基板と半導体チップの積層方向に開く一対の平行平板の間に挟持させた状態で、当該一対の平行平板によって加圧しつつ加熱する。このような過程を経ることにより、焼結接合用材料層から焼結層が形成されて基板に対して半導体チップが焼結接合されることとなる。
　また、焼結接合によるダイボンディングがなされる半導体装置製造過程におけるその焼結接合の工程では、基板に対して複数の半導体チップが一括的に焼結接合される場合がある。しかしながら、上述の加熱プレス機を使用して一括的な焼結接合工程を行う場合、形成される複数の焼結層において、その周縁部が基板や半導体チップに接合していないものが見られることがある。このような接合不良は、焼結接合工程にて平行平板間に挟持されるワークに作用する荷重についての、複数の焼結接合用材料層の間での非均一性に、起因するものと考えられる。ワークにおける半導体チップや焼結接合用材料層の厚さは数μｍ～数百μｍ程度と小さく、一対の平行平板を備える加熱プレス機を使用して行う焼結接合工程においては、平行平板における理想的な平行姿勢からの逸脱ないし傾きは、半導体チップないし焼結接合用材料層ごとの荷重の差異を招きやすい。平行平板における平行度や姿勢制御の確度が半導体チップや焼結接合用材料層の薄さに見合わない場合に、上述の接合不良が生じやすいと考えられる。
　本発明は、以上のような事情のもとで考え出されたものであって、その目的は、加圧条件下で行われる半導体チップの焼結接合工程を経る半導体装置製造方法において、基板に対して複数の半導体チップを一括して焼結接合するのに適した手法を提供することにある。
　本発明により提供される半導体装置製造方法は、以下のような用意工程および焼結接合工程を含む。本方法は、半導体チップの焼結接合箇所を備えるパワー半導体装置などの半導体装置を製造するのに適するものである。
　用意工程では焼結接合ワークが用意される。焼結接合ワークは、第１面およびこれとは反対の第２面を有する基板、第１面側に配され且つ接合されることとなる複数の半導体チップ、および、各半導体チップと基板との間にそれぞれが介在する焼結性粒子含有の複数の焼結接合用材料層を含む。例えば、焼結接合用材料層付き半導体チップをその焼結接合用材料層を介して基板に対して圧着して仮固定することにより、焼結接合ワークを用意することができる。焼結接合用材料層の供給材としては、例えば、焼結性粒子とともに熱分解性の高分子バインダーを含む組成物のシート体（焼結接合用シート）を用いることができる。
　焼結接合工程では、緩衝材シートが使用されつつ焼結接合ワークにおける基板に対して各半導体チップが焼結接合される。使用される緩衝材シートは、５～５０００μｍの厚さを有し且つ２～１５０ＭＰａの引張弾性率を有する。本発明において、緩衝材シートの引張弾性率とは、幅１０ｍｍ×長さ４０ｍｍ×厚さ１００μｍの緩衝材シート試料片について初期チャック間距離１０ｍｍ、２３℃および引張速度５０ｍｍ/分の条件で行われる引張試験における測定に基づいて求められる値とする。焼結接合工程では、このような緩衝材シートと焼結接合ワークとを重ねて加熱プレス機における一対のプレス面の間に挟持させた状態で、当該プレス面間にて焼結接合ワークをその積層方向に加圧しつつ加熱過程を経ることにより、ワークにおける各焼結接合用材料層から焼結層を形成する。一対のプレス面は、例えば、加熱プレス用の一対の平行平板における一対の対向面である。緩衝材シートは、焼結接合ワークに対し、その半導体チップ配設側に重ねられるか、或いは基板の第２面側に重ねられる。基板と各半導体チップとの間での焼結層の形成により、基板に対して各半導体チップが焼結接合されることとなる。
　本半導体装置製造方法において、その焼結接合工程では、上述のように、厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シートと焼結接合ワークとを重ねて加熱プレス機のプレス面間に挟持させた状態で、焼結接合ワークを加圧しつつ加熱する。このような構成は、焼結接合工程にて平行平板間に挟持される焼結接合ワークに作用する加圧力ないし荷重について、複数の焼結接合用材料層の間での高い均一性を実現するのに適する。焼結接合工程において、５～５０００μｍの厚さを有し且つ２～１５０ＭＰａの引張弾性率を有して焼結接合ワークと重ねられる緩衝材シートが、一対のプレス面における理想的な平行姿勢からの逸脱ないし傾きや、基板第１面から半導体チップ頂面までの高さについて半導体チップ間で差異がある場合にはその差異を、実質的に吸収して低減・解消するクッション機能を発揮しうるからである。
　加えて、厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シートは、充分な形状保持性を有し、半導体装置製造プロセスにおいて取り扱いやすい。このような緩衝材シートは、上述の焼結接合工程において焼結接合ワークに対して効率よく且つ適切な配置で重ねやすい。
　以上のように、本発明に係る半導体装置製造方法は、基板に対して複数の半導体チップを一括して焼結接合するのに適する。
　上述の焼結接合工程にて使用される緩衝材シートは、大気雰囲気下、基準重量温度２５℃、および昇温速度１０℃/分の条件での重量減少測定における３５０℃での重量減少率が０.１％以下である。このような構成は、高温加熱過程を経る焼結接合工程において、緩衝材シートについてそのクッション機能などの機能を充分に発揮させるうえで好適である。緩衝材シートの重量減少率は、例えば、約１０ｍｇの緩衝材シート試料について示差熱－熱重量同時測定装置を使用して測定することができる。
　上述の焼結接合工程では、好ましくは、加熱温度は２００℃以上であり且つ加圧力は５ＭＰａ以上である。すなわち、焼結接合工程では、一対のプレス面間にて焼結接合ワークをその積層方向に好ましくは５ＭＰａ以上の圧力で加圧しつつ好ましくは２００℃以上の温度での加熱過程を経ることにより、焼結接合用材料層から焼結層を形成する。このような構成は、焼結接合される基板と各半導体チップとの間に強固な焼結層を形成するうえで好適である。
　上述の焼結接合用材料層内の焼結性粒子は、好ましくは、銀粒子、銅粒子、酸化銀粒子、および酸化銅粒子からなる群より選択される少なくとも一種を含む。このような構成は、焼結接合される基板と半導体チップとの間に強固な焼結層を形成するうえで好適である。
　焼結接合用材料層における焼結性粒子の含有割合は、信頼性の高い焼結接合を実現するという観点からは、好ましくは６０～９９質量％、より好ましくは６５～９８質量％、より好ましくは７０～９７質量％である。
本発明の一の実施形態に係る半導体装置製造方法における一部の工程を表す。 焼結接合ワークの作製方法の一例を表す。 図１に示す工程の後に続く工程を表す。 図３に示す工程の後に続く工程を表す。 焼結接合工程における緩衝材シートの使用態様についてのバリエーションを表す。 焼結接合工程における緩衝材シートの使用態様についてのバリエーションを表す。 焼結接合工程における緩衝材シートの使用態様についてのバリエーションを表す。 焼結接合工程における緩衝材シートの使用態様についてのバリエーションを表す。
　図１から図４は、本発明の一の実施形態に係る半導体装置製造方法を表す。本実施形態の半導体装置製造方法は、半導体チップの焼結接合箇所を備えるパワー半導体装置などの半導体装置を製造するための方法であって、以下のような用意工程および焼結接合工程を少なくとも含むものである。
　用意工程では、焼結接合工程に付されることとなる図１に示すような焼結接合ワークＸが用意される。焼結接合ワークＸは、基板Ｓと、複数のチップＣと、複数の焼結接合用材料層１１とを含む積層構成を有する。
　基板Ｓは、面Ｓａおよびこれとは反対の面Ｓｂを有する。基板Ｓとしては、例えば、銅配線など配線を表面に伴う絶縁回路基板、および、リードフレームが挙げられる。基板Ｓにおけるチップ搭載箇所は、銅配線やリードフレームなどの素地表面であってもよいし、素地表面上に形成されためっき膜の表面であってもよい。当該めっき膜としては、例えば、金めっき膜、銀めっき膜、ニッケルめっき膜、パラジウムめっき膜、および白金めっき膜が挙げられる。
　各チップＣは、半導体チップであり、半導体素子が作り込まれている側の素子形成面とこれとは反対の裏面を有する。裏面には、外部電極としての平面電極（図示略）が形成されている。このチップ裏面（図１では下面）側が焼結接合用材料層１１を介して基板Ｓの面Ｓａ側に仮固定されている。チップＣにおけるチップ本体をなすための構成材料としては、例えば、炭化ケイ素（ＳｉＣ）や窒化ガリウム（ＧａＮ）など、パワー半導体装置用の半導体材料が挙げられる。また、チップＣの厚さは例えば２０～１０００μｍである。
　各焼結接合用材料層１１は、本実施形態では導電性金属含有の焼結性粒子とバインダー成分とを含む組成物の層であり、チップＣごとに当該チップＣと基板Ｓの間に介在する。
　以上のような積層構成の焼結接合ワークＸは、以下のようにして作製することができる。
　まず、図２（ａ）に示すように、複数のチップＣおよび焼結接合用シート１０が用意される。複数のチップＣのそれぞれは、所定の半導体素子が既に作り込まれたものであり、チップ固定用テープＴ１の粘着面Ｔ１ａ上に固定されている。各チップＣにおいて、焼結接合用シート１０が貼り合わせられる側の表面（図２では上面）には既に外部電極として平面電極（図示略）が形成されている。各チップＣの他方の面（図２では下面）には、必要に応じて他の電極パッド等（図示略）が形成されている。焼結接合用シート１０は、導電性金属含有の焼結性粒子とバインダー成分とを少なくとも含む組成物のシート体であり、その片面に剥離ライナーＬを伴う。
　次に、図２（ｂ）に示すように、複数のチップＣに対して焼結接合用シート１０が貼り合わせられる。具体的には、焼結接合用シート１０がその剥離ライナーＬの側からチップＣ側に押圧されつつ、複数のチップＣに対して焼結接合用シート１０が貼り合わせられる。押圧手段としては、例えば圧着ロールが挙げられる。貼合せ温度は、例えば、室温から２００℃の範囲内である。貼合せ用の荷重は例えば０.０１～１０ＭＰａである。
　次に、図２（ｃ）に示すように、剥離ライナーＬの剥離が行われる。これにより、焼結接合用シート１０の各所が各チップＣの表面に転写され、焼結接合用材料層１１を伴うチップＣが得られる。
　次に、図２（ｄ）に示すように、上述の基板ＳへのチップＣの仮固定が行われる。具体的には、例えばチップマウンターを使用して、焼結接合用材料層付きチップＣをその焼結接合用材料層１１を介して基板Ｓに対して押圧して仮固定する。以上のようにして、焼結接合ワークＸを用意することができる。
　焼結接合ワークＸを作製するうえで使用した焼結接合用シート１０は、焼結接合用材料の供給材であって、上述のように、導電性金属含有の焼結性粒子とバインダー成分とを少なくとも含む組成物のシート体である。
　焼結接合用シート１０中の焼結性粒子は、導電性金属元素を含有して焼結可能な粒子である。導電性金属元素としては、例えば、金、銀、銅、パラジウム、スズ、およびニッケルが挙げられる。このような焼結性粒子の構成材料としては、例えば、金、銀、銅、パラジウム、スズ、ニッケル、および、これらの群から選択される二種以上の金属の合金が挙げられる。焼結性粒子の構成材料としては、酸化銀や、酸化銅、酸化パラジウム、酸化スズなどの金属酸化物も挙げられる。また、焼結性粒子は、コアシェル構造を有する粒子であってもよい。例えば、焼結性粒子は、銅を主成分とするコアと、金や銀などを主成分とし且つコアを被覆するシェルとを有する、コアシェル構造の粒子であってもよい。本実施形態において、焼結性粒子は、好ましくは銀粒子、銅粒子、酸化銀粒子、および酸化銅粒子からなる群より選択される少なくとも一種を含む。形成される焼結層において高い導電性および高い熱伝導性を実現するという観点からは、焼結性粒子としては銀粒子および銅粒子が好ましい。加えて耐酸化性の観点からは、銀粒子は扱いやすくて好ましい。例えば、銀めっき付銅基板への半導体チップの焼結接合において、焼結性粒子として銅粒子を含む焼結材を用いる場合には、窒素雰囲気下など不活性環境下で焼結プロセスを行う必要があるものの、銀粒子が焼結性粒子をなす焼結材を用いる場合には、空気雰囲気下であっても適切に焼結プロセスを実行することが可能である。
　用いられる焼結性粒子の平均粒径は、焼結性粒子について低い焼結温度を実現するなどして良好な焼結性を確保するという観点からは、好ましくは２０００ｎｍ以下、より好ましくは８００ｎｍ以下、より好ましくは５００ｎｍ以下である。焼結接合用シート１０ないしそれを形成するための組成物における焼結性粒子について良好な分散性を実現するという観点からは、焼結性粒子の平均粒径は、好ましくは１ｎｍ以上、好ましくは１０ｎｍ以上、より好ましくは５０ｎｍ以上、より好ましくは１００ｎｍ以上である。焼結性粒子の平均粒径は、走査型電子顕微鏡（ＳＥＭ）を使用して行う観察によって計測することが可能である。
　焼結接合用シート１０における焼結性粒子の含有割合は、信頼性の高い焼結接合を実現するという観点からは、好ましくは６０～９９質量％、より好ましくは６５～９８質量％、より好ましくは７０～９７質量％である。
　焼結接合用シート１０中のバインダー成分は、本実施形態では、熱分解性高分子バインダーと低沸点バインダーとを少なくとも含み、可塑剤など他の成分を更に含んでもよい。熱分解性高分子バインダーは、焼結接合用の高温加熱過程で熱分解され得るバインダー成分であり、当該加熱過程前までにおいて、焼結接合用シート１０のシート形状の保持に寄与する要素である。本実施形態では、シート形状保持機能を担保するという観点から、熱分解性高分子バインダーは常温（２３℃）で固形の材料である。そのような熱分解性高分子バインダーとしては、例えば、ポリカーボネート樹脂およびアクリル樹脂を挙げることができる。
　熱分解性高分子バインダーとしてのポリカーボネート樹脂としては、例えば、主鎖の炭酸エステル基（-Ｏ-ＣＯ-Ｏ-）間にベンゼン環など芳香族化合物を含まずに脂肪族鎖からなる脂肪族ポリカーボネート、および、主鎖の炭酸エステル基（-Ｏ-ＣＯ-Ｏ-）間に芳香族化合物を含む芳香族ポリカーボネートが挙げられる。脂肪族ポリカーボネートとしては、例えば、ポリエチレンカーボネートおよびポリプロピレンカーボネートが挙げられる。芳香族ポリカーボネートとしては、主鎖にビスフェノールＡ構造を含むポリカーボネートが挙げられる。
　熱分解性高分子バインダーとしてのアクリル樹脂としては、例えば、炭素数４～１８の直鎖状または分岐状のアルキル基を有するアクリル酸エステルおよび／またはメタクリル酸エステルの重合体が挙げられる。以下では、「(メタ)アクリル」をもって「アクリル」および／または「メタクリル」を表し、「(メタ)アクリレート」をもって「アクリレート」および／または「メタクリレート」を表す。熱分解性高分子バインダーとしてのアクリル樹脂をなすための(メタ)アクリル酸エステルのアルキル基としては、例えば、メチル基、エチル基、プロピル基、イソプロピル基、ｎ-ブチル基、ｔ-ブチル基、イソブチル基、アミル基、イソアミル基、ヘキシル基、へプチル基、シクロヘキシル基、２-エチルヘキシル基、オクチル基、イソオクチル基、ノニル基、イソノニル基、デシル基、イソデシル基、ウンデシル基、ラウリル基、トリデシル基、テトラデシル基、ステアリル基、およびオクタデシル基が挙げられる。
　熱分解性高分子バインダーとしてのアクリル樹脂は、上記(メタ)アクリル酸エステル以外の他のモノマーに由来するモノマーユニットを含む重合体であってもよい。そのような他のモノマーとしては、例えば、カルボキシ基含有モノマー、酸無水物モノマー、ヒドロキシ基含有モノマー、スルホン酸基含有モノマー、およびリン酸基含有モノマーが挙げられる。具体的に、カルボキシ基含有モノマーとしては、例えば、アクリル酸、メタクリル酸、カルボキシエチルアクリレート、カルボキシペンチルアクリレート、イタコン酸、マレイン酸、フマル酸、およびクロトン酸が挙げられる。酸無水物モノマーとしては、例えば、無水マレイン酸や無水イタコン酸が挙げられる。ヒドロキシ基含有モノマーとしては、例えば、(メタ)アクリル酸２-ヒドロキシエチル、(メタ)アクリル酸２-ヒドロキシプロピル、(メタ)アクリル酸４-ヒドロキシブチル、(メタ)アクリル酸６-ヒドロキシヘキシル、(メタ)アクリル酸８-ヒドロキシオクチル、(メタ)アクリル酸１０-ヒドロキシデシル、(メタ)アクリル酸１２-ヒドロキシラウリル、および、(メタ)アクリル酸４-(ヒドロキシメチル)シクロヘキシルメチルが挙げられる。スルホン酸基含有モノマーとしては、例えば、スチレンスルホン酸、アリルスルホン酸、２-(メタ)アクリルアミド-２-メチルプロパンスルホン酸、(メタ)アクリルアミドプロパンスルホン酸、スルホプロピル(メタ)アクリレート、および(メタ)アクリロイルオキシナフタレンスルホン酸が挙げられる。リン酸基含有モノマーとしては、例えば２-ヒドロキシエチルアクリロイルホスフェートが挙げられる。
　熱分解性高分子バインダーの重量平均分子量は、好ましくは１００００以上である。熱分解性高分子バインダーの重量平均分子量は、ゲル・パーミエーション・クロマトグラフィー（ＧＰＣ）により測定してポリスチレン換算により算出される値とする。
　焼結接合用シート１０における熱分解性高分子バインダーの含有割合は、上述のシート形状保持機能を適切に発揮させるという観点からは、好ましくは０.５～１０質量％、より好ましくは０.８～８質量％、より好ましくは１～６質量％である。
　焼結接合用シート１０中の低沸点バインダーは、動的粘弾性測定装置（商品名「ＨＡＡＫＥ ＭＡＲＳ III」，Ｔｈｅｒｍｏ Ｆｉｓｈｅｒ Ｓｃｉｅｎｔｆｉｃ社製）を使用して測定される２３℃での粘度が１×１０5Ｐａ・ｓ以下を示す液状または半液状であるものとする。本粘度測定においては、治具として２０ｍｍφのパラレルプレートを使用し、プレート間ギャップを１００μｍとし、回転せん断におけるせん断速度を１ｓ-1とする。
　焼結接合用材料層１１に含まれる低沸点バインダーとしては、例えば、テルペンアルコール類、テルペンアルコール類を除くアルコール類、アルキレングリコールアルキルエーテル類、および、アルキレングリコールアルキルエーテル類を除くエーテル類が、挙げられる。テルペンアルコール類としては、例えば、イソボルニルシクロヘキサノール、シトロネロール、ゲラニオール、ネロール、カルベオール、およびα-テルピネオールが挙げられる。テルペンアルコール類を除くアルコール類としては、例えば、ペンタノール、ヘキサノール、ヘプタノール、オクタノール、１-デカノール、エチレングリコール、ジエチレングリコール、プロピレングリコール、ブチレングリコール、および２,４-ジエチル-１,５ペンタンジオールが挙げられる。アルキレングリコールアルキルエーテル類としては、例えば、エチレングリコールブチルエーテル、ジエチレングリコールメチルエーテル、ジエチレングリコールエチルエーテル、ジエチレングリコールブチルエーテル、ジエチレングリコールイソブチルエーテル、ジエチレングリコールヘキシルエーテル、ジエチレングリコールジメチルエーテル、ジエチレングリコールジエチルエーテル、ジエチレングリコールジブチルエーテル、ジエチレングリコールブチルメチルエーテル、ジエチレングリコールイソプロピルメチルエーテル、トリエチレングリコールメチルエーテル、トリエチレングリコールジメチルエーテル、トリエチレングリコールブチルメチルエーテル、プロピレングリコールプロピルエーテル、ジプロピレングリコールメチルエーテル、ジプロピレングリコールエチルエーテル、ジプロピレングリコールプロピルエーテル、ジプロピレングリコールブチルエーテル、ジプロピレングリコールジメチルエーテル、トリプロピレングリコールメチルエーテル、およびトリプロピレングリコールジメチルエーテルが挙げられる。アルキレングリコールアルキルエーテル類を除くエーテル類としては、例えば、エチレングリコールエチルエーテルアセテート、エチレングリコールブチルエーテルアセテート、ジエチレングリコールエチルエーテルアセテート、ジエチレングリコールブチルエーテルアセテート、およびジプロピレングリコールメチルエーテルアセテートが挙げられる。焼結接合用シート１０中の成分として、一種類の低沸点バインダーを用いてもよいし、二種類以上の低沸点バインダーを用いてもよい。焼結接合用シート１０中の低沸点バインダーとしては、常温での安定性という観点からは、テルペンアルコール類が好ましく、イソボルニルシクロヘキサノールがより好ましい。
　焼結接合用シート１０の２３℃での厚さは、好ましくは５μｍ以上、より好ましくは１０μｍ以上であり、且つ、好ましくは３００μｍ以下、より好ましくは２００μｍ以下、より好ましくは１５０μｍ以下である。また、焼結接合用シート１０ないしこれをなす焼結接合用組成物の７０℃での粘度は、例えば５×１０3～１×１０7Ｐａ・ｓであり、好ましくは１×１０4～１×１０6Ｐａ・ｓである。
　焼結接合用シート１０は、例えば、上述の各成分を溶剤中にて混合してワニスを調製し、基材としてのセパレータの上に当該ワニスを塗布して塗膜を形成し、その塗膜を乾燥させることによって、作製することができる。ワニス調製用の溶剤としては有機溶剤やアルコール溶剤を用いることができる。
　本発明の半導体装置製造方法においては、上述の用意工程の後に、焼結接合ワークＸにおける基板Ｓに対して各チップＣが焼結接合される（焼結接合工程）。具体的には次のとおりである。
　まず、図３（ａ）および図３（ｂ）に示すように、焼結接合ワークＸと緩衝材シート２０とを重ねて、加熱プレス機の具備する加熱プレス用の一対の平行平板Ｐ,Ｐにおける一対のプレス面Ｐａ,Ｐａの間に挟持させる。図３（ｂ）では、緩衝材シート２０は、焼結接合ワークＸに対してそのチップ配設側に重ねられている。緩衝材シート２０の構成材料としては、例えば、テトラフルオロエチレン樹脂（ＰＴＦＥ）などのフッ素樹脂、ポリメチルシロキサンなどのシリコーン樹脂、およびカーボンシートが挙げられる。
　使用される緩衝材シート２０の厚さは５～５０００μｍである。緩衝材シート２０の剛性ひいては形状保持性を確保するという観点からは、緩衝材シート２０の厚さは、好ましくは１０μｍ以上、より好ましくは２０μｍ以上、より好ましくは３０μｍ以上である。緩衝材シート２０に関するコスト、ひいては半導体装置の製造コストを抑制するという観点からは、緩衝材シート２０の厚さは、好ましくは３０００μｍ以下、より好ましくは１５００μｍ以下、より好ましくは１０００μｍ以下、より好ましくは５００μｍ以下である。また、緩衝材シート２０の平面視形状のサイズは、焼結接合ワークＸの平面視形状のサイズと同じであってもよいし、焼結接合ワークＸの平面視形状のサイズより大きくてもよい。
　緩衝材シート２０の引張弾性率は２～１５０ＭＰａである。緩衝材シートの引張弾性率とは、幅１０ｍｍ×長さ４０ｍｍ×厚さ１００μｍの緩衝材シート試料片について初期チャック間距離１０ｍｍ、２３℃および引張速度５０ｍｍ/分の条件で行われる引張試験における測定に基づいて求められる値とする。具体的には、本測定によって得られる応力－歪み曲線における測定初期期間の立ち上がり直線部分の傾きから引張弾性率を求めることができる。このような引張試験は、例えば、引張試験機（商品名「オートグラフＡＧＳ-５０ＮＸ」，株式会社島津製作所製）を使用して実施することができる。緩衝材シート２０の剛性ひいては形状保持性を確保するという観点からは、緩衝材シート２０の引張弾性率は、好ましくは５ＭＰａ以上、より好ましくは１５ＭＰａ以上、より好ましくは３０ＭＰａ以上である。緩衝材シート２０において高いクッション性を実現するという観点からは、緩衝材シート２０の引張弾性率は、好ましくは１５０ＭＰａ以下、より好ましくは１２０ＭＰａ以下、より好ましくは１００ＭＰａ以下である。
　緩衝材シート２０は、大気雰囲気下、基準重量温度２５℃、および昇温速度１０℃/分の条件での重量減少測定における３５０℃での重量減少率が０.１％以下である。緩衝材シートの重量減少率は、約１０ｍｇの緩衝材シート試料について示差熱－熱重量同時測定装置を使用して測定することができる。同装置としては、例えば、株式会社リガク製の示差熱天秤 TG-DTA TG8120が挙げられる。
　焼結接合工程では、次に、所定の高温加熱過程を経ることにより、図３（ｃ）に示すように、焼結接合ワークＸにおける各焼結接合用材料層１１から焼結層１２を形成する。具体的には、緩衝材シート２０と焼結接合ワークＸとを重ねて一対のプレス面Ｐａ,Ｐａの間に挟持させた状態で、プレス面Ｐａ,Ｐａ間にて焼結接合ワークＸをその厚さ方向ないし積層方向に加圧しつつ所定の高温加熱過程を経る。これにより、基板ＳとチップＣとの間において、焼結接合用材料層１１中の低沸点バインダーを揮発させ、熱分解性高分子バインダーを熱分解させて揮散させ、そして、焼結性粒子の導電性金属を焼結させる。本工程では、基板Ｓと各チップＣとの間に焼結層１２が形成されて、基板Ｓないしその面Ｓａに対し、チップＣが基板Ｓ側との電気的接続がとられつつ焼結接合されることとなる。
　本工程において、焼結接合のための加熱温度は、例えば１５０～４００℃であり、好ましくは２００～４００℃、より好ましくは２５０～３５０℃である。焼結接合のための加圧力は、好ましくは５ＭＰａ以上であって、例えば６０ＭＰａ以下であり、好ましくは４０ＭＰａ以下である。このような温度条件および圧力条件は、焼結接合される基板Ｓと各チップＣとの間に強固な焼結層１２を形成するうえで好適である。焼結接合の加圧加熱時間は、例えば０.３～３００分間であり、好ましくは０.５～２４０分間である。また、焼結接合に関与する金属の酸化防止の観点からは、本工程は、窒素雰囲気下、減圧下、または還元ガス雰囲気下で行われるのが好ましい。
　本工程で形成される焼結層１２の平均厚さは、好ましくは５～２００μｍ、より好ましくは１０～１５０μｍである。このような構成は、焼結層１２において熱ストレスに起因する内部応力を緩和して充分な熱衝撃信頼性を確保するとともに、焼結接合に関するコスト、ひいては半導体装置の製造コストを抑制するうえで、好ましい。
　本半導体装置製造方法においては、次に、図４（ａ）に示すように、チップＣの端子部（図示略）と基板Ｓの有する端子部（図示略）とを必要に応じてボンディングワイヤーＷを介して電気的に接続する（ワイヤーボンディング工程）。チップＣの端子部や基板Ｓの端子部とボンディングワイヤーＷとの結線は、例えば、加熱を伴う超音波溶接によって実現される。ボンディングワイヤーＷとしては、例えば金線、アルミニウム線、または銅線を用いることができる。ワイヤーボンディングにおけるワイヤー加熱温度は、例えば８０～２５０℃であり、好ましくは８０～２２０℃である。また、その加熱時間は数秒～数分間である。
　次に、図４（ｂ）に示すように、基板Ｓ上のチップＣやボンディングワイヤーＷを保護するための封止樹脂Ｒを形成する（封止工程）。本工程では、例えば、金型を使用して行うトランスファーモールド技術によって封止樹脂Ｒが形成される。封止樹脂Ｒの構成材料としては、例えばエポキシ系樹脂を用いることができる。本工程において、封止樹脂Ｒを形成するための加熱温度は例えば１６５～１８５℃であり、加熱時間は例えば６０秒～数分間である。本封止工程で封止樹脂Ｒの硬化が充分には進行しない場合には、本工程の後に封止樹脂Ｒを完全に硬化させるための後硬化工程が行われる。
　以上のようにして、半導体チップの焼結接合箇所を備える半導体装置を製造することができる。
　本半導体装置製造方法において、図３を参照して上述した焼結接合工程では、厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シート２０と焼結接合ワークＸとを重ねて加熱プレス機の一対の平行平板Ｐ,Ｐのプレス面Ｐａ,Ｐａ間に挟持させた状態で、焼結接合ワークＸを加圧しつつ加熱する。このような構成は、焼結接合工程にて平行平板Ｐ,Ｐ間に挟持される焼結接合ワークＸに作用する加圧力ないし荷重について、複数の焼結接合用材料層１１の間での高い均一性を実現するのに適する。焼結接合工程において、５～５０００μｍの厚さを有し且つ２～１５０ＭＰａの引張弾性率を有して焼結接合ワークＸと重ねられる緩衝材シート２０が、一対のプレス面Ｐａ,Ｐａにおける理想的な平行姿勢からの逸脱ないし傾きや、基板Ｓの面ＳａからチップＣの頂面までの高さについてチップＣ間で差異がある場合にはその差異を、実質的に吸収して低減・解消するクッション機能を発揮しうるからである。
　加えて、厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シート２０は、充分な形状保持性を有し、半導体装置製造プロセスにおいて取り扱いやすい。このような緩衝材シート２０は、上述の焼結接合工程において焼結接合ワークＸに対して効率よく且つ適切な配置で重ねやすい。また、このような緩衝材シート２０は、高温加圧過程を経る上述の焼結接合工程において、過度の圧縮変形や、垂れ下がる変形を、生じにくい。高温加圧過程において、使用緩衝材シートが基板Ｓ上のチップＣを包埋するような過度の圧縮変形や垂れ下がる変形を生じてチップＣ周りに閉空間（基板ＳとチップＣと緩衝材シートとにより閉ざされた空間）が形成されると、焼結接合用材料層１１から揮発して逸出した成分が基板Ｓに対して沈着してしまう場合がある。このような沈着が生じると、沈着箇所を清浄化するための洗浄工程が別途必要となり、好ましくない。高温加圧過程を経る上述の焼結接合工程において過度の圧縮変形や垂れ下がる変形を生じにくい上述の緩衝材シート２０は、このような問題を回避するのに適するのである。
　以上のように、本実施形態に係る半導体装置製造方法は、基板Ｓに対して複数のチップＣを一括して焼結接合するのに適する。
　緩衝材シート２０における２５～３５０℃の重量減少率は、上述のように、好ましくは０.１％以下である。このような構成は、高温加熱過程を経る焼結接合工程において、緩衝材シート２０についてそのクッション機能などの機能を充分に発揮させるうえで好適である。
　本半導体装置製造方法における焼結接合工程では、複数の焼結接合ワークＸについて一括して焼結接合を行ってもよい。具体的には、図５に示すように、それぞれが複数のチップＣを伴う複数の焼結接合ワークＸと緩衝材シート２０とを重ねて一対のプレス面Ｐａ,Ｐａの間に挟持させた状態で、プレス面Ｐａ,Ｐａ間にて複数の焼結接合ワークＸをその厚さ方向ないし積層方向に加圧しつつ所定の高温加熱過程を経てもよい。焼結接合工程において緩衝材シート２０と重ねられる複数の焼結接合ワークＸは、例えば３行×３列の配列について図６に示すように、複数行かつ複数列に配列されたものであってもよい。このような焼結接合工程において、５～５０００μｍの厚さを有し且つ２～１５０ＭＰａの引張弾性率を有して複数の焼結接合ワークＸと重ねられる緩衝材シート２０は、基板Ｓの厚さを含む焼結接合ワークＸの厚さについて焼結接合ワークＸ間で差異がある場合にはその差異を、実質的に吸収して低減・解消するクッション機能を発揮しうる。このようなクッション機能の発揮により、当該焼結接合工程にて平行平板Ｐ,Ｐ間に挟持される複数の焼結接合ワークＸに作用する加圧力ないし荷重について、複数の焼結接合用材料層１１の間での均一化が図られる。
　本半導体装置製造方法における焼結接合工程では、図７（ａ）および図７（ｂ）に示すように、緩衝材シート２０を焼結接合ワークＸに対して基板Ｓの面Ｓｂ側に重ねてもよい。このような構成によっても、緩衝材シート２０のクッション機能の発揮により、平行平板Ｐ,Ｐ間に挟持される焼結接合ワークＸに作用する加圧力ないし荷重について、複数の焼結接合用材料層１１の間での均一化が図られる。
　本半導体装置製造方法における焼結接合工程では、図８に示すように、チップ配設側が下方に向けられた配向をとる焼結接合ワークＸに対してそのチップ配設側に緩衝材シート２０を重ねてもよい。このような構成によっても、緩衝材シート２０のクッション機能の発揮により、平行平板Ｐ,Ｐ間に挟持される焼結接合ワークＸに作用する加圧力ないし荷重について、複数の焼結接合用材料層１１の間での均一化が図られる。加えて、このような構成は、焼結接合用材料層１１由来成分の基板Ｓへの沈着を招く上述の閉空間の形成を回避するうえで、好適である。
　また、本半導体装置製造方法に使用される上述の緩衝材シート２０には、それを厚さ方向に貫通する複数の貫通孔が形成されていてもよい。このような構成は、焼結接合用材料層１１由来成分の基板Ｓへの沈着を招く上述の閉空間の形成を回避するうえで、好適である。
〔焼結接合用シートの作製〕
　焼結性粒子としての第１の銀粒子（平均粒径６０ｎｍ，ＤＯＷＡエレクトロニクス株式会社製）３５.８６質量部と、焼結性粒子としての第２の銀粒子（平均粒径１１００ｎｍ，三井金属鉱業株式会社製）２３.９０質量部と、熱分解性高分子バインダーとしてのポリカーボネート樹脂（商品名「ＱＰＡＣ４０」，重量平均分子量は１５００００，常温で固体，Empower Materials社製）０.８７質量部と、低沸点バインダーとしてのイソボルニルシクロヘキサノール（商品名「テルソルブＭＴＰＨ」，常温で液体，日本テルペン化学工業株式会社製）３.４７質量部と、溶剤としてのメチルエチルケトン ３５.９１質量部とを、ハイブリッドミキサー（商品名「ＨＭ－５００」，株式会社キーエンス製）をその撹拌モードで使用して混合し、ワニスを調製した。撹拌時間は３分間とした。そして、得られたワニスを、離型処理フィルム（商品名「ＭＲＡ５０」，三菱樹脂株式会社製）に塗布した後に乾燥させて、焼結接合用組成物の厚さ４０μｍのシート体を形成した。乾燥温度は１１０℃とし、乾燥時間は３分間とした。以上のようにして、焼結性粒子と、熱分解性高分子バインダーと、低沸点バインダーとを含む焼結接合用シートを作製した。
［実施例１］
　以下のような焼結接合用材料層付きシリコンチップの作製、当該チップの銅基板への仮固定による焼結接合ワークの作製、および当該ワークにおける一括焼結接合を行った。そして、焼結接合箇所についての観察を行った。
〔焼結接合用材料層付きシリコンチップの作製〕
　まず、平面電極（５ｍｍ角）を一方の面に有するシリコンチップ（５ｍｍ角，厚さ３５０μｍ）を用意した。平面電極は、シリコンチップ表面上のＴｉ層（厚さ５０ｎｍ）とその上のＡｕ層（厚さ１００ｎｍ）との積層構造を有する。次に、シリコンチップの平面電極に対し、圧着ロールを備えるラミネータを使用して焼結接合用シートを貼り合わせた。貼合せ温度は７０℃であり、貼合せ用の荷重（圧着ロールによる圧力）は０.３ＭＰａであり、圧着ロールの速度は１０ｍｍ/秒である。貼り合わせの後、焼結接合用シートにおいてシリコンチップの平面電極に圧着された部分を当該電極上に残して同シートにおける他の部分を取り除き、５ｍｍ角の焼結接合用材料層を片面に伴うシリコンチップを得た。このようにして、必要数の焼結接合用材料層付きシリコンチップを作製した。
〔焼結接合ワークの作製〕
　Ａｇ膜（厚さ５μｍ）で全体が覆われた銅板（厚さ３ｍｍ）に対し、二つの焼結接合用材料層付きシリコンチップをその焼結接合用材料層側にて圧着させて仮固定し、焼結接合ワークを得た。このようにして、二つの焼結接合ワークを作製した。
〔一括焼結接合〕
　加熱プレス用の一対の平行平板を備える焼結装置（商品名「ＨＴＭ－３０００」，伯東株式会社製）を使用して、複数の焼結接合ワークについて一括焼結接合を行った。具体的には、複数の焼結接合ワーク（それぞれ二つの焼結接合用材料層付き半導体チップが仮固定されている）とその上に重ねられた厚さ３０μｍの第１緩衝材シート（商品名「９００ＵＬ」，日東電工株式会社製）とを、一対の平行平板における一対のプレス面の間に挟持させた状態で、当該プレス面間にて焼結接合ワークをその積層方向に加圧しつつ加熱過程を経て、各焼結接合ワークにおける各焼結接合用材料層から焼結層を形成した。このような焼結接合工程において、加圧力は１０ＭＰａとした。加熱過程では、昇温速度１.５℃/秒で８０℃から３００℃まで昇温して、３００℃にて２.５分間保持した。その後、空冷によって１７０℃まで降温させ、そして水冷によって８０℃まで降温させた。水冷は、平行平板内に設けられている水冷機構によるものである。
〔焼結接合箇所の観察〕
　超音波映像装置（商品名「FineSAT FS200」，株式会社日立パワーソリューションズ製）を使用して、焼結接合ワークにおける各焼結接合箇所を観察した。各焼結接合ワークにおいて、二つのシリコンチップのそれぞれと銅基板との間に形成された各焼結層に接合不良（焼結層の周縁部が基板や半導体チップに接合していない状態）は見られなかった。その結果を表１に掲げる。
［実施例２］
　焼結接合工程において、厚さ３０μｍの第１緩衝材シートに代えて厚さ１００μｍの第２緩衝材シート（商品名「９００ＵＬ」，日東電工株式会社製）を使用したこと以外は、実施例１と同様にして、焼結接合用材料層付きシリコンチップの作製から一括焼結接合までを行い、且つ焼結接合箇所の観察を行った。各焼結接合ワークにおいて、二つのシリコンチップのそれぞれと銅基板との間に形成された各焼結層に接合不良（焼結層の周縁部が基板や半導体チップに接合していない状態）は見られなかった。その結果を表１に掲げる。
［実施例３］
　焼結接合工程において、厚さ３０μｍの第１緩衝材シートに代えて厚さ３０μｍの第３緩衝材シート（商品名「９２０ＵＬ」，日東電工株式会社製）を使用したこと以外は、実施例１と同様にして、焼結接合用材料層付きシリコンチップの作製から一括焼結接合までを行い、且つ焼結接合箇所の観察を行った。各焼結接合ワークにおいて、二つのシリコンチップのそれぞれと銅基板との間に形成された各焼結層に接合不良（焼結層の周縁部が基板や半導体チップに接合していない状態）は見られなかった。その結果を表１に掲げる。
［比較例１］
　焼結接合工程において緩衝材シートを使用しなかったこと以外は、実施例１と同様にして、焼結接合用材料層付きシリコンチップの作製から一括焼結接合までを行い、且つ焼結接合箇所の観察を行った。焼結接合ワークにおいて焼結層に接合不良（焼結層の周縁部が基板や半導体チップに接合していない状態）を生じるものがあった。その結果を表１に掲げる。
［比較例２］
　焼結接合工程において、厚さ３０μｍの第１緩衝材シートに代えて厚さ３０μｍの第４緩衝材シートを使用したこと以外は、実施例１と同様にして、焼結接合用材料層付きシリコンチップの作製から一括焼結接合までを行い、且つ焼結接合箇所の観察を行った。第４緩衝材シートは次のようにして作製した。
　まず、シラノール基を両末端に有する所定のポリジメチルシロキサン（数平均分子量１１５００）２０３１ｇと、ビニルトリメトキシシラン１５.７１ｇと、(３-グリシドキシプロピル)トリメトキシシラン２.８０ｇとを撹拌して混合物を得た。次に、この混合物について、縮合触媒である水酸化テトラメチルアンモニウムのメタノール溶液０.９７ｍＬ（濃度１０質量％，触媒含量０.８８ミリモル）を加えた後、４０℃にて１時間、撹拌した（縮合反応）。次に、こうして得られた組成物について４０℃の減圧下（１０ｍｍＨｇ）で１時間撹拌した。これにより、当該組成物中のメタノールなど揮発分を除去した。次に、常圧下において、当該組成物に、オルガノハイドロジェンシロキサン（信越化学工業株式会社製，ジメチルポリシロキサン－ｃｏ－メチルハイドロジェンポリシロキサン，平均分子量２０００）４４.５ｇを加えて４０℃にて１時間撹拌した後、付加触媒である白金－カルボニル錯体のシロキサン溶液（白金濃度２質量％）０.１３ｇを加えて４０℃にて１０分間撹拌した（付加反応）。これにより、熱硬化型シリコーン樹脂組成物を得た。次に、熱硬化型シリコーン樹脂組成物に対してポリメチルシルセスキオキサン微粒子（商品名「トスパール２０００Ｂ」，平均粒子径６.０μｍ，モメンティブ・パフォーマンス・マテリアルズ・ジャパン社製）を配合し（配合量は２０質量％）、当該組成物を室温（２５℃）にて１０分間撹拌した。撹拌後、当該組成物について、真空乾燥機を使用して室温で３０分以上脱泡した。こうして調製された緩衝材シート形成用の樹脂組成物を、離型シートとしてのポリエステルフィルム（商品名「ＳＳ４Ｃ」，厚み５０μｍ，ニッパ株式会社製）上に塗布した後、１３５℃にて９分間加熱した。これにより、厚さ３０μｍの半硬化状態のシリコーン樹脂シートを離型シート上に形成した。比較例２で使用した第４緩衝材シートは以上のようにして作製したものである。
［比較例３］
　焼結接合工程において、厚さ３０μｍの第１緩衝材シートに代えて厚さ３０μｍの第５緩衝材シート（商品名「９７００ＵＬ」，日東電工株式会社製）を使用したこと以外は、実施例１と同様にして、焼結接合用材料層付きシリコンチップの作製から一括焼結接合までを行い、且つ焼結接合箇所の観察を行った。焼結接合ワークにおいて焼結層に接合不良（焼結層の周縁部が基板や半導体チップに接合していない状態）を生じるものがあった。その結果を表１に掲げる。
〔緩衝材シートの引張弾性率〕
　実施例１～３および比較例１～３で使用した各緩衝材シートについて、引張弾性率を調べた。具体的には、同一組成の緩衝材シート試料片（幅１０ｍｍ×長さ４０ｍｍ×厚さ１００μｍ）について、引張試験機（商品名「オートグラフＡＧＳ-５０ＮＸ」，株式会社島津製作所製）を使用して、初期チャック間距離１０ｍｍ、２３℃および引張速度５０ｍｍ/分の条件で、引張試験を行った。そして、同試験の測定により得られた応力－歪み曲線における測定初期期間の立ち上がり直線部分の傾きから引張弾性率（ＭＰａ）を求めた。その結果を表１に掲げる。
〔緩衝材シートの耐熱性〕
　実施例１～３および比較例１～３で使用した各緩衝材シートについて、耐熱性を調べた。その結果を表１に掲げる。具体的には、緩衝材シートから約１０ｍｇの試料を切り出し、この試料について、示差熱－熱重量同時測定装置（商品名「示差熱天秤 TG-DTA TG8120」，株式会社リガク製）を使用して、昇温過程での重量減少を測定した。本測定は、大気雰囲気下、基準重量温度である２５℃から５００℃まで昇温速度１０℃/分にて昇温を行った。試料における２５℃での重量（基準重量）から３５０℃での重量への減少率（％）を表１に掲げる。
〔一括焼結接合における作業性〕
　比較例２で使用した第４緩衝材シートは、焼結接合工程を進めるにあたり、柔らかすぎて焼結接合ワーク上に重ね合わせるのが困難であった。これに対し、他の緩衝材シートでは、そのような問題を生じなかった。その結果を表１に掲げる。
〔チップダメージの観察〕
　比較例１,３では、一括焼結を経た焼結接合ワークにおいて割れや欠けの生じているシリコンチップがあった。実施例１～３および比較例２では、そのような割れや欠けは生じなかった。その結果を表１に掲げる。
Figure JPOXMLDOC01-appb-T000001
　以上のまとめとして、本発明の構成およびそのバリエーションを以下に付記として列挙する。
〔付記１〕
　第１面およびこれとは反対の第２面を有する基板、前記第１面側に配され且つ接合されることとなる複数の半導体チップ、および、各半導体チップと前記基板との間にそれぞれが介在する焼結性粒子含有の複数の焼結接合用材料層、を含む積層構成を有する焼結接合ワークを用意する工程と、
　厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シートおよび前記焼結接合ワークを重ねて一対のプレス面の間に挟持させた状態で、当該一対のプレス面間にて前記焼結接合ワークをその積層方向に加圧しつつ加熱過程を経ることにより、前記焼結接合用材料層から焼結層を形成する、焼結接合工程と、を含む半導体装置製造方法。
〔付記２〕
　前記緩衝材シートの前記厚さは、１０μｍ以上であり、好ましくは２０μｍ以上であり、より好ましくは３０μｍ以上である、付記１に記載の半導体装置製造方法。
〔付記３〕
　前記緩衝材シートの前記厚さは、３０００μｍ以下であり、好ましくは１５００μｍ以下、より好ましくは１０００μｍ以下、より好ましくは５００μｍ以下である、付記１または２に記載の半導体装置製造方法。
〔付記４〕
　前記緩衝材シートの前記引張弾性率は、５ＭＰａ以上であり、好ましくは１５ＭＰａ以上、より好ましくは３０ＭＰａ以上である、付記１から３のいずれか一つに記載の半導体装置製造方法。
〔付記５〕
　前記緩衝材シートの前記引張弾性率は、１２０ＭＰａ以下であり、好ましくは１００ＭＰａ以下である、付記１から４のいずれか一つに記載の半導体装置製造方法。
〔付記６〕
　前記緩衝材シートは、大気雰囲気下、基準重量温度２５℃、および昇温速度１０℃/分の条件での重量減少測定における３５０℃での重量減少率が０.１％以下である、付記１から５のいずれか一つに記載の半導体装置製造方法。
〔付記７〕
　前記焼結接合工程における加熱温度は２００℃以上であり且つ加圧力は５ＭＰａ以上である、付記１から６のいずれか一つに記載の半導体装置製造方法。
〔付記８〕
　前記焼結性粒子は、銀粒子、銅粒子、酸化銀粒子、および酸化銅粒子からなる群より選択される少なくとも一種を含む、付記１から７のいずれか一つに記載の半導体装置製造方法。
〔付記９〕
　前記焼結接合用材料層における前記焼結性粒子の含有割合は、６０～９９質量％であり、好ましくは６５～９８質量％、より好ましくは７０～９７質量％である、付記１から８のいずれか一つに記載の半導体装置製造方法。
〔付記１０〕
　前記焼結層の厚さは、５～２００μｍであり、好ましくは１０～１５０μｍである、付記１から９のいずれか一つに記載の半導体装置製造方法。
Ｘ　　焼結接合ワーク
Ｓ　　基板
Ｃ　　チップ（半導体チップ）
１０　焼結接合用シート
１１　焼結接合用材料層
１２　焼結層
２０　緩衝材シート
Ｐａ　プレス面

Claims (6)

  1. 　第１面およびこれとは反対の第２面を有する基板、前記第１面側に配され且つ接合されることとなる複数の半導体チップ、および、各半導体チップと前記基板との間にそれぞれが介在する焼結性粒子含有の複数の焼結接合用材料層、を含む積層構成を有する焼結接合ワークを用意する工程と、
    　厚さ５～５０００μｍかつ引張弾性率２～１５０ＭＰａの緩衝材シートおよび前記焼結接合ワークを重ねて一対のプレス面の間に挟持させた状態で、当該一対のプレス面間にて前記焼結接合ワークをその積層方向に加圧しつつ加熱過程を経ることにより、前記焼結接合用材料層から焼結層を形成する、焼結接合工程と、を含む半導体装置製造方法。
  2. 　前記緩衝材シートは、大気雰囲気下、基準重量温度２５℃、および昇温速度１０℃/分の条件での重量減少測定における３５０℃での重量減少率が０.１％以下である、請求項１に記載の半導体装置製造方法。
  3. 　前記焼結接合工程における加熱温度は２００℃以上であり且つ加圧力は５ＭＰａ以上である、請求項１または２に記載の半導体装置製造方法。
  4. 　前記焼結性粒子は、銀粒子、銅粒子、酸化銀粒子、および酸化銅粒子からなる群より選択される少なくとも一種を含む、請求項１から３のいずれか一つに記載の半導体装置製造方法。
  5. 　前記焼結接合用材料層における前記焼結性粒子の含有割合は６０～９９質量％である、請求項１から４のいずれか一つに記載の半導体装置製造方法。
  6. 　前記焼結層の厚さは５～２００μｍである、請求項１から５のいずれか一つに記載の半導体装置製造方法。
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TW201945113A (zh) 2019-12-01
US11594513B2 (en) 2023-02-28
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