WO2016192313A1 - 显示面板的驱动方法及驱动模块、显示面板及显示装置 - Google Patents
显示面板的驱动方法及驱动模块、显示面板及显示装置 Download PDFInfo
- Publication number
- WO2016192313A1 WO2016192313A1 PCT/CN2015/094428 CN2015094428W WO2016192313A1 WO 2016192313 A1 WO2016192313 A1 WO 2016192313A1 CN 2015094428 W CN2015094428 W CN 2015094428W WO 2016192313 A1 WO2016192313 A1 WO 2016192313A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- bias current
- gate line
- scanned
- current value
- display panel
- Prior art date
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0408—Integration of the drivers onto the display substrate
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD
Definitions
- the present disclosure relates to a driving method of a display panel, a driving module, a display panel, and a display device.
- the gate driver is integrated on the array substrate (Gate driver On Array, English abbreviation: GOA) technology refers to integrating the gate driving circuit on the array substrate of the display panel.
- the GOA circuit includes cascaded GOA units that correspond to different gate lines. A driving signal of the GOA unit for driving the GOA unit to gate and/or scan the corresponding gate line.
- the drive signal of the GOA unit often has a certain phase delay when transmitted to the GOA unit.
- Increasing the bias current of the drive signal of the GOA unit can reduce the phase delay. Therefore, by adjusting the magnitude of the bias current, the phase delay can be controlled below the threshold.
- the inventors have found through experiments that when scanning the gate line close to the source driving circuit, since the phase delay is small, only a small bias current is required to ensure the normal display of the display panel, if unified according to the maximum phase delay. Setting the bias current can result in wasted power.
- Embodiments of the present disclosure provide a driving method of a display panel, a driving module, a display panel, and a display device, which can reduce power consumption of the display panel.
- a driving method of a display panel including a GOA circuit and an L-row gate line, the GOA circuit providing a gate driving signal to the L-row gate line, L is a positive integer, and the method includes:
- the position of the gate line to be scanned is a line number of the gate line to be scanned
- each row number of the L row gate lines corresponds to a bias current value.
- a bias current value corresponding to each of the row numbers is linear with a distance between a gate line and a source driving circuit of the row number.
- the gate lines including at least one set of consecutive preset line numbers in the L row gate lines correspond to the same bias current value, wherein the preset line number is less than L.
- determining the bias current value according to the position of the to-be-scanned gate line includes:
- a bias current value corresponding to the position of the gate line to be scanned is calculated.
- the driving signal of the GOA unit includes at least one clock driving signal; when the GOA unit corresponding to the to-be-scanned gate line is a first-level GOA unit, the driving signal of the GOA unit further includes a frame Start signal STV.
- a driving module of a display panel including a GOA circuit and an L-row gate line, the GOA circuit providing a gate driving signal to the L-row gate line, L is a positive integer, wherein the driving module includes:
- timing control unit configured to determine a position of the gate line to be scanned
- a bias current control unit configured to determine a bias current value according to a position of the gate line to be scanned
- a level converting unit configured to generate a driving signal of the GOA unit corresponding to the to-be-scanned gate line according to the bias current value and a clock signal of the display panel.
- the position of the gate line to be scanned is a line number of the gate line to be scanned
- the bias current control unit may be configured to search a bias current configuration list according to a row number of the gate line to be scanned, and determine a bias current value corresponding to a row number of the gate line to be scanned.
- each row number of the L row gate lines corresponds to a bias current value.
- a bias current value corresponding to each of the row numbers is linear with a distance between a gate line and a source driving circuit of the row number.
- the L-row gate line includes at least one set of consecutive preset line numbers corresponding to the same bias current value, wherein the preset line number is less than L.
- the bias current control unit may be configured to calculate and calculate by using a preset formula The value of the bias current corresponding to the position of the gate line to be scanned.
- a display panel including the above-described driving module is provided.
- a display device including the above display panel is provided.
- the driving method of the display panel determines the bias current value according to the position of the gate line to be scanned by determining the position of the gate line to be scanned, and further generates a standby signal according to the bias current and the clock signal of the display panel.
- the driving signal of the GOA unit corresponding to the gate line is scanned to complete the scanning of the gate line to be scanned.
- the bias current value is determined according to the position of the gate line to be scanned, and the magnitude of the bias current value only needs to ensure that the display panel is normally displayed when scanning the scan gate line to be scanned, thereby significantly reducing the display panel. Power consumption.
- 1 is a schematic diagram of a phase delay caused by a panel load on a driving signal of a GOA unit
- FIG. 2 is a schematic flow chart of a driving method of a display panel provided in an embodiment of the present disclosure
- FIG. 3 is a schematic flow chart of a driving method of a display panel according to another embodiment of the present disclosure.
- FIG. 4 is a schematic diagram showing a relationship between a bias current value corresponding to a gate line and a line number
- FIG. 5 is a schematic diagram showing a variation of a bias voltage of a driving signal of a GOA unit with a clock signal of a display panel;
- FIG. 6 is a schematic structural diagram of a driving module of a display panel provided in another embodiment of the present disclosure.
- FIG. 1 shows a schematic diagram of the phase delay caused by the panel load to the drive signal of the GOA unit.
- the phase delay caused by the panel load to the driving signals of the GOA unit is not the same.
- the driving signals of the GOA units corresponding to the three gate lines of Ga, Gb and Gc, the distances of Ga, Gb and Gc and the source driving circuit are sequentially increased, and the driving signals of the corresponding GOA units are output with respect to the source driving circuit.
- the phase delay of the data signal Data also increases in sequence. That is, when scanning the gate line close to the source driving circuit, the phase delay is small, and when scanning the gate line away from the source driving circuit, the phase delay is large.
- a uniform bias current is set for the driving signals of different GOA units, and the value of the bias current value needs to ensure that the maximum phase delay is less than the threshold.
- FIG. 2 is a flow chart showing a driving method of a display panel provided in an embodiment of the present disclosure.
- the driving method of the display panel includes the following steps:
- step 201 the position of the gate line to be scanned is determined.
- the display panel includes L rows of gate lines, L is a positive integer, and the specific value of L depends on the resolution of the display panel. For example, for a vertical screen extended width display array (English full name: Wide Extended Graphics Array, abbreviation: WXGA) panel with a resolution of 800 ⁇ 1280, L is equal to 1280, indicating that the display panel has 1280 rows of grid lines.
- WXGA Wide Extended Graphics Array
- the display panel also includes a GOA circuit for providing a gate drive signal for the L row gate lines.
- the GOA circuit scans the L-row raster lines progressively by the gate drive signal. In one scan cycle, each row in the L row gate line needs to be scanned once.
- the gate line to be scanned may be any one of the L row gate lines. Therefore, the position of the gate line to be scanned is constantly changing during the scanning process.
- step 202 a bias current value is determined according to the position of the gate line to be scanned.
- the bias current in the embodiment of the present disclosure refers to the bias current of the driving signal of the GOA unit.
- the GOA circuit can include cascaded GOA units with different gate lines on the display panel corresponding to different GOA units.
- the driving signal of the GOA unit is used to drive the GOA unit to output a gate driving signal to gate and/or scan the gate line to be scanned.
- the bias current value is related to the position of the gate line to be scanned.
- the magnitudes of the bias currents corresponding to different gate lines may be unequal or equal.
- the magnitude of the bias current value remains constant for a certain period of time, during which the gate lines scanned are equal in magnitude to the bias current values.
- the bias current value jumps once after a certain period of time, then the gate line scanned after the bias current value jumps, and the bias current corresponding to the gate line scanned before the bias current value jumps Values are not equal in size.
- step 203 a driving signal of the GOA unit corresponding to the gate line to be scanned is generated according to the bias current value and the clock signal of the display panel.
- the drive signal of the GOA unit is synchronized with the clock signal of the display panel during one scan period.
- the GOA unit corresponding to the scan gate line After determining the bias current value according to the position of the gate line to be scanned, generating a driving signal of the GOA unit corresponding to the gate line to be scanned according to the bias current value, and synchronously outputting the driving signal of the GOA unit and the clock signal of the display panel,
- the GOA unit corresponding to the scan gate line outputs a gate drive signal to strobe the gate line to be scanned, and scans the scan gate line.
- the driving method of the display panel determines the bias current value according to the position of the gate line to be scanned by determining the position of the gate line to be scanned, and further according to the bias current value and the clock signal of the display panel A driving signal of the GOA unit corresponding to the gate line to be scanned is generated to complete scanning of the gate line to be scanned.
- the same bias current value is arranged for the L-row gate lines. In fact, when the gate lines are not in the same position, the required bias current values are not exactly the same. In order to ensure that the display panel is normally displayed when scanning all the gate lines, the bias current value that is generally configured is often obtained by taking the maximum value of the bias current values actually required for each gate line.
- the bias current value is determined according to the position of the gate line to be scanned, and the magnitude of the bias current value only needs to ensure that the display panel is normally displayed when scanning the scan gate line to be scanned, thereby significantly reducing the display panel. Power consumption.
- FIG. 3 is a schematic flow chart showing a driving method of a display panel in another embodiment of the present disclosure.
- the driving method of the display panel includes the following steps:
- step 301 the position of the gate line to be scanned is determined according to the row number of the gate line to be scanned.
- the gate line to be scanned may be any one of the L row gate lines. Therefore, the position of the gate line to be scanned is constantly changing during the scanning process.
- the position of the gate line to be scanned is the row number of the gate line to be scanned. For example, a vertical screen WXGA panel with a resolution of 800 ⁇ 1280, the display panel includes 1280 rows of gate lines, and the row numbers are: G1, G2, ... G1280, wherein the gate lines with larger distances between the source drive circuits correspond to The larger the line number.
- the gate lines are scanned in a scan cycle according to the row number from small to large, and the frame start signal (English full name: Start Vertical, abbreviated: STV) appears to be scanned.
- the line number of the gate line is 1.
- the line number of the gate line to be scanned is increased by one every time a Clock Pulse Vertical (CPV) cycle is passed.
- CPV Clock Pulse Vertical
- step 302 the bias current value is determined according to the row number of the gate line to be scanned.
- the bias current value is related to the position of the gate line to be scanned, and the position of each gate line to be scanned corresponds to a bias current value.
- This embodiment combines two specific application scenarios, and the specific correspondence between the position of the scanning gate line and the bias current value and the process of determining the bias current value are illustrated.
- the bias current configuration list is searched according to the row number of the gate line to be scanned, and the bias current value corresponding to the row number of the gate line to be scanned is determined.
- each row number of the L row gate line corresponds to a bias current value.
- the magnitude of the bias current value can be configured as 16 blocks, and each block is represented by a hexadecimal code between 00h and 0Fh in order of small to large.
- the actually configured bias current value may include some or all of the above 16 gears.
- the bias current value corresponding to each row number is linear with the distance between the gate line and the source driving circuit of the row number.
- the linear relationship referred to here includes a one-time functional relationship.
- the slope of the primary function can be zero.
- Fig. 4 is a view showing a relationship between a bias current value corresponding to a gate line and a line number.
- the bias current value remains unchanged for a period of one scan period, and jumps once after a predetermined length of time has elapsed.
- the display panel includes L row gate lines, and the row numbers are: G1, G2, ... GL.
- the gate line having a larger distance from the source driving circuit has a larger row number.
- bias current value is required to ensure that the display panel is normally displayed, so that for any two adjacent gate lines Gn and Gn+1, Gn+1 corresponds to
- the bias current value is greater than or equal to the bias current value corresponding to Gn.
- the value of the bias current is actually divided into three files, namely I1, I2 and I3, where I1, I2 and I3 are values between 00h-0Fh, representing a value of the bias current. And I1 ⁇ I2 ⁇ I3.
- the L-row gate line includes at least one set of consecutive preset line numbers corresponding to the same bias current value, wherein the preset line number is less than L.
- the L row gate lines are divided into a number of groups, wherein each group includes consecutive preset line numbers of gate lines, and the number of consecutive gate lines included in different groups may be the same or different. It can be understood that if the preset line number is 1, the gate lines of consecutive preset line numbers refer only to one row of gate lines.
- Table 1 below is an example of a list of bias current configurations.
- the value of L is 1280, and the 1280-row raster line is divided into 6 groups. 6 groups correspond to 6 files of bias current, respectively 00h, 03h, 06h, 09h, 0Ch and 0Fh.
- the larger the packet with the larger row number the larger the bias current value.
- the phase delay caused by the panel load on the driving signal of the GOA unit increases, and the bias current value is increased stepwise.
- the phase delay of the driving signals of different GOA units can be controlled within a certain range.
- the L-row raster lines can be divided into more or less packets, for example, only two packets, or 16 packets, and the maximum number of packets is the number of bias current configurable values.
- the bias current configuration list is set, and in one scan period, the row number of the gate line to be scanned is determined, and the bias current configuration list is searched according to the row number. A bias current value corresponding to the row number of the gate line to be scanned is determined.
- the bias current value corresponding to the gate line to be scanned is calculated by using a preset formula.
- the preset formula is a function of the bias current I with respect to the row number Gn of the gate line to be scanned.
- the corresponding bias current value can be determined according to the row number thereof.
- step 303 a driving signal of the GOA unit corresponding to the gate line to be scanned is generated according to the bias current value and the clock signal of the display panel.
- the position of the gate line to be scanned changes synchronously with the clock signal of the display panel, and the driving signal of the GOA unit is also synchronized with the clock signal of the display panel.
- the scanning order of the L gate lines may be from small to large, from large to small, or from the middle to the two sides, etc., this implementation For example, the scanning sequence according to the line number from small to large is taken as an example for description.
- a driving signal of the GOA unit corresponding to the gate line to be scanned is generated according to the bias current value, and the driving signal of the GOA unit is synchronously output with the clock signal of the display panel.
- FIG. 5 is a diagram showing changes in the bias electric value of the driving signal of the GOA unit as a function of the clock signal of the display panel.
- Schematic diagram of the change in CLK In Fig. 5, the abscissa is time, the figure is denoted by t, and the ordinate is bias current, which is denoted by i. In Fig. 5, the time interval between two STVs is one scanning period T.
- the bias current value jumps once after a certain period of time, and gradually increases from the minimum value 00h to the maximum value 0Fh.
- the time interval between the two hops may be the same or different, and the embodiment of the present disclosure does not limit this.
- the driving signal of the GOA unit outputted in synchronization with the clock signal of the display panel drives the GOA unit corresponding to the scanning gate line to output a gate driving signal to strobe the gate line to be scanned and scan the scanning gate line.
- the drive signal of the GOA unit includes at least one clock drive signal.
- the driving signal of the GOA unit further includes an STV.
- the driving method of the display panel determines the bias current value according to the position of the gate line to be scanned by determining the position of the gate line to be scanned, and further generates the bias current value according to the bias current value and the clock signal of the display panel.
- the same bias current value is arranged for the L-row gate lines. In fact, when the position of the gate line is different, the required bias current value is not exactly the same.
- the bias current value that is generally configured is It is often obtained by taking the maximum value of the bias current values actually required for each gate line. For a gate line that requires only a small bias current to ensure normal display, if the configured bias current value is too large, power is wasted.
- the bias current value is determined according to the position of the gate line to be scanned, and the magnitude of the bias current value only needs to ensure that the display panel is normally displayed when scanning the scan gate line to be scanned, thereby reducing the work of the display panel. Consumption.
- FIG. 6 is a schematic structural diagram of a driving module of a display panel provided in another embodiment of the present disclosure.
- the driving module of the display panel as shown in FIG. 6 can be used to execute the driving method of the display panel described in the above embodiments.
- the driving module 60 includes:
- the timing control unit 601 is configured to determine the position of the gate line to be scanned.
- the bias current control unit 602 is configured to determine a bias current value according to a position of the gate line to be scanned.
- the level converting unit 603 is configured to generate a driving signal of the GOA unit corresponding to the gate line to be scanned according to the bias current value and the clock signal of the display panel.
- driver module processor 601 of the display panel may be a central processing unit (CPU) or an application specific integrated circuit (ASIC).
- CPU central processing unit
- ASIC application specific integrated circuit
- one or more integrated circuits configured to implement the embodiments of the present disclosure, and the functions described in the embodiments of the present disclosure may be implemented by a combination of hardware and software.
- the driving module of the display panel determines the bias current value according to the position of the gate line to be scanned, and further generates the driving of the GOA unit corresponding to the gate line to be scanned according to the bias current and the clock signal of the display panel.
- the signal is used to complete the scanning of the gate line to be scanned, and the power consumption of the display panel is reduced compared to the prior art driving method of configuring the same bias current for the L row gate line.
- the position of the gate line to be scanned is the row number of the gate line to be scanned.
- the bias current control unit 602 can be used, for example, to look up the bias current configuration list according to the row number of the gate line to be scanned, and determine a bias current value corresponding to the row number of the gate line to be scanned.
- each row number of the L row gate lines corresponds to a bias current value.
- the bias current value corresponding to each row number is linear with the distance between the gate line of the row number and the source driving circuit.
- the L-row gate line includes at least one set of consecutive preset line number gate lines corresponding to the same bias current value, wherein the preset line number is less than L.
- the bias current control unit 602 can also be used, for example, to calculate a bias current value corresponding to the position of the gate line to be scanned by a preset formula.
- the driving module of the display panel determines the bias current value according to the position of the gate line to be scanned by determining the position of the gate line to be scanned, and further generates a standby signal according to the bias current and the clock signal of the display panel.
- the driving signal of the GOA unit corresponding to the gate line is scanned to complete the scanning of the gate line to be scanned.
- the same bias current value is arranged for the L-row gate lines. In fact, when the gate lines are in different positions, the required bias current values are not exactly the same. To ensure that the display panel is normally displayed when scanning all the gate lines, the bias current is generally configured.
- the value is often obtained by taking the maximum value of the bias current value actually required for each gate line, and for the gate line which only needs a small bias current value to ensure normal display, if the configured bias current value is too large , causing power wastage.
- the bias current value is determined according to the position of the gate line to be scanned, and the magnitude of the bias current value only needs to ensure that the display panel is normally displayed when scanning the scan gate line to be scanned, thereby significantly reducing the display panel. Power consumption.
- Embodiments of the present disclosure also provide a display panel including the drive module as described above. Further, an embodiment of the present disclosure provides a display device including the above display panel, which may be an electronic paper, a mobile phone, a television, a digital photo frame, or the like.
- the corresponding bias current can be determined according to the position of the gate line to be scanned, and the driving signal of the GOA unit corresponding to the gate line to be scanned is generated according to the bias current and the clock signal of the display panel, and the driving signal of the GOA unit and the display panel are The clock signal is synchronized to output, which reduces power consumption compared to the prior art method of configuring the same bias current for all gate lines.
- Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
- a storage medium may be any available media that can be accessed by a computer.
- the computer readable medium may include a RAM (Random Access Memory), a ROM (Read Only Memory), and an EEPROM (Electrically Erasable Programmable Read Only Memory).
- CD-ROM Compact Disc Read Only Memory
- CD-ROM Compact Disc Read Only Memory
- other optical disk storage disk storage media or other magnetic storage device, or can be used to carry or store a desired program in the form of an instruction or data structure.
- the disc and the disc include a CD (Compact Disc), a laser disc, a compact disc, a DVD disc (Digital Versatile Disc), a floppy disc, and a Blu-ray disc, wherein the disc is usually magnetically copied, The disc uses a laser to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
行号 | 偏置电流值 |
(G1,……G239) | 00h |
(G240,……G479) | 03h |
(G480,……G719) | 06h |
(G720,……G959) | 09h |
(G960,……G1279) | 0Ch |
(G1280) | 0Fh |
Claims (15)
- 一种显示面板的驱动方法,所述显示面板包括GOA电路和L行栅线,所述GOA电路向所述L行栅线提供栅极驱动信号,所述L为正整数,所述方法包括:确定待扫描栅线的位置;根据所述待扫描栅线的位置确定偏置电流值;根据所述偏置电流值及所述显示面板的时钟信号生成待扫描栅线对应的GOA单元的驱动信号。
- 根据权利要求1所述的方法,其中,所述待扫描栅线的位置为所述待扫描栅线的行号;根据所述待扫描栅线的行号查找偏置电流配置列表,确定与所述待扫描栅线的行号对应的偏置电流值。
- 根据权利要求2所述的方法,其中,所述偏置电流配置列表中,所述L行栅线的每一个行号对应一个偏置电流值。
- 根据权利要求3所述的方法,其中,所述偏置电流配置列表中,每个所述行号对应的偏置电流值与所述行号的栅线和源极驱动电路之间的距离呈线性关系。
- 根据权利要求4所述的方法,其中,所述L行栅线中包括至少一组连续的预设行号的栅线对应同一偏置电流值,其中预设行号小于L。
- 根据权利要求1所述的方法,其中,所述根据所述待扫描栅线的位置确定偏置电流值,包括:通过预设公式,计算得到与所述待扫描栅线的位置所对应的偏置电流值。
- 根据权利要求1所述的方法,其中,所述GOA单元的驱动信号包括至少一个时钟驱动信号;当所述待扫描栅线对应的所述GOA单元为第一级GOA单元时,所述GOA单元的驱动信号还包括帧起始信号STV。
- 一种显示面板的驱动模块,所述显示面板包括GOA电路和L行栅线,所述GOA电路向所述L行栅线提供栅极驱动信号,所述L为正整数,所述驱动 模块包括:时序控制单元,用于确定待扫描栅线的位置;偏置电流控制单元,用于根据所述待扫描栅线的位置确定偏置电流值;电平转换单元,用于根据所述偏置电流值及所述显示面板的时钟信号生成所述待扫描栅线对应的GOA单元的驱动信号。
- 根据权利要求8所述的驱动模块,其中,所述待扫描栅线的位置为所述待扫描栅线的行号;所述偏置电流控制单元根据所述待扫描栅线的行号查找偏置电流配置列表,确定与所述待扫描栅线的行号对应的偏置电流值。
- 根据权利要求9所述的驱动模块,其中,所述偏置电流配置列表中,所述L行栅线的每一个行号对应一个偏置电流值。
- 根据权利要求10所述的驱动模块,其中,所述偏置电流配置列表中,每个所述行号对应的偏置电流值与所述行号的栅线和源极驱动电路的距离呈线性关系。
- 根据权利要求8所述的驱动模块,其中,所述L行栅线包括至少一组连续的预设行号的栅线对应同一偏置电流值,其中所述预设行号小于L。
- 根据权利要求8所述的驱动模块,其中,所述偏置电流控制单元通过预设公式,计算得到与所述待扫描栅线的位置所对应的偏置电流值。
- 一种显示面板,包括如权利要求8-13任一项所述的驱动模块。
- 一种显示装置,包括如权利要求14所述的显示面板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/126,892 US10109257B2 (en) | 2015-05-29 | 2015-11-12 | Driving method of display panel and driving module, display panel and display apparatus |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510292713.4A CN104851384B (zh) | 2015-05-29 | 2015-05-29 | 显示面板的驱动方法及驱动模块、显示面板及显示装置 |
CN201510292713.4 | 2015-05-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2016192313A1 true WO2016192313A1 (zh) | 2016-12-08 |
Family
ID=53850996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2015/094428 WO2016192313A1 (zh) | 2015-05-29 | 2015-11-12 | 显示面板的驱动方法及驱动模块、显示面板及显示装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10109257B2 (zh) |
CN (1) | CN104851384B (zh) |
WO (1) | WO2016192313A1 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104851384B (zh) | 2015-05-29 | 2018-04-20 | 合肥京东方光电科技有限公司 | 显示面板的驱动方法及驱动模块、显示面板及显示装置 |
CN105118452A (zh) * | 2015-08-20 | 2015-12-02 | 京东方科技集团股份有限公司 | 栅极驱动方法和结构 |
CN110517617A (zh) * | 2018-05-22 | 2019-11-29 | 上海和辉光电有限公司 | 一种像素阵列控制方法及显示面板 |
CN109166516A (zh) * | 2018-11-12 | 2019-01-08 | 京东方科技集团股份有限公司 | 驱动单元、显示面板及其驱动方法和显示装置 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030160753A1 (en) * | 2002-02-11 | 2003-08-28 | Mccartney Richard I. | Display line drivers and method for signal propagation delay compensation |
US20100128019A1 (en) * | 2008-11-25 | 2010-05-27 | Kabushiki Kaisha Toshiba | Liquid crystal display device |
CN102982775A (zh) * | 2012-10-31 | 2013-03-20 | 合肥京东方光电科技有限公司 | 驱动电压提供装置、方法及显示装置 |
CN103426409A (zh) * | 2012-05-15 | 2013-12-04 | 联咏科技股份有限公司 | 显示驱动装置及显示面板的驱动方法 |
CN104036740A (zh) * | 2014-05-16 | 2014-09-10 | 京东方科技集团股份有限公司 | 栅极驱动电路的控制电路、工作方法和显示装置 |
CN104851384A (zh) * | 2015-05-29 | 2015-08-19 | 合肥京东方光电科技有限公司 | 显示面板的驱动方法及驱动模块、显示面板及显示装置 |
CN105118452A (zh) * | 2015-08-20 | 2015-12-02 | 京东方科技集团股份有限公司 | 栅极驱动方法和结构 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100674919B1 (ko) * | 2004-11-06 | 2007-01-26 | 삼성전자주식회사 | 팬-아웃 라인 저항에 무관하게 개선된 화질을 제공하는lcd용 게이트 구동 집적 회로 |
US7830351B2 (en) * | 2005-10-11 | 2010-11-09 | Au Optronics Corporation | LCD gate driver circuitry having adjustable current driving capacity |
US8411006B2 (en) * | 2005-11-04 | 2013-04-02 | Sharp Kabushiki Kaisha | Display device including scan signal line driving circuits connected via signal wiring |
CN201725544U (zh) | 2010-01-21 | 2011-01-26 | 新相微电子(上海)有限公司 | 用于液晶显示栅极驱动芯片的低功耗驱动电路 |
CN102467891B (zh) | 2010-10-29 | 2013-10-09 | 京东方科技集团股份有限公司 | 移位寄存器单元、栅极驱动装置及液晶显示器 |
CN102411946A (zh) | 2011-11-01 | 2012-04-11 | 张锦堂 | 越南数字邮票 |
TWI438751B (zh) * | 2011-11-18 | 2014-05-21 | Au Optronics Corp | 閘極驅動電路及其閘極驅動方法 |
CN102881254B (zh) * | 2012-09-28 | 2015-07-15 | 昆山工研院新型平板显示技术中心有限公司 | 一种改善画质的驱动***及其驱动方法 |
KR102115530B1 (ko) * | 2012-12-12 | 2020-05-27 | 삼성디스플레이 주식회사 | 표시 장치 및 그 구동 방법 |
CN104376825B (zh) * | 2014-11-20 | 2017-02-22 | 深圳市华星光电技术有限公司 | 一种移位寄存器单元、栅极驱动电路及显示装置 |
KR102271628B1 (ko) * | 2014-12-04 | 2021-07-02 | 삼성디스플레이 주식회사 | 표시 패널의 구동 방법 및 이를 수행하기 위한 표시 장치 |
CN104361878B (zh) * | 2014-12-10 | 2017-01-18 | 京东方科技集团股份有限公司 | 一种显示面板、其驱动方法及显示装置 |
-
2015
- 2015-05-29 CN CN201510292713.4A patent/CN104851384B/zh active Active
- 2015-11-12 US US15/126,892 patent/US10109257B2/en active Active
- 2015-11-12 WO PCT/CN2015/094428 patent/WO2016192313A1/zh active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030160753A1 (en) * | 2002-02-11 | 2003-08-28 | Mccartney Richard I. | Display line drivers and method for signal propagation delay compensation |
US20100128019A1 (en) * | 2008-11-25 | 2010-05-27 | Kabushiki Kaisha Toshiba | Liquid crystal display device |
CN103426409A (zh) * | 2012-05-15 | 2013-12-04 | 联咏科技股份有限公司 | 显示驱动装置及显示面板的驱动方法 |
CN102982775A (zh) * | 2012-10-31 | 2013-03-20 | 合肥京东方光电科技有限公司 | 驱动电压提供装置、方法及显示装置 |
CN104036740A (zh) * | 2014-05-16 | 2014-09-10 | 京东方科技集团股份有限公司 | 栅极驱动电路的控制电路、工作方法和显示装置 |
CN104851384A (zh) * | 2015-05-29 | 2015-08-19 | 合肥京东方光电科技有限公司 | 显示面板的驱动方法及驱动模块、显示面板及显示装置 |
CN105118452A (zh) * | 2015-08-20 | 2015-12-02 | 京东方科技集团股份有限公司 | 栅极驱动方法和结构 |
Also Published As
Publication number | Publication date |
---|---|
US10109257B2 (en) | 2018-10-23 |
US20180033393A1 (en) | 2018-02-01 |
CN104851384B (zh) | 2018-04-20 |
CN104851384A (zh) | 2015-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2016192313A1 (zh) | 显示面板的驱动方法及驱动模块、显示面板及显示装置 | |
CN109859696B (zh) | 同步背光装置及其操作方法 | |
TWI567608B (zh) | 顯示裝置、顯示裝置之驅動方法及其驅動裝置 | |
US9293223B2 (en) | Shift register unit, gate driving circuit and display device | |
WO2014139199A1 (zh) | 过驱动方法、电路、显示面板和显示装置 | |
JP2007041258A (ja) | 画像表示装置およびタイミングコントローラ | |
TWI277052B (en) | Liquid crystal display device | |
WO2017012296A1 (zh) | 触摸显示驱动方法及装置、显示装置和应用处理器 | |
TWI714334B (zh) | 控制裝置、顯示裝置及其操作方法 | |
TW201937468A (zh) | 顯示裝置及其閘極驅動器 | |
WO2018023831A1 (zh) | 寄生电容的消除方法以及装置 | |
JP2009180989A (ja) | 液晶表示装置および液晶表示装置の駆動方法 | |
WO2019061875A1 (zh) | 一种电平转化器的时钟输入信号异常的处理方法 | |
TWI484466B (zh) | 顯示面板的驅動方法 | |
JP5549610B2 (ja) | 液晶表示装置 | |
KR20160047678A (ko) | 데이터 인에이블 신호 생성 방법, 타이밍 컨트롤러 및 표시장치 | |
US9946101B2 (en) | Gate driver control circuit | |
US8730222B2 (en) | Display capable of improving frame quality and method thereof | |
TW201604853A (zh) | 顯示驅動電路 | |
JP2020524357A (ja) | 発光制御回路、発光制御ドライバー及び表示装置 | |
CN105609084B (zh) | 一种显示图像亮度的补偿方法、装置 | |
TWI661408B (zh) | 時序控制器裝置及其垂直起始脈衝產生方法 | |
TWI774100B (zh) | 影像處理晶片與影像處理方法 | |
CN101593501B (zh) | 液晶显示器的驱动方法及其驱动装置 | |
US11888487B2 (en) | Phase interpolation device and multi-phase clock generation device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 15126892 Country of ref document: US |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 15893958 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 15893958 Country of ref document: EP Kind code of ref document: A1 |
|
32PN | Ep: public notification in the ep bulletin as address of the adressee cannot be established |
Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 13/04/2018) |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 15893958 Country of ref document: EP Kind code of ref document: A1 |