WO2004017513A1 - Amplifier - Google Patents
Amplifier Download PDFInfo
- Publication number
- WO2004017513A1 WO2004017513A1 PCT/EP2003/008945 EP0308945W WO2004017513A1 WO 2004017513 A1 WO2004017513 A1 WO 2004017513A1 EP 0308945 W EP0308945 W EP 0308945W WO 2004017513 A1 WO2004017513 A1 WO 2004017513A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- output
- amplifier
- signal
- output stage
- inverted
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2173—Class D power amplifiers; Switching amplifiers of the bridge type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/331—Sigma delta modulation being used in an amplifying circuit
Definitions
- the present invention relates to an amplifier comprising an output driver with a first output stage and a second output stage, where an input signal is applied non-inverted to the first output stage and inverted to the second output stage.
- an input signal (typically an audio-signal) is transformed into an output signal capable of being reproduced into the original signal on an external load, usually a speaker or the like.
- an incoming signal is converted e.g. by a pulse- width or pulse-code modulator or the like into a high-frequency rectangular wave, the average value of which tracks the original signal.
- the rectangular wave is fed into an output stage which provides level shifting and splits the signal into a high/low driving signal.
- the driving signal is filtered to remove the switching noise, providing an averaged output to drive a load such as a speaker.
- the output of a differential class-D amplifier/driver oscillates between two extremes to represent an analog signal. These two extremes are built by having 1-0 or 0-1 at the output. For example an amplifier powered by a 5V voltage has at one extreme a first output pin at a voltage of 5 V and a second at a voltage of 0V. On the other extreme, the first output pin is at a voltage of 0V and the second at a voltage of 5V.
- a resistive or capacitive load applied to the amplifier always has a voltage of ⁇ 5V at its boundaries and thus enables the load to draw a lot of current.
- an amplifier comprising an output driver with a first output stage and a second output stage, where an input signal is applied non-inverted to the first output stage and inverted to the second output stage, where said input signal is applied with delay to one of the output stages.
- An amplifier according to the present invention is used for driving a load, for example a speaker, an earphone or the like. Input to the amplifier is a digital or analog signal.
- the amplifier may comprise different stages, for example a pre-amplifier and a final stage.
- the final stage comprises an output driver with a first output stage and a second output stage.
- the input signal is applied non-inverted to one of the output stages, for example the first output stage, and inverted to the other output stage, for example the second output stage.
- the output signals of the output stages are inverted to each other.
- the input signal of one of the output stages is applied with delay to this stage.
- the output signals of the output stages are sometimes opposing of each other and have the same polarity during the time of delay. If the output signals of the output stages have the same polarity, there is no current drawn by the load. Thus, the power consumption of the amplifier and the load is reduced.
- the quality of the output signal is improved by putting a delay in one of the output paths.
- the input signal for the output stages is a signal with a first and a second known level, i.e. a positive biased input voltage and a negative biased input voltage.
- the output signal of the first and the second output stage is preferably a signal with a first and second known level, which are a positive biased voltage and a negative biased voltage.
- the output signal of a first and second output stage is directly applied to a load.
- said amplifier further comprises a digital/analog converter, where the output signal of the digital/analog converter is applied as input signal non-inverted to the first output stage and inverted to the second output stage.
- the digital/analog converter is a Sigma-Delta modulator with a single-bit signal at its output, which is directly input to the output stages.
- the single bit signal of the digital analog converter is applied over one path to the first output stage and over another path to the second output stage.
- an inverter is provided.
- a delay element is provided in one of the paths. Inverter and delay element may be placed in the same signal path or in different signal paths.
- the delay equals l/(oversampled frequency). Oversampled frequency is the working frequency of the Sigma-Delta modulator. If the delay equals l/(oversampled frequency), most of the time the load doesn't pull any current and no power is consumed. If the delay equals 0, the load always pulls current and the behaviour of the amplifier according to the present invention is like the behaviour of a state of the art amplifier.
- the amplifier according to the present invention may be used for reducing the total harmonic distortion and noise of a class-D amplifier/driver.
- the amplifier according to the present invention may also be used for reducing the power consumption of a class-D amplifier/driver.
- Fig. 1 is a block diagram of a class-D amplifier/driver with delay
- Fig. 2 illustrates the output level of the two pins of a state of the art differential class- D amplifier and the current through a resistive load applied to the amplifier
- Fig. 3 illustrates the output level of the two pins of a differential class-D amplifier with delay and the current through a resistive load applied to the amplifier
- Fig. 4 depicts a tri-state output driver driven by a Sigma-Delta modulator
- Fig. 5 is a diagram showing total harmonic distortion and noise versus amplitude of a class-D amplifier by using a state of the art output driver and by using an output driver according to the invention.
- the present invention consists of adding a third level to the output of the class-D amplifier, and converting it to a tri-state output system.
- a third level is added.
- both pins of a load are set to the same biased voltage, so that no voltage is applied to the output load. So while the amplifier is in the third state, the load pulls no current and, thus, no power is consumed.
- Fig. 1 is a block diagram of a class-D amplifier/driver with delay in accordance with principles of the present invention.
- An analog or digital signal 1 is input for a signal treatment device 2.
- Output signals of said signal treatment device 2 are an inverted signal 8a and a non-inverted signal 8b.
- the polarity of the signals 8a, 8b are opposing each other.
- the signal 8 is input signal for output stages 4, 5.
- One of the signals, the inverted signal 8a or the non-inverted signal 8b, is applied to a delay element 3.
- the non-inverted signal 8b is applied to a delay element 3.
- the inverted signal 8 a could be applied to the delay element 3.
- one of the signals 8 a, 8b, the inverted or the non-inverted, of said signal treatment device 2 is applied with delay to the first output stage 4, the other one is applied without delay to the second output stage 5.
- Output pins of said first and second output stages 4, 5 are connected to a load 6.
- Said load 6 usually is a loudspeaker, earphone or the like, therefore a resistive, capacitive or inductive load.
- the signal for the first output stage 4 is delayed. Therefore, the two output pins often have the same voltage and no voltage drop is applied to the load 6. If the delay is small, the quality of the output signal stays the same as for the normal class-D structure.
- Fig. 2 shows the outputs U x and U 2 of a standard class-D amplifier having the second output always at the opposite of the first output.
- the voltages U, and U 2 each correspond to one of the output pins of first and second output stage 4, 5.
- Current I L through a resistive load is always at a maximum value ( ⁇ 1).
- Fig. 3 illustrates the output I L of a differential class-D amplifier with delay.
- the voltages U j and U 2 are not only alternating but also phase delayed. As shown in Fig. 3, there is no current I L through the load most of the time in the amplifier with delay according to the present invention.
- the output of the standard amplifier oscillates "clock-like".
- the delay time in the amplifier according to the present invention equal to the oscillation frequency, the power consumption goes to zero. In contrast to this, if the input stays at its maximum or minimum value, there is no reduction in power consumption.
- the power consumption depends about linear from the input signal amplitude, whereas for the standard amplifier the power consumption stays always at its maximum value.
- the power consumption of any class-D amplifier can be reduced.
- the reduction is even more important for class-D output drivers because they often have a load with a low resistivity.
- the tri-state output stage in accordance with the invention is also very advantageous for output drivers directly driven by a Sigma-Delta modulator.
- the Sigma- Delta modulator 7 converts a high-resolution low frequency signal by a single-bit quantizer 8 into a low-resolution high frequency signal.
- a 16-bit signal sampled at 16 kHz is converted into a single-bit 2 MHz signal.
- a driver 9 comprising a second output stage 5 as a first path and an inverter 10, delay element 3 and first output stage 4 as a second path
- Said driver 9 corresponds to the amplifier/driver as illustrated in Fig. 1. Again, by putting a delay before one of the output stages 4,5, the power consumption is heavily reduced because most of the time there is no differential voltage applied to the load of the output stages.
- An additional advantage of this invention is the increased quality of the output signal.
- an improvement of several dB's of total harmonic distortion plus noise (THD+N) and signal to noise ratio (SNR) could be measured.
- Fig. 5 depicts a diagram showing total harmonic distortion and noise (THD+N) versus amplitude measurement on the output of an audio 16-bit Sigma-Delta Digital/ Analog converter.
- a Line marked warmthtwo level output shows the measurement of a state of the art amplifier as output driver
- a line marked congestionthree level output shows the measurement of an amplifier according to the present invention as output driver. As shown in Fig.
- THD+N of an output driver according to the present invention is lower than THD+N of a state of the art output driver over nearly the whole volume range between -98dB and 0 dB. Only at very small and at very high amplitudes, near -98dB and OdB, THD+N is about the same for a state of the art and an output driver according to the present invention.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2003263214A AU2003263214A1 (en) | 2002-08-14 | 2003-08-12 | Amplifier |
EP03787772A EP1529340B1 (en) | 2002-08-14 | 2003-08-12 | Class d amplifier |
CA2494265A CA2494265C (en) | 2002-08-14 | 2003-08-12 | Differential class-d amplifier/driver |
DE60304213T DE60304213T2 (en) | 2002-08-14 | 2003-08-12 | CLASS-D AMPLIFIER |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US40328602P | 2002-08-14 | 2002-08-14 | |
US60/403,286 | 2002-08-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004017513A1 true WO2004017513A1 (en) | 2004-02-26 |
Family
ID=31715969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2003/008945 WO2004017513A1 (en) | 2002-08-14 | 2003-08-12 | Amplifier |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1529340B1 (en) |
AU (1) | AU2003263214A1 (en) |
CA (2) | CA2494265C (en) |
DE (1) | DE60304213T2 (en) |
DK (1) | DK1529340T3 (en) |
WO (1) | WO2004017513A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8263121B2 (en) * | 2004-04-14 | 2012-09-11 | Takeda Pharmaceutical Company Limited | Solid pharmaceutical preparation |
EP2573938A1 (en) * | 2011-09-22 | 2013-03-27 | Alcatel Lucent | A method for signal amplification based on pulse width modulation |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4164714A (en) * | 1977-09-26 | 1979-08-14 | Harris Corporation | Polyphase PDM amplifier |
JPS5686519A (en) * | 1979-12-17 | 1981-07-14 | Matsushita Electric Ind Co Ltd | Power amplifier |
US6262632B1 (en) * | 1999-11-16 | 2001-07-17 | Texas Instruments Incorporated | Concept and method to enable filterless, efficient operation of Class-D amplifiers |
US6313662B1 (en) * | 1998-07-10 | 2001-11-06 | Fujitsu Limited | High speed low voltage differential signal driver having reduced pulse width distortion |
EP1193867A2 (en) * | 2000-09-22 | 2002-04-03 | Texas Instruments Inc. | Digital amplifier |
US6373336B1 (en) * | 1998-07-24 | 2002-04-16 | Texas Instruments, Copenhagen Aps | Method of attenuating zero crossing distortion and noise in an amplifier, an amplifier and uses of the method and the amplifier |
WO2003021770A1 (en) * | 2001-08-30 | 2003-03-13 | Motorola, Inc. | Circuitry for creating a spectral null in a differential output switching amplifier and method therefor |
-
2003
- 2003-08-12 EP EP03787772A patent/EP1529340B1/en not_active Expired - Lifetime
- 2003-08-12 DK DK03787772T patent/DK1529340T3/en active
- 2003-08-12 CA CA2494265A patent/CA2494265C/en not_active Expired - Lifetime
- 2003-08-12 DE DE60304213T patent/DE60304213T2/en not_active Expired - Lifetime
- 2003-08-12 AU AU2003263214A patent/AU2003263214A1/en not_active Abandoned
- 2003-08-12 WO PCT/EP2003/008945 patent/WO2004017513A1/en not_active Application Discontinuation
- 2003-08-14 CA CA 2437222 patent/CA2437222A1/en not_active Abandoned
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4164714A (en) * | 1977-09-26 | 1979-08-14 | Harris Corporation | Polyphase PDM amplifier |
US4164714B1 (en) * | 1977-09-26 | 1984-12-25 | ||
JPS5686519A (en) * | 1979-12-17 | 1981-07-14 | Matsushita Electric Ind Co Ltd | Power amplifier |
US6313662B1 (en) * | 1998-07-10 | 2001-11-06 | Fujitsu Limited | High speed low voltage differential signal driver having reduced pulse width distortion |
US6373336B1 (en) * | 1998-07-24 | 2002-04-16 | Texas Instruments, Copenhagen Aps | Method of attenuating zero crossing distortion and noise in an amplifier, an amplifier and uses of the method and the amplifier |
US6262632B1 (en) * | 1999-11-16 | 2001-07-17 | Texas Instruments Incorporated | Concept and method to enable filterless, efficient operation of Class-D amplifiers |
EP1193867A2 (en) * | 2000-09-22 | 2002-04-03 | Texas Instruments Inc. | Digital amplifier |
WO2003021770A1 (en) * | 2001-08-30 | 2003-03-13 | Motorola, Inc. | Circuitry for creating a spectral null in a differential output switching amplifier and method therefor |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 005, no. 153 (E - 076) 26 September 1981 (1981-09-26) * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8263121B2 (en) * | 2004-04-14 | 2012-09-11 | Takeda Pharmaceutical Company Limited | Solid pharmaceutical preparation |
EP2573938A1 (en) * | 2011-09-22 | 2013-03-27 | Alcatel Lucent | A method for signal amplification based on pulse width modulation |
Also Published As
Publication number | Publication date |
---|---|
DK1529340T3 (en) | 2006-06-12 |
EP1529340B1 (en) | 2006-03-22 |
EP1529340A1 (en) | 2005-05-11 |
DE60304213T2 (en) | 2007-03-29 |
CA2494265C (en) | 2010-06-01 |
CA2494265A1 (en) | 2004-02-26 |
AU2003263214A1 (en) | 2004-03-03 |
DE60304213D1 (en) | 2006-05-11 |
CA2437222A1 (en) | 2004-02-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100805437B1 (en) | Class d amplifier | |
US8890608B2 (en) | Digital input class-D audio amplifier | |
US7482865B2 (en) | Systems and methods for correcting errors resulting from component mismatch in a feedback path | |
US8362832B2 (en) | Half-bridge three-level PWM amplifier and audio processing apparatus including the same | |
US20060284673A1 (en) | Amplifier having half-wave tracking power rails | |
US7425853B2 (en) | Systems and methods for pulse width modulating asymmetric signal levels | |
US20030081803A1 (en) | Low power, low noise, 3-level, H-bridge output coding for hearing aid applications | |
JP2006174421A (en) | Digital amplifier | |
TW200952324A (en) | Class D amplifier | |
JP2003115730A (en) | Pwm (pulse-width modulation) circuit and power amplifier circuit | |
US6940343B2 (en) | Amplifier | |
TWI343173B (en) | Power amplifier and method for reducing common noise of power amplifier | |
US6441760B2 (en) | Method and apparatus for digital to analog conversion | |
CN113016138B (en) | PWM modulator having chopped triangular wave PWM quantizer and quantizer with controllable analog gain and multiple non-ideal gains whose influence characteristics can be calibrated | |
CA2494265C (en) | Differential class-d amplifier/driver | |
JP2005223667A (en) | Audio signal amplification method and apparatus | |
US8410963B2 (en) | Data converter circuit and method | |
JP2005109590A (en) | Switching amplifier circuit and class d amplifier for audio apparatus | |
US6522273B1 (en) | Circuits systems and methods for power digital-to-analog converter protection | |
WO2006060137A1 (en) | Inductorless architecture for a switching amplifier | |
US11811370B2 (en) | Common-mode compensation in a multi-level pulse-width modulation system | |
JP2004128750A (en) | Pwm amplifier | |
CN116782083A (en) | Driving circuit applied to loudspeaker and method for generating current sampling signal of loudspeaker | |
GB2598995A (en) | Common-mode insensitive current-sensing topology in full-bridge driver | |
US6992607B2 (en) | Speech synthesizer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2494265 Country of ref document: CA Ref document number: 2003787772 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 2003787772 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 2003787772 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: JP |
|
WWW | Wipo information: withdrawn in national office |
Ref document number: JP |