WO2003017462A1 - Oscillator circuit with an inverter amplifier having reduced consumption - Google Patents
Oscillator circuit with an inverter amplifier having reduced consumption Download PDFInfo
- Publication number
- WO2003017462A1 WO2003017462A1 PCT/EP2002/008586 EP0208586W WO03017462A1 WO 2003017462 A1 WO2003017462 A1 WO 2003017462A1 EP 0208586 W EP0208586 W EP 0208586W WO 03017462 A1 WO03017462 A1 WO 03017462A1
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- WO
- WIPO (PCT)
- Prior art keywords
- inverter
- vibration mode
- oscillator circuit
- transconductance value
- resonator
- Prior art date
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- 239000003990 capacitor Substances 0.000 claims abstract description 8
- 238000009499 grossing Methods 0.000 claims abstract description 8
- 230000010355 oscillation Effects 0.000 claims description 28
- 239000010453 quartz Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 6
- 239000012321 sodium triacetoxyborohydride Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000009467 reduction Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000013016 damping Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/02—Details
- H03B5/06—Modifications of generator to ensure starting of oscillations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
- H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
- H03B5/36—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
- H03B5/364—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device the amplifier comprising field effect transistors
Definitions
- the present invention generally concerns an oscillator circuit with an inverter amplifier (herein after called an inverter oscillator circuit) having reduced consumption. More particularly, the present invention concerns a relatively low frequency inverter oscillator circuit preferably including a quartz resonator arranged to vibrate according to a torsionai vibration mode.
- Roger Bourquin and Philippe Truchot "Barreau de quartz vibrant en mode de torsion, Application aux capteurs", 6 th European Chronometry Congress, Bienne, 17- 18 October 1996 (cited and incorporated by reference in the aforementioned European Patent Application), has a single cut angle defined by a rotation about the crystallographic axis X of the quartz crystal, and includes, in particular, an undesired fundamental flexural vibration mode located at a first frequency and a desired torsionai vibration mode located at a second frequency higher than the first frequency of the undesired flexural vibration mode.
- the circuit for maintaining the resonator's oscillation is of the inverter type.
- the inverter circuit is designed to have a transconductance value such that the limit conditions for ensuring vibration (or minimum and maximum critical transconductance values) are satisfied for the fundamental torsionai vibration mode and not for the fundamental flexural vibration mode.
- the thermal behaviour of the oscillator device thus designed is therefore greatly improved with respect to conventional oscillator devices and has, in particular, similar thermal behaviour to circuits using AT cut resonators for a considerably lower operating frequency (typically 393 kHz for the torsionai resonator compared to 4 MHz for the AT cut resonator) and thus a comparatively lower consumption.
- the main object of the present invention is thus to propose an oscillator circuit having a more reduced consumption, this oscillator circuit preferably, but not necessarily, including a torsionai vibrating resonator of the aforementioned type.
- FIGS. 1a and 1b show two functional diagrams of this inverter oscillator circuit, globally indicated by the reference numeral 10.
- each of the oscillator circuits illustrated corresponds to a conventional inverter oscillator circuit including, in particular, the parallel arrangement, between input terminal A and output terminal B, of inverter amplifier means 2, 3, a resonator 1 and a resistive element 4, called a feedback resistor, of value R F .
- First and second load capacitors 5, 6 are respectively connected between input terminal A and output terminal B, on the one hand, and a supply potential, here V S s, on the other hand.
- This oscillator circuit 10 further includes control means 8 and a switching means 7 for controlling inverter amplifier means 2, 3 such that it has a first transconductance value during a start-up phase and a second transconductance value, lower than the first transconductance value, in steady state at the end of the start-up phase.
- oscillator circuit 10 of Figure 1a includes a first inverter 2 having a first transconductance value, designated g m , and a second inverter 3 having a second transconductance value, designated G m , higher than first transconductance value g m .
- Switching means 7 is arranged so as to selectively connect first inverter 2 or second inverter 3 between the input and output terminals A, B. During the start-up phase, switching means 7 is in position "1" so as to connect the second inverter between terminals A and B. As soon as the oscillations are stable, in steady state, switching means 7 passes into position "2" via the action of control means 8.
- Oscillator circuit 10 of Figure 1b is substantially similar to the circuit of Figure 1a.
- Second inverter 3 has here only an additional or complementary value, designated ⁇ g m , which is added to transconductance value g m of first inverter 2 during the start-up phase.
- Switching means 7 is thus connected such that second inverter 3 is connected in parallel with first inverter 2 during the start-up phase (switching means 7 in position "1") and disconnected from second inverter 2 in steady state (switching means 7 in position "2").
- Japanese document may have several drawbacks.
- the effect of the decrease in transconductance value during switching at the end of the start-up phase is a decrease in current (and thus in consumption) which also results in an abrupt decrease in the amplitude of the oscillator's output signal.
- This switching of the oscillator circuit can, in particular, lead to significant damping of the resonator's oscillations, which may eventually lead to it stopping totally or to a modification in its vibration mode.
- the inventor has been able to observe that if the solution proposed in the aforementioned Japanese document were directly associated with the aforementioned resonator arranged to vibrate torsionally, it would lead either to the resonator stopping totally or to a modification in its vibration mode to the undesired fundamental flexural vibration mode. It will also be noted that the abrupt decrease in amplitude in the oscillator's output signal can also be a drawback for the peripheral elements associated with the oscillator circuit.
- Another object of the present invention is thus to propose an oscillator circuit with reduced consumption which can easily be integrated in a global system, which does not generate disturbances to the system and which assures that the resonator's oscillations are adequately maintained.
- the oscillator circuit employs a torsionally vibrating quartz resonator of the aforementioned type, a solution guaranteeing that the torsionai vibration mode is maintained in addition to the reduction in consumption is desired.
- Yet another object of the present invention is to push the reduction in consumption of the circuit further still and to propose a solution that consumes even less energy.
- Another object of the present invention is to propose a method for maintaining the oscillations of a resonator of the aforementioned type guaranteeing, on the one hand, a reduction in consumption, and, on the other hand, that the oscillations of the resonator according to the desired fundamental torsionai vibration mode are maintained.
- the present invention thus concerns an inverter oscillator circuit whose features are set forth in independent claim 1.
- the present invention also concerns a method for maintaining the oscillations of a resonator of the aforementioned type whose features are set forth in independent claim 13.
- Advantageous embodiments of the present invention form the subject of the independent claims.
- transconductance is normally representative of the current consumed by the circuit, it will thus be understood that the circuit consumes more when it is arranged to force the resonator to vibrate according to the torsionai vibration mode than when the same circuit is arranged to vibrate according to the conventional flexural vibration mode.
- the inventor has been able to observe that the consumption of the circuit can be reduced once the oscillator circuit is started and its output signal is stable.
- the inventor has been able to observe that the transconductance value of the inverter may be reduced to a lower value than the critical transconductance value below which the resonator's oscillations in the torsionai vibration mode are normally no longer guaranteed.
- the inventor has thus observed that the critical transconductance values are essentially determining during the resonator start-up phase. For the sake of security, it is nonetheless perfectly possible to envisage keeping the transconductance value of the circuit within a range of values preventing the resonator from vibrating according to the torsionai vibration mode.
- the present invention also assures that the oscillator circuit starts quickly via the selection of a high transconductance value during this initial phase.
- the oscillator circuit is also fitted with means allowing the alternating signal output amplitude to be smoothed during the passage from the start-up phase into steady state, i.e. when the circuit's transconductance value is reduced.
- This smoothing of the output signal amplitude limits the effects of switching the oscillator circuit's transconductance value and guarantees that the resonator's oscillations are not damped too abruptly in order to ensure that the resonator continues to vibrate according to its desired vibration mode.
- this smoothing facilitates integration of the oscillation circuit into a global system, the disturbances caused by switching the oscillator circuit from one state to another being minimised.
- complementary means are used to reduce the oscillator circuit's consumption in steady state.
- resistive elements are connected in series in the supply path of the inverter circuit.
- the circuit further includes a voltage regulator for lowering the supply voltage of the inverter circuit.
- FIG. 2 shows a general diagram of the inverter oscillator circuit according to the present invention
- FIG. 3a illustrates the evolution over time of the transconductance value of the inverter oscillator circuit of Figure 2, in particular during switching from a start-up phase to a steady state phase;
- FIG. 3b illustrates the evolution over time of the amplitude of the oscillation signal delivered by the oscillator circuit of Figure 2, in particular during switching from a start-up phase to a steady state phase;
- FIG. 4 is a detailed example of an embodiment of the oscillator circuit according to the invention.
- FIG. 5a is an embodiment example of a circuit generating a switching signal STARTUP allowing the oscillator circuit of Figure 2 to switch from the start-up phase to the steady state phase;
- Figure 5b is a diagram illustrating the evolution over time of the signals of the generator circuit of Figure 5a.
- FIG. 2 shows a general functional diagram of an inverter type oscillator circuit constituting a preferred embodiment of the present invention.
- the inverter oscillator circuit 10 illustrated in Figure 2 typically includes the parallel arrangement, between input terminal A and output terminal B, of inverter amplifier means including first and second inverters 2, 3, a resonator 1 and a resistor 4, first and second load capacitors 5, 6 being respectively connected between said input and output terminals A, B, on the one hand, and a supply potential, here V S s > on the other hand.
- Oscillator circuit 10 may further include an additional resistive element 40, of value R 0 , arranged between the output of inverters 2, 3, on the one hand, and resonator 1 as well as load capacitor 6, on the other hand.
- This optional resistive element 40 is in particular intended for increasing the stability of the oscillator circuit.
- the arrangement of the two inverters 2, 3 is substantially similar to the arrangement illustrated in Figure 1 b, i.e. first inverter 2 is permanently connected between input and output terminals A and B, whereas second inverter 3 is able to be connected to or disconnected from these terminals A, B via the action of control circuit 8.
- second inverter 3 is activated or deactivated using switching means (namely two switches 7a and 7b controlled by control circuit 8) placed in the supply path of the inverter, between supply potentials V DD and V S s-
- second inverter 3 could alternatively be connected to or disconnected from terminals A and B by means of a switch connected in series with this inverter, for example by means of a transmission gate including the parallel arrangement of an n-MOS transistor and a p-MOS transistor connected to each other via their drain and source terminals as is, for example, illustrated in Figure 5 of the Japanese document JP 60-64506 cited in the preamble.
- Oscillator circuit 10 further includes means for smoothing the amplitude of the alternating output signal, designated S 0 sc. when the oscillator circuit is switched at the end of the start-up phase.
- These output signal amplitude smoothing means are advantageously made in the form of an amplitude control loop globally designated by the reference numeral 9.
- This amplitude control loop 9 is connected, on the one hand, to one of the input and output terminals A, B of oscillator circuit 10 (in this example, input terminal A), and, on the other hand, to first inverter 2.
- Amplitude control loop 9 includes, on the one hand, an amplitude control circuit
- each controlled current source 91 , 92 is further connected in parallel to a resistive element 95, 96 respectively.
- Figure 3a illustrates schematically the evolution over time of the transconductance value of the oscillator circuit according to the invention.
- the oscillation conditions are also illustrated in terms of minimum (g m ,TM - the lower oscillation condition) and maximum (g m , ma x - the upper oscillation condition) transconductance values for the fundamental flexural (at 74 kHz) and torsionai (393 kHz) vibration modes of the resonator taken by way of example in the aforementioned European Patent Application No. EP 1 111 770 A1.
- Figure 3b illustrates schematically the corresponding evolution of the oscillator's alternating output signal S 0 sc-
- the two inverters 2, 3 of the oscillator circuit are connected in parallel such that the circuit has a global so-called start-up transconductance value, designated G m , of high value.
- G m start-up transconductance value
- the start-up transconductance value G m of the circuit is selected such that the oscillation conditions of the desired mode (namely the fundamental torsionai vibration mode) are satisfied. These conditions are satisfied, in the example illustrated, for a start-up transconductance value G m comprised between the higher critical value g m , ma ⁇ of the undesired flexural vibration mode (at 74 kHz) and the higher critical value g m , ma ⁇ of the desired torsionai vibration mode (at 393 kHz).
- the resonator is set in vibration according to the desired torsionai vibration mode.
- the amplitude of output signal S 0 sc gradually increases and the oscillation frequency tends towards a stable state.
- the oscillations are stabilised at the end of a determined interval of time, designated T STAB -
- T STAB - At the end of the start-up phase, as soon as the oscillations of the oscillation circuit are stabilised (in steady state, phase "2" in the Figures), second inverter 3 is deactivated so as to reduce the circuit's transconductance value to a so-called reduced value, designated g m , and thus to reduce the consumption of the circuit.
- the reduced transconductance value g m is preferably determined such that it still satisfies the strict oscillation conditions of the desired torsionai vibration mode.
- the inventor has nonetheless been able to observe that the transconductance value can be reduced to a value that no longer strictly satisfies the aforementioned oscillation conditions.
- the higher critical transconductance value g m , max of the undesired flexural vibration mode (this value typically being higher than the lower critical transconductance value g m , m i n of the desired torsionai vibration mode).
- the transition from the start-up transconductance value G m to the reduced transconductance value g m does not occur abruptly, but gradually, owing to the addition of the amplitude control loop connected to the first inverter of the oscillator circuit. This results in a gentle and gradual decrease in the amplitude of output signal S 0 sc as illustrated in Figure 3b.
- the consumption of the oscillator circuit can be further reduced by adding a resistive element 95, 96 in the supply path of first inverter 2 in parallel with each controlled current source 91 , 92.
- the effect of the addition of these resistive elements is to limit the maximum current in the supply path of inverter 2 and thus to further reduce the consumption of the inverter oscillator circuit in steady state.
- FIG. 4 shows a detailed embodiment of the inverter oscillator circuit of Figure
- the first and second inverters 2, 3 are CMOS inverters each comprising a p- MOS transistor 21 , 31 respectively, whose drain is connected to the drain of an n- MOS transistor 22, 32 respectively.
- the gates of transistors 21 , 22, 31 and 32 are connected to the same node and form input terminal A of the oscillator circuit.
- the drains of transistors 21 , 22, 31 , 32 are connected together to output terminal B, here via additional resistive element 40.
- the feedback resistive element 4 is connected between the gate connection node and the drain connection node of transistors 21 , 22, 31 , 32.
- the oscillator circuit output signal (picked up in this example at terminal A) is applied in a typical manner to the input of a shaping stage 100 for delivering a square output signal.
- the source of p-MOS transistor 31 of second inverter 3 is connected to high supply-potential V DD via another p-MOS transistor forming switch 7a.
- the source of n-MOS transistor 32 of second inverter 3 is connected to the low supply potential (here intermediate supply potential V R ) via another n-MOS transistor forming switch 7b.
- a control signal designated STARTUP is applied to the gate of n-MOS transistor 7b and to the gate of p-MOS transistor 7a (via an inverter) in order to control their state of conduction and selectively activate or deactivate second inverter 3.
- the source of p-MOS transistor 21 of first inverter 2 is connected to high supply potential V DD via another p-MOS transistor connected in a resistor configuration (gate potential brought to ground), this p-MOS transistor forming resistive element 95 of Figure 2.
- a p-MOS transistor forming first controlled current source 91 is also inserted between the source of p-MOS transistor 21 and high potential V DD in parallel with transistor 95 connected as a resistor.
- the source of n-MOS transistor 22 is connected to low supply potential V R via an n-MOS transistor connected in a resistor configuration (gate potential brought to high potential) and forms resistive element 96 of Figure 2.
- An n-MOS transistor forming the second controlled current source 92 is inserted between the source of n-MOS transistor 22 and low potential V R in parallel with transistor 96 connected as a resistor.
- P-MOS transistor 91 and n-MOS transistor 92 forming the controlled current sources are controlled by amplitude control circuit 90 whose structure will now be briefly described. It will be noted that those skilled in the art could envisage other configurations for making this amplitude control circuit and that the configuration illustrated should consequently not be considered as a limitation of the invention.
- Input terminal A of the oscillator circuit is applied to a terminal of a first capacitive element 921 , the other terminal of this capacitive element 921 being connected on the one hand, to the drain of a first p-MOS transistor 901 and, on the other hand, to the gate of a second p-MOS transistor 902.
- the source of the latter is connected to high potential V DD whereas its drain is connected to the source of first p- MOS transistor 901 as well as to the source of a third p-MOS transistor 903.
- the gate and the drain of this third p-MOS transistor 903 are connected to the gate of first transistor 901.
- connection node between the drain of p-MOS transistor 902 and the sources of p-MOS transistors 901 and 903 is connected to the gate of a fourth p- MOS transistor 904 whose source is connected to high supply potential V DD -
- Second 922 and third 923 capacitive elements are also connected via one of their terminals respectively to the drain of p-MOS transistor 902 and to the drain of p-MOS transistor 903, the other terminal of these capacitive elements 922 and 923 being connected to high supply potential V DD -
- the gate of p-MOS transistor forming first controlled current source 91 is connected to the gate of fourth p-MOS transistor 904, a fifth p-MOS transistor 905 connected in a capacitor configuration (drain and source terminals connected to high supply potential V DD ) being connected via its gate to this same connection between p- MOS transistors 91 and 904.
- the gate of the n-MOS transistor forming second controlled current source 92 is connected to the drain of fourth p-MOS transistor 904.
- FIG. 5a shows an embodiment example of control circuit 8 for generating control signal STARTUP intended for switches 7a and 7b.
- This control circuit 8 made in digital form, essentially includes a bistable trigger circuit (or flip-flop) S-R 80 and a counter, or divider 85.
- Counter 85 is clocked by a clock signal CLK (purely by way of illustrative and non-limiting example, a clock signal at 128 Hz derived from the oscillator circuit output signal).
- CLK a clock signal at 128 Hz derived from the oscillator circuit output signal.
- RESET is applied to a zero reset terminal of counter 85 and to excitation terminal S of bistable trigger circuit 80, via an inverter.
- the switching signal STARTUP thus passes to the high logic level during a determined time interval of duration T S T A B- During this time interval, the oscillator circuit of Figure 2 is thus switched into the "high transconductance" mode facilitating the quick start-up of the oscillations. As soon as the time interval has elapsed, signal STARTUP passes to the low logic level, thus switching the oscillator circuit of Figure 2 into the "low transconductance” mode thus reducing the consumption of the circuit.
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- Oscillators With Electromechanical Resonators (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60204899T DE60204899T2 (en) | 2001-08-13 | 2002-08-01 | INVERTOROSCILLATOR CIRCUIT WITH LOW CONSUMPTION |
EP02772113A EP1421674B1 (en) | 2001-08-13 | 2002-08-01 | Oscillator circuit with an invertor amplifier having reduced consumption |
AT02772113T ATE298947T1 (en) | 2001-08-13 | 2002-08-01 | LOW CONSUMPTION INVERTOR OSCILLATOR CIRCUIT |
US10/485,463 US7030709B2 (en) | 2001-08-13 | 2002-08-01 | Oscillator circuit with an inverter amplifier having reduced consumption |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01203052A EP1289121A1 (en) | 2001-08-13 | 2001-08-13 | Low consumption inverter oscillator circiut |
EP01203052.4 | 2001-08-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003017462A1 true WO2003017462A1 (en) | 2003-02-27 |
Family
ID=8180782
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2002/008586 WO2003017462A1 (en) | 2001-08-13 | 2002-08-01 | Oscillator circuit with an inverter amplifier having reduced consumption |
Country Status (5)
Country | Link |
---|---|
US (1) | US7030709B2 (en) |
EP (2) | EP1289121A1 (en) |
AT (1) | ATE298947T1 (en) |
DE (1) | DE60204899T2 (en) |
WO (1) | WO2003017462A1 (en) |
Cited By (1)
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GB2402276A (en) * | 2003-03-07 | 2004-12-01 | Motorola Inc | A start-up circuit for a CMOS crystal oscillator, in which the initial bias current is readily determined |
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US7109813B2 (en) * | 2003-06-12 | 2006-09-19 | Broadcom Corporation | Fast starting on-chip crystal oscillation circuit |
DE102007018336A1 (en) * | 2007-04-18 | 2008-10-23 | Texas Instruments Deutschland Gmbh | 32 kHz low power oscillator |
TWI362824B (en) * | 2008-09-12 | 2012-04-21 | Phison Electronics Corp | Oscillator and driving circuit and oscillation method thereof |
US8120439B2 (en) * | 2009-08-13 | 2012-02-21 | Texas Instruments Incorporated | Fast start-up crystal oscillator |
CN102118131B (en) | 2009-12-31 | 2016-06-15 | 意法-爱立信公司 | Shorten the method starting the time of crystal oscillator |
RU2455754C1 (en) * | 2011-05-10 | 2012-07-10 | Юрий Сергеевич Иванченко | Temperature-compensated crystal-controlled oscillator |
TWI477061B (en) * | 2012-04-10 | 2015-03-11 | Alchip Technologies Ltd | Signal generating device for real time clock device and method thereof |
CN103378824B (en) * | 2012-04-13 | 2016-03-16 | 世芯电子股份有限公司 | The signal generating circuit and related methods of real-time clock device |
US8975972B2 (en) * | 2012-07-05 | 2015-03-10 | Infineon Technologies Ag | Oscillator system |
US8816786B2 (en) * | 2012-10-01 | 2014-08-26 | Tensorcom, Inc. | Method and apparatus of a crystal oscillator with a noiseless and amplitude based start up control loop |
EP2757352B1 (en) * | 2013-01-17 | 2015-11-18 | EM Microelectronic-Marin SA | Control system and management method of a sensor |
US9007138B2 (en) * | 2013-05-31 | 2015-04-14 | Freescale Semiconductor, Inc. | Oscillator with startup circuitry |
US20150114954A1 (en) * | 2013-10-29 | 2015-04-30 | Sarge Holdings Co., Llc | Portable induction heater |
US9362864B2 (en) * | 2014-09-10 | 2016-06-07 | Gainspan Corporation | Dynamic gearshift during oscillator build-up based on duty cycle |
US9647670B2 (en) * | 2015-09-15 | 2017-05-09 | Silicon Laboratories Inc. | Oscillator with dynamic gain control |
JP6750314B2 (en) * | 2016-05-31 | 2020-09-02 | セイコーエプソン株式会社 | Oscillator, electronic device, moving body, and oscillator manufacturing method |
RU168192U1 (en) * | 2016-10-11 | 2017-01-23 | Общество с ограниченной ответственностью Научно-внедренческая фирма "Сенсоры, модули, системы" | AC VOLTAGE FREQUENCY CONVERTER FOR VARIABLE FREQUENCY AND AC VOLTAGE SIGNALS |
JP6930134B2 (en) | 2017-02-28 | 2021-09-01 | セイコーエプソン株式会社 | Oscillators, electronics and mobiles |
US20190007005A1 (en) * | 2017-06-30 | 2019-01-03 | Silicon Laboratories Inc. | Crystal amplifier with resistive degeneration |
US10574185B2 (en) | 2017-06-30 | 2020-02-25 | Silicon Laboratories Inc. | Crystal driver circuit with core amplifier having unbalanced tune capacitors |
US10367462B2 (en) * | 2017-06-30 | 2019-07-30 | Silicon Laboratories Inc. | Crystal amplifier with additional high gain amplifier core to optimize startup operation |
US10454420B2 (en) | 2017-06-30 | 2019-10-22 | Silicon Laboratories Inc. | Crystal driver circuit configurable for daisy chaining |
US10536115B2 (en) | 2017-06-30 | 2020-01-14 | Silicon Laboratories Inc. | Crystal driver circuit with external oscillation signal amplitude control |
US10432201B2 (en) * | 2017-09-05 | 2019-10-01 | Arm Limited | Low power one-pin crystal oscillator with fast start-up |
US10432143B2 (en) * | 2017-12-25 | 2019-10-01 | Shenzhen GOODIX Technology Co., Ltd. | Circuit and method for facilitating startup time of crystal oscillator |
US10601369B2 (en) | 2018-07-11 | 2020-03-24 | Silicon Laboratories Inc. | Crystal oscillator startup time optimization |
US10491157B1 (en) | 2018-07-11 | 2019-11-26 | Silicon Laboratories Inc. | Crystal oscillator adaptive startup energy minimization |
US10691150B1 (en) * | 2019-04-26 | 2020-06-23 | Nxp B.V. | Fast response high-speed redriver channel power up in CIO mode |
US11181939B2 (en) * | 2019-05-23 | 2021-11-23 | Qualcomm Incorporated | Multi-mode oscillation circuitry with stepping control |
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JPS6064506A (en) | 1983-09-20 | 1985-04-13 | Fujitsu Ltd | Oscillating circuit |
US4924257A (en) * | 1988-10-05 | 1990-05-08 | Kantilal Jain | Scan and repeat high resolution projection lithography system |
US5208558A (en) * | 1990-11-29 | 1993-05-04 | Kabushiki Kaisha Toshiba | Crystal oscillator having plural inverters disabled after start-up |
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WO1999028956A1 (en) * | 1997-11-28 | 1999-06-10 | Nikon Corporation | Illumination control method and illumination control device for pulse light source used in aligner |
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2001
- 2001-08-13 EP EP01203052A patent/EP1289121A1/en not_active Withdrawn
-
2002
- 2002-08-01 DE DE60204899T patent/DE60204899T2/en not_active Expired - Lifetime
- 2002-08-01 EP EP02772113A patent/EP1421674B1/en not_active Expired - Lifetime
- 2002-08-01 AT AT02772113T patent/ATE298947T1/en not_active IP Right Cessation
- 2002-08-01 WO PCT/EP2002/008586 patent/WO2003017462A1/en not_active Application Discontinuation
- 2002-08-01 US US10/485,463 patent/US7030709B2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4360789A (en) * | 1980-07-17 | 1982-11-23 | Hughes Aircraft Company | Very low current pierce oscillator |
US5909152A (en) * | 1997-02-28 | 1999-06-01 | Texas Instruments Incorporated | Low power CMOS crystal oscillator circuit |
EP0886372A2 (en) * | 1997-06-19 | 1998-12-23 | Nec Corporation | Oscillator circuit containing a noise prevention circuit |
US6025757A (en) * | 1997-11-14 | 2000-02-15 | Nippon Precision Circuits Inc. | Piezoelectric oscillator circuit |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2402276A (en) * | 2003-03-07 | 2004-12-01 | Motorola Inc | A start-up circuit for a CMOS crystal oscillator, in which the initial bias current is readily determined |
GB2402276B (en) * | 2003-03-07 | 2005-08-03 | Motorola Inc | Amplitude level control circuit |
KR101059720B1 (en) * | 2003-03-07 | 2011-08-29 | 프리스케일 세미컨덕터, 인크. | Amplitude Level Control Circuit for Oscillator |
Also Published As
Publication number | Publication date |
---|---|
EP1421674B1 (en) | 2005-06-29 |
DE60204899T2 (en) | 2006-05-11 |
US7030709B2 (en) | 2006-04-18 |
EP1421674A1 (en) | 2004-05-26 |
ATE298947T1 (en) | 2005-07-15 |
EP1289121A1 (en) | 2003-03-05 |
DE60204899D1 (en) | 2005-08-04 |
US20040169562A1 (en) | 2004-09-02 |
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