WO1999012399A1

WO1999012399A1 - Electronic ballast

Info

Publication number: WO1999012399A1
Application number: PCT/US1997/020525
Authority: WO
Inventors: Gerry P. Keogh; Gordon E. Bloom
Original assignee: Sparton Corporation
Priority date: 1997-08-29
Filing date: 1997-11-05
Publication date: 1999-03-11

Abstract

A ballast for controlling the operation of an electrical load comprises a switch mode buck converter (10) for supplying controllable DC current to an inverter (12) for energizing the load (14). A programmable controller (18) is connected with the converter (10), inverter (12), and lamp starting network (16).

Description

ELECTRONIC BALLAST

FIELD OF THE INVENTION

This invention relates to an electronic ballast and more particularly, to an electronic ballast which is especially adapted to control the operation of an electrical load such as a gas discharge lamp which exhibits a non-linear impedance characteristic.

BACKGROUND OF THE INVENTION

Electronic ballasts are widely used for controlling the operation of electrical load devices which have a non-linear impedance characteristic. A well-known application of electronic ballasts is that of controlling the energizing current to a gas discharge lamp used in lighting and any other applications. Because of the impedance characteristics of gas discharge lamps and other non-linear load devices, an electronic ballast must function to control the load current for regulation of the power supplied to the load. In controlling the load energization, the ballast should afford operation at high power factor and high efficiency. It should also provide for fault protection and lend itself^' to the reduction of electromagnetic interference. For use with gas discharge lamps it is desirable that the ballast should have the capability for adaptation to the characteristics of a specific lamp type in order to realize the optimum lamp performance and lamp life. Accordingly, it is desirable that the ballast should provide for soft- starting of the lamp minimal electrode erosion and equalization of erosion of both electrodes.

The ballast of this invention is useful for a wide variety of non-linear load devices but is especially adapted for use with gas discharge lamps. More particularly, the illustrative embodiment of the invention to be described herein is especially suitable for mercury vapor lamps. Such lamps are commonly used for generating ultraviolet radiation for use in water purification plants. The ballast requirements for such facilities are especially demanding in respect to efficiency, power factor, lamp life and cost.

A general object of this invention is to overcome certain disadvantages of the prior art and to provide an improved electronic ballast.

SUMMARY OF THE INVENTION

In accordance with this invention, an electronic ballast is provided which operates at high efficiency and power factor and which affords high output power in a compact design having low manufacturing cost.

Further, in accordance with this invention, an electronic ballast is provided which is especially useful for controlling the operation of gas discharge lamps. The ballast of this invention allows ionization of the lamp plasma to be formed at low drive current level with minimal high frequency, high voltage across the electrodes. Further, the drive current may be increased in a slow linear manner up to the preset running current value. Further, in the ballast of this invention, the drive current frequency is reduced to the lowest practical level after the start-up period without disturbing the stability of the plasma. When driving the plasma, the drive voltage frequency and phase are held to values close to those of the drive current and thereby achieves optimum light intensity per unit of input power.

Further, in accordance with this invention, a ballast is provided which comprises a switchmode buck converter for supplying controllable DC current to an inverter for energizing the load. Preferably, the inverter is a full bridge inverter. Further, means are provided for reducing the frequency of the inverter after starting of the load. Current control means are provided for maintaining the lamp current at a substantially constant value during running of the load, preferably, by adjusting the duty cycle of the converter. Synchronizing means are coupled with the converter and inverter for synchronizing the frequency and phase of switching of the inverter and converter.

Further, in accordance with the invention, a starting circuit is provided for the load comprising a starting transformer for coupling the inverter output with the load and the transformer is effectively disabled upon starting of the load.

A complete understanding of this invention may be obtained from the detailed description that follows taken with the accompanying drawings. DESCRIPTION OF THE DRAWINGS

FIGURE 1 is a block diagram of the electronic ballast of this invention;

FIGURE 2 is a schematic diagram of a power rectifier and filter circuit useful with the invention;

FIGURE 3 is a schematic diagram of a converter circuit for use with this invention;

FIGURE 3A illustrates a waveform typical of the converter circuit of Figure 3;

FIGURE 4 is a schematic diagram of an inverter circuit for use with the ballast of this invention;

FIGURE 4A is a waveform typical of the circuit of Figure 4;

FIGURE 5 is a schematic diagram of the converter and inverter coupled together;

FIGURE 6 is a schematic diagram of the ballast including a starting circuit;

FIGURE 7 is a schematic of an alternative embodiment of the starting circuit for the ballast;

FIGURE 8 is a diagram of a control circuit for the ballast; and FIGURE 9 is a timing diagram showing waveforms in the ballast circuit.

BEST MODE FOR CARRYING OUT THE INVENTION

Referring now to the drawings, there is shown an illustrative embodiment of the invention in an electronic ballast circuit which is especially adapted for controlling the operation of an electrical load comprised of one or more gas discharge lamps. It will be understood that the ballast is useful for controlling other electrical loads which exhibit a non-linear impedance characteristic and that it may also be used for supplying power to electrical loads having a linear impedance characteristic. It will be appreciated, as the description proceeds, that the invention may be utilized in many different applications and may be realized in other embodiments.

As shown in Figure 1, the ballast of this invention comprises, in general, the DC/DC converter 10 which supplies a controllable DC current to a DC/AC inverter 12. The inverter 12 supplies an alternating current to a gas discharge lamp 14 through a lamp starting circuit 16. A programmable controller 18 is operatively connected with the converter 10, inverter 12 and lamp starting network 16. The programmable controller includes a programmable logic section 22, a control and sequencing section 24 and a monitoring section 26.

An alternating power source, such as the lines of the local public utility power company, supplies AC power to the converter 10 through a rectifier and filter 32. If needed, the power lines may be connected to the input of the rectifier and filter 32 through an electromagnetic interference (EMI) filter 34. Also, if needed the output of the rectifier and filter 32 may be connected through a power factor correction network 36 to the input of the converter 10. The rectifier and filter 32 produces an unregulated high voltage DC potential at the input of the converter 10. In an application where a power factor close to unity is required, greater than 0.95, a power factor correction network 36 may be used. In an installation with a three phase AC power source, the power factor correction network 36 may be dispensed with by the use of full- wave rectifier circuitry.

Figure 2 shows a preferred circuit for the rectifier and filter 32 for use with a three phase delta power source. The circuit of Figure 2 comprises a conventional three phase full-wave rectifier 38. In the illustrative embodiment, the nominal RMS line-to-line voltage is 440 volts and the nominal DC output voltage at the output terminals of the filter is on the order of 600 volts DC. The AC ripple superimposed on the high voltage DC output is on the order of six times the AC line frequency and its peak-to-peak amplitude is only about five percent of the DC level. Accordingly, the filter capacitors can be very small and still maintain an acceptable AC ripple voltage. This minimizes the current/voltage phase lags and thus maximizes power factor. The two winding filter inductor shown in Figure 2 is preferred if there is a need to obtain further reduction in the AC ripple and to increase the power factor; otherwise, the inductor may be dispensed with.

Figure 3 is a schematic diagram of a switchmode converter 10' which is known as a step- down, or buck, converter. It is the same as converter 10 referred to above in Figure 1 except that converter 10, as will be described below, comprises two switches instead of one. Converter 10' comprises input terminals 42 and 44 and output terminals 46 and 48. The output of the filter 38 is applied to the input of the converter 10' and the output of the converter 10' is applied across a load 52. The converter 10' comprises a switch 54 and an inductor 56 in series connection between the input terminal 42 and the output terminal 46. It also comprises a diode connected between the input terminal 44 and the junction of switch 54 and inductor 56. The switch 54 is preferably a solid state switch. The input-to-output current and voltage relationships are as follows:

where the quantities are as shown in Figure 3A except for D which represents the duty cycle of the converter and t_on and t_Qff represent the time on and time off of the switch 54.

For a fixed output voltage across the load 52, the duty cycle of conduction D of the power switch 54 can be varied to control the current delivered to the load 52. In the use of the converter 10', the load 52 is constituted by the inverter 12 and the gas discharge lamp 14. The voltage pulse train which appears across the diode 52 is illustrated in Figure 3A.

Figure 4 is a schematic diagram of the inverter 12 which is shown in block diagram in Figure 1. The inverter 12, as shown in Figure 4 is coupled through an isolation transformer 64 to a load which, in the illustrative embodiment, is a gas discharge lamp 14. The inverter 12 is a bridge network of conventional design, sometimes referred to as a full-bridge inverter, with a switch in each leg of the bridge. The switches 66, 68, 72 and 74 are preferably solid state switches. The inverter includes input terminals 76 and 78 and output terminals 82 and 84. The pair of switches 68 and 72 are simultaneously switched on and off and the pair of switches 66 and 74 are simultaneously switched on and off. The two pairs are alternately switched and one pair is on while the other pair is off. The switching may be controlled so that both pairs of switches are on at the same time so as to provide some overlap in the conduction times. Since the current into the inverter is controlled, conduction overlap will not pose a problem for the switches and, in fact, permits zero voltage switching (ZVS) which results in very efficient square-wave drive for the lamp. The inverter may also be operated so that the two pairs of switches are not turned on at the same time to thereby avoid any short circuit across the input of the inverter. In this mode, herein referred to as non-overlap switching, two pairs of switches do not conduct at the same time and switching occurs at non-zero voltage. In either non-overlap switching or overlap switching, it is preferred to operate each pair of switches so that it is on approximately fifty percent of the time and off approximately fifty percent of the time. This is referred to herein as a fifty percent conduction duty cycle. In the preferred embodiment, non- overlap switching is implemented with approximately fifty percent conduction duty cycle. In this mode of operation with approximately fifty percent conduction duty cycle, each electrode of the gas discharge lamp 14 is subjected to the same degree of "wear" and electrodes will be at the same temperature. This promotes long life of the lamp electrodes. Assuming that the lamp zero-to-peak voltage level is relatively constant, the effective DC input voltage to the inverter will be equal to the zero-to-peak voltage magnitude if no isolating transformer is used. Otherwise, the DC input voltage to the inverter will be that which is reflected through the turns ratio of the transformer. The square wave voltage across the lamp 14 is illustrated in Figure 4A.

Figure 5 is a schematic diagram showing the converter 10' of Figure 3 and the inverter 12 of Figure 4 coupled together in operational relationship. (It is noted that in the schematic of Figure 6, the circuit nodes 46' and 48' correspond with the output terminals 46 and 48 in Figure 3. These nodes also correspond with the input terminals 76 and 78 of the inverter of Figure 4.) Also, in the circuit of Figure 5, the gas discharge lamp 14 is connected directly across the output terminals 82 and 84 of the inverter instead of being coupled through an isolation transformer. The RMF voltage across the lamp 14 and the RMF current through the lamp are as follows: V_L ≡DV_in,

J ~ J ~ ll!L

^{L ~ L] ~} D

where the quantities are as shown in Figure 5 except for D which represents the duty cycle of the converter .

Figure 6 is a schematic diagram showing the converter 10 coupled with the inverter 12 and showing a starting circuit 92 for the gas discharge lamp 14. Additional circuit features of the ballast are also included in this schematic diagram and will be described below.

The converter 10 has the same circuitry as converter 10' as discussed above except that it includes two parallel switches 54a and 54b instead of the single switch 54 of converter 10'. As will be discussed below, switches 54a and 54b are operated alternately so that one switch is on while the other is off. The duty cycles of the switches is adjustable with both switches having the same duty cycle. Each switch is operated only once over a switching period of the inverter stage to minimize power losses. In order to minimize operational switching noise, the frequency of switch operation in the converter is synchronized with that of the inverter with the inverter frequency being a fraction of the converter frequency.

In order to provide the required starting voltage for the gas discharge lamp 14, a starting circuit 92 is coupled between the output terminals

82 and 84 of the inverter 12 and the lamp 14. The starting circuit 92 comprises an autotransformer 94 having a primary winding 96 and a secondary winding 98. The turns ratio of the autotransformer is selected so as to produce a voltage high enough to initiate ionization and starting of the lamp. This starting voltage is maintained during a start-up period having a predetermined time period, typically between two and five minutes dependent upon the specific characteristics of the lamp. A first starting switch 102 is connected in series with the primary winding 96 and a second starting switch 104 is connected in parallel with the secondary winding 98. The starting switches 102 and 104 are movable between a "lamp-start" position and "lamp-run" position. The switches are shown in the "lamp-run" position with switch 102 open and switch 104 closed. This effectively removes the autotransformer from the lamp circuit. In the "lamp-start" position, switch 102 is closed and switch 104 is open and the autotransformer is operationally connected with the lamp. The lamp is started in response to a start command which is initiated by the user. When the start command is applied, the switches 102 and 104 are in the lamp-start position and the autotransformer applies the starting voltage across the lamp which places the lamp in a lamp starting mode. As will be described later, a lamp-run command is generated at the end of the start-up period and the start switches 102 and 104 are switched to the lamp-run position which will place the lamp in the running mode. As will be described below, as soon as the lamp is operating in the running mode, the frequency of the inverter 10 is reduced to a running mode value which is high enough to maintain the operational stability of the lamp. In Figure 7, an alternative embodiment of the starting arrangement is shown. In Figure 7 the starting circuit 92' comprises an autotransformer 94' having a primary winding 96' and a secondary winding 98'. A coupling capacitor 106 is connected in series with the primary winding and the series combination is connected across the output terminal 82 and 84 of the inverter. The secondary winding 98' is connected in series with the lamp 14 across the inverter output terminals. The coupling capacitor has a sufficiently low impedance at the starting mode frequency of the inverter to energize the autotransformer so that it produces the required starting voltage for the lamp. When the inverter frequency is reduced to the running-mode value, the impedance of the capacitor 106 blocks the energization of the auto transformer 94' and it is effectively eliminated from the lamp circuit during the lamp running mode .

Referring further to Figure 6, additional features of the converter 10 and the inverter 12 will be described. The circuit includes three current transformers 112, 114 and 116 for sampling the magnitudes of the currents in the converter circuit 10 and the lamp 14. The current signals from these transformers are used in a feedback control circuit for maintaining the lamp current at a constant value as will be described subsequently with reference to Figure 8.

In order to reduce voltage transients during changes of state of the various switches, the circuit is provided with a set of snubber networks each of which comprises a resistor and capacitor in series connection. The snubber network 122 is connected across switch 54b, snubber network 124 is connected across the series combination of diode 58 and current transformer 114, snubber network 126 is connected across switch 66, snubber network 128 is connected across switch 68 and snubber network 132 is connected across a voltage-limiting diode 108. which in turn is connected across the output terminals 82 and 84 of the inverter.

In the operation of the circuit of Figure 6, the ballast may be shut down due to a fault such as an excessive voltage at a selected point in the circuit, as will be described subsequently. Upon ballast shut-down, the inverter switches are turned off. Under shutdown condition, the energy stored in the output inductor 56 of the converter must be safely dissipated. In order to transfer this energy back to the input power source, a diode 134 is connected between the converter output terminal 46' and the conductor 136. A filter network including a small inductor 138 and a pair of capacitors 142 and 144 are provided for use as a source of instantaneous energy during operation and as a sink for energy transferred via diode 134 from inductor 56.

The control system for the ballast will be described with reference to Figures 1 and 8. As noted above, the programmable controller 18 comprises a programmable logic section 22, a control and sequencing section 24 and a monitoring section 26. The programmable logic section controls the sequencing of lamp start-up, lamp warm-up and the lamp-running mode. It also controls fault protection of the ballast and the load. Additionally, the programmable logic section processes the drive and control circuits for the converter 10 and the inverter 12, as will be described below.

As shown in Figure 1, a lamp-start signal generator 11 is provided for initiating starting of the lamp 14. The start signal is applied to the control and sequencing section 24. Also, a lamp power adjust signal generator 13 is provided to adjust the current level of the converter 10 to obtain a desired power input to the lamp. The power adjust signal can be either a digital or analog signal. The output of the power adjust signal is applied to an input of the control and sequencing section 24. For the purpose of over-voltage protection, the DC voltage sample is taken at the input of the converter 10 and applied through a conductor 17 to the input of the monitoring section 26. The monitoring section 26 provides several indicator signals, such as lamp failure, shorted output, ballast failure, over-temperature and ground fault. These monitor signals are developed on the output lines 19 from the monitoring section 26.

As shown in the control circuit of Figure 8, the drive signals for the converter 10 are generated by a pulse width modulator (PWM) 142 and the drive signals for the inverter 12 are generated by a PWM 144. A synchronizing signal from the PWM 142 is applied through a divide-by-N circuit 146 to the synchronizing input of the PWM 144. To provide for reduction of the inverter frequency after the lamp start-up interval, a lamp starting interval timer 148 is coupled to the divide-by-N circuit. The starting interval timer 148 generates a frequency- change signal at a preset time delay after the lamp- start signal is generated by the signal generator 11 in response to a control input, such as activation of a switch. The lamp-start signal is applied from the lamp-start signal generator 11 to the input of timer 148. The time delay between the lamp-start signal and the frequency-change signal is preset to a value dependent upon the starting characteristics of the specific lamp 14 being energized by the ballast.

The magnitude of current supplied to the lamp 14 is controlled by adjusting the duty cycle of the buck converter 10. For this purpose, the lamp current is sensed by the current transformer 116 and the signal is applied through a full wave rectifier to one input of an error amplifier 154. The other input of the amplifier 154 receives a voltage reference signal from the lamp power signal generator 13. The output of the error amplifier 154 is applied to one input of a comparator 158. The other input of the comparator is a dynamic resistive voltage level developed by summed rectification of the outputs of the current transformers 112 and 114.

The action of comparator 158, as a result of its inputs, forms the current-mode means for assuring lamp current control stability. The output of comparator 158 develops a duty cycle control signal which is applied to the duty cycle input of PWM 142. Accordingly, the lamp current is maintained at a constant value for a given setting of lamp power even though there is a change of voltage from the AC power supply. Over-voltage protection is provided for the ballast circuit by means of using the voltage at one or more selected points in the ballast circuit and turning off the buck converter 10 in response to voltage which exceeds a preset limit. As shown in Figure 8, a voltage sensor comprising a voltage divider 162 is connected between the anode of diode D2 and ground. The sensed voltage from the voltage divider is applied to the shut-down input SD on the PWM 142. Thus, the operation of the PWM 142 is terminated and the buck converter 10 is stopped with both switches 54a and 54b in the open position.

The operation of the ballast will be described with reference to the timing and waveform diagram of Figure 9. Upon application of the lamp- start signal (from signal generator 11) to the control and sequencing section 24, the converter 10 and inverter 12 are turned on and operated under the control of the PWM 142 and the PWM 144, respectively. The relative timing of the converter drive pulses Ql and Q2 is shown by the waveforms 162 and 164 of Figure 9. The relative timing of the inverter drive pulses is shown by the waveforms 166 and 168. The converter current pulses through switches 54a and 54b are represented by waveform 172 with alternate pulses representing the currents through switches 54a and 54b in succession. It is noted that the switches 54a and 54b have the same on-time and hence the same duty cycle. The pulses of waveform 172 are trapezoidal due to the inductor 56. The diode Dl is conductive during the off-time of the converter switches 54a and 54b as represented by the current pulses of waveform 174. The load current is represented by the wave form 176. When the frequency change signal is generated at time tl, the frequency of the inverter is reduced by a factor of N by the divide-by-N circuit 146. Accordingly, the waveforms 166 and 168 of the inverter are changed at time tl and the load current waveform 176 is likewise changed at time tl to the frequency of the running mode operation of the load.

Although the description of this invention has been given with reference to a particular embodiment, it is not to be construed in a limiting sense. Many variations and modifications will now occur to those skilled in the art. For a definition of the invention reference is made to the appended claims.

Claims

What is claimed is:

1. A ballast for controlling the operation of an electrical load which exhibits a non-linear or linear impedance characteristic, said ballast comprising:

a full-wave rectifier having a rectifier input for connection with an AC power source and producing a DC voltage at a rectifier output,

a switchmode buck converter having a converter input coupled with said rectifier output and having a converter output for supplying a controllable DC current,

a first controller coupled with said converter for switching said converter at a controlled first frequency and first duty cycle,

an inverter having an inverter input coupled with said converter output and having an inverter output for connection with said load for supplying alternating current to said load,

and a second controller coupled with said inverter for switching said inverter at a controlled second frequency and a fixed duty cycle.

2. The invention as defined in Claim 1 including:

means for reducing the frequency of the inverter after starting of the load to a preset value which sustains operation of the load.

3. The invention as defined in Claim 1 including:

current control means for maintaining the lamp current at a substantially constant value during running of the load.

. The invention as defined in Claim 3 wherein said current control means comprises:

means for comparing the actual lamp current with a predetermined value of lamp current and producing an error signal corresponding to the difference between the actual value and a predetermined value of lamp current,

and means responsive to said error signal for adjusting the duty cycle of the converter to minimize said error signal.

5. The invention as defined in Claim 1 including:

synchronizing means coupled with said converter and said inverter for synchronizing the frequency and phase of switching of said converter and inverter.

6. The invention as defined in Claim 1 including:

means for detecting the average DC voltage at said converter input, means responsive to said average DC voltage for shutting down the ballast when said average DC voltage exceeds a preset value.

7. The invention as defined in Claim 2 wherein:

said inverter is a full-bridge network and said second controller causes said inverter to operate at approximately fifty percent conduction duty cycle.

8. The invention as defined in Claim 7 wherein:

said second controller causes the switches of said inverter to switch at zero-voltage whereby said inverter produces square-wave output current pulses.

9. A ballast for controlling the operation of an electrical load which exhibits a non-linear impedance characteristic, said ballast comprising:

a switchmode converter having a converter input for connection with a source of DC power having a converter output for delivering a controllable DC current to said load,

an inverter having an inverter input coupled with said converter output and having an inverter output for connection with said load for supplying alternating current to said load, a starting transformer having a primary winding connected with said inverter output and a secondary winding connected with said load, said primary and secondary windings having a turns ratio for producing a starting voltage for said load and means effectively disabling said transformer and thereby producing a running voltage for said load which is less than said starting voltage.

10. The invention as defined in Claim 9 wherein:

said starting transformer is an autotransformer.

11. The invention as defined in Claim 10 including:

a first switch in series with said primary winding and a second switch in parallel with said secondary winding,

means for closing said first switch and opening said second switch for producing a starting voltage,

and means for opening said first switch and closing said second switch for producing a running voltage.

12. The invention as defined in Claim 11 including:

a capacitor connected in series with said primary winding, and means for decreasing the operating frequency of said inverter whereby the voltage across said load is reduced from a starting voltage to a running voltage.