US5659314A - Delta sigma modulator using a switched capacitor - Google Patents

Delta sigma modulator using a switched capacitor Download PDF

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Publication number
US5659314A
US5659314A US08/462,617 US46261795A US5659314A US 5659314 A US5659314 A US 5659314A US 46261795 A US46261795 A US 46261795A US 5659314 A US5659314 A US 5659314A
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capacitor
output
digital
voltage source
circuit
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US08/462,617
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Atsushi Tokura
Shinji Hattori
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Sharp Corp
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Sharp Corp
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Assigned to SHARP KABUSHIKI KAISHA reassignment SHARP KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HATTORI, SHINJI, TOKURA, ATSUSHI
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/43—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/456—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a first order loop filter in the feedforward path
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/464—Details of the digital/analogue conversion in the feedback path

Definitions

  • This invention relates to a delta sigma modulator and an oversampling delta sigma type analog-digital converter, and more particularly to a delta sigma modulator using switched capacitors.
  • a conventional delta sigma modulator using switched capacitors comprises a capacitor 5 that is charged with an input signal voltage, switches 1 and 2 that are switched on with a clock phi1 going high during a charging period shown in FIG. 7 for charging the capacitor 5 with the input signal voltage, switches 3 and 4 that are switched on with a clock phi2 going high during an operation period shown in FIG. 7 for outputting the electric charge held in the capacitor 5, and a circuit consisting of a capacitor 6 and an operational amplifier 7 for integrating the input signal voltage.
  • the delta sigma modulator further comprises a 1-bit analog-digital converter 8 for comparing the output voltage of the integrating circuit and a ground electric potential and outputting a 1-bit digital value according to the comparison, a flip-flop 9 that operates as a delay circuit for delaying the output of the analog-digital converter 8 by a period of one clock cycle, switches 10 and 11 for switching and outputting reference voltages +Vref and -Vref according to the delayed digital value, a capacitor 16 that is charged with one of the positive and negative reference voltages, switches 12 and 13 that are switched on with the clock phi1 and charge the capacitor 16 with one of the reference voltages switched by the switches 10 and 11, and switches 14 and 15 that are switched on with the clock phi2 and output the electric charge held in the capacitor 16 to the integrating circuit.
  • the switches 10 and 11, the capacitor 16, the switches 12 and 13, and the switches 14 and 15 as a whole constitute a 1-bit digital-analog conversion circuit.
  • the above-described conventional delta sigma modulation circuit requires 4 kinds of power supplies, the positive and negative operation power supplies for operating the operational amplifier 7 and the comparator constituting the 1-bit analog-digital converter 8, and the positive and negative reference power supplies for the 1-bit digital-analog conversion circuit. Also, if there is a difference between the absolute values of the voltages of the positive and negative reference power supplies of the digital-analog conversion circuit, the feedback or the positive and negative step electric charge will be different and the spectrum of the output signal will be greatly influenced.
  • FIG. 4 shows the spectrum of the output signal of a simulated result under an ideal condition with no difference between the absolute values of positive and negative step voltages
  • FIG. 5 shows the spectrum of the output signal of a simulated result as under the condition as FIG.
  • this delta sigma type A/D conversion circuit tries to obtain the positive and negative reference levels whose absolute values are equal, by making use of the thrust-up or thrust-down to a GND level caused by a feedback capacitor 16, on the basis of the voltage -VR of a kind of reference power supply.
  • FIG. 8A also requires three kinds of power supplies, power supplies for operation and the reference power supply, and this reference power supply is required to be a highly accurate power supply whose impedance is low enough to keep a constant voltage irrespective of noise caused by the charging and discharging of capacity load, so there is the disadvantage that the power supply circuit becomes complex and large in scale and the current consumption in this portion causes an increase in current consumption of the entire device. Also, in FIG. 8A there is required a logic circuit such as 80 for generating timing signals ( ⁇ 1A to ⁇ 2B) controlling the feedback capacitor 16, so this will further increase the circuit scale and the current consumption.
  • An object of the present invention is to provide a delta sigma modulator which dispenses with positive and negative reference power supplies.
  • Another object of the present invention is to provide a delta sigma modulator which is suitable for use in the modem and makes possible miniaturization and low cost.
  • Still another object of the present invention is to provide a delta sigma modulator which is capable of constituting a high order modulator by combining units.
  • a further object of the present invention is to provide an oversampling delta sigma type analog-digital converter which includes any one of the above-described delta sigma modulators.
  • a delta sigma modulator comprising addition means for adding an input signal and a feedback signal, integration means for integrating an output of said addition means, analog-digital conversion means for quantizing said output of said integration means to convert it into a digital signal, delay means for delaying an output of said analog-digital conversion means, and digital-analog conversion means for decoding an output of said delay means and outputting said feedback signal, wherein:
  • said addition means has a first capacitor that is charged with an input voltage during a first period, and adds at a second period an electric charge charged in the first capacitor during said first period and an electric charge of said feedback signal outputted from said digital-analog conversion means;
  • said integration means has operational amplifying means and a second capacitor for connecting an output of said operational amplifying means with a negative input of said operational amplifying means;
  • said digital-analog conversion means has a third capacitor, a fourth capacitor having a capacity equal to said third capacity, and switching means for switching a first and a second voltage sources so that in said first period said third capacitor is charged with said first voltage source and said fourth capacitor is charged with said second voltage source, and in said second period, when said output of said delay means is 0, a voltage to be applied to said third capacitor is switched to said second voltage source to output an electric charge equal to an electrostatic capacity of said third capacitor multiplied by a voltage obtained by subtracting an electric potential of said first voltage source from an electric potential of said second voltage source, and when said output of said delay means is 1, a voltage to be applied to said fourth capacitor is switched to said first voltage source to output an electric charge equal to an electrostatic capacity of said fourth capacitor times a voltage obtained by subtracting an electric potential of said second voltage source from an electric potential of said first voltage source.
  • the switching means may be constructed such that it, in said first period, connects ground to second terminals of said third and fourth capacitors, connects said first voltage source to a first terminal of said third capacitor, and connects said second voltage source to a first terminal of said fourth capacitor, in said second period, connects second terminals of said third and fourth capacitors to the output, and when said output of said delay means is 0, connects said second voltage source to said first terminal of said third capacitor, and when said output of said delay means is 1, connects said first voltage source to said first terminal of said fourth capacitor.
  • a quantity of electric charge outputted from said digital-analog conversion means is preferable to be set by said electrostatic capacities of said third and fourth capacitors.
  • the digital-analog conversion means may connect said first and second voltage sources to any of a positive power-supply electric potential of power supplies in operation common to said operational amplifying means, said analog-digital conversion means, and an external connection circuit, a negative power-supply electric potential of power supplies in operation, and an intermediate electrical potential between said positive and negative power-supply electric potentials of the power supplies in operation.
  • the delta sigma modulator may be constituted by a combination of two or more sets of said addition means, said integration means, and said digital-analog conversion means.
  • the addition means by the addition means the first capacitor is charged in the first period with an input voltage, and in the second period, an electric charge equal to the input voltage charged in the first period in the first capacitor multiplied by the electrostatic capacity of the first capacitor, and an electric charge of the feedback signal from the digital-analog conversion means are added and outputted.
  • the integration means the output of the addition means is integrated and outputted.
  • the analog-digital conversion means the output of the integration means is quantized and converted into a digital signal and outputted.
  • the delay means the digital signal of the output of the analog-digital conversion means is delayed by a predetermined time and outputted.
  • the digital-analog conversion means in the first period the third capacitor is charged with the first voltage source and the fourth capacitor having the same capacity with the third capacitor is charged with the second voltage source, and in the second period, when the output of the delay means is 0, a voltage to be applied to the third capacitor is switched to the second voltage source to output an electric charge equal to an electrostatic capacity of the third capacity multiplied by a voltage obtained by subtracting an electric potential of the first voltage source from an electric potential of the second voltage source, and when the output of the delay means is 1, a voltage to be applied to the fourth capacitor is switched to the first voltage source to output an electric charge equal to an electrostatic capacity of the fourth capacity multiplied by a voltage obtained by subtracting an electric potential of the second voltage source from an electric potential of the first voltage source.
  • the digital signal of the output of the delay circuit is decoded to generate a feedback signal.
  • the electric charge that is outputted from the digital-analog conversion circuit and moved to the integrator does not depend upon the reference power supply but is determined by the capacity of the capacitor, positive and negative reference power supplies for setting a step electric charge quantity outputted from the digital-analog conversion circuit become unnecessary.
  • the feedback signal includes an off-set, that component will be integrated by the integrator, so the off-set error is accumulated and an erroneous modulation output is outputted with a particular frequency.
  • a voltage for charging the capacitor supplying the above-described electric charge is only a power-supply voltage, regardless of an input to the digital-analog conversion circuit. Therefore, the absolute value of a quantity of electric charge to be outputted does not change by its polarity. As a result, the component corresponding to the off-set of the feedback signal is eliminated, noise is reduced, and the signal-to-noise ratio of the modulation output is improved.
  • FIG. 1 is a circuit diagram showing a first embodiment of a delta sigma modulator of the present invention
  • FIG. 2 is a timing diagram showing the output signal of each part of the first embodiment
  • FIG. 3 is a circuit diagram showing a second embodiment of the delta sigma modulator of the present invention.
  • FIG. 4 is a diagram showing the spectrum of the ideal output signal of the delta sigma modulator
  • FIG. 5 is a diagram showing the spectrum of the output signal including a difference of 10% between the absolute values of the positive and negative reference voltages of the delta sigma modulator;
  • FIG. 6 is a circuit diagram showing an example of a conventional delta sigma modulator
  • FIG. 7 is a timing diagram showing the output signal of each part of the conventional example of FIG. 6;
  • FIG. 8A is a circuit diagram showing another example of a conventional delta sigma modulator.
  • FIG. 8B is a timing diagram showing the output signal of the logic circuit 80.
  • the delta sigma modulator of this embodiment comprises an addition circuit 81 as addition means for adding a feedback signal to an input voltage, an integrating circuit 82 as integrating means for integrating an output of the addition circuit 81, a 1-bit analog-digital converter 28 as analog-digital conversion means for quantizing the output of the integrating circuit 82 to convert it into a digital signal, a flip-flop 29 as delay means for delaying the digital signal of the output of the analog-digital converter 28 by one cycle, and a digital-analog conversion circuit 83 as digital-analog conversion means for decoding the digital signal of the output of the flip-flop 29 to generate a feedback signal.
  • the addition circuit 81 is constituted by a first capacitor 25 with a capacity Ci that is charged with an input signal, switches 21 and 22 that are switched on with a clock phi1 going to a logic high during a charging period and charges the capacitor 25 with an input signal voltage, and switches 23 and 24 that are switched on with a clock phi2 going to a logic high during an operation period of the reverse phase and output the electric charge held in the capacitor 25.
  • the integrating circuit 82 is constituted by an operational amplifier 27 as operational amplifying means and a second capacitor 26 with a capacity Cs for connecting the output of the operational amplifier 27 and a negative input.
  • the digital-analog conversion circuit 83 is constituted by a third capacitor 36 with a capacity Cr for outputting an electric charge corresponding to fed back digital data, a fourth capacitor 37 having the same capacity Cr, switches and 33 that are switched on with the clock phi1 and constitute one structural element of switching means for adding a power supply electric potential and a ground electric potential to the capacitors 36 and 37, switches 30 and 31 constituting one structural element of switching means for switching a voltage that is added to the capacitors 36 and 37 with a feedback digital signal Dz -1 and its inverted signal Dz -1 , and switches 34 and 35 for connecting synchronized with a clock phi2 the voltage switched with these switches and the capacitors 36 and 37.
  • the switches 21 and 22 will be on and the capacitor 25 will be charged with an input voltage Vin. Also, the switches 32 and 33 are switched on, so the capacitor 36 is connected to the ground electric potential and the held electric charge is discharged. Further, the capacitor 37 is charged with Vss which is a negative power-supply voltage. Since the switch 24 connected to the input of the operational amplifier 27 is open the output does not change.
  • the voltage of the capacitor 26 becomes the same as a value ⁇ Cr/Cs ⁇ Vss obtained by adding a previous value to the input signal voltage Vin multiplied by the ratio of Ci/Cs and the capacity Ci of the capacitor 25 and the capacity Cs of the capacitor 26, and then adding or subtracting the power supply voltage Vss multiplied according to the output of the delay circuit by the ratio Cr/Cs of the capacity Cr of the capacitors 36, 37 and the capacity Cs of the capacitor 26.
  • Ci/Cs is equivalent to the coefficient of the integrator and is a constant value that is determined by the dynamic range of the circuit or the input voltage. Therefore, the feedback step voltage becomes ⁇ Cr/Cs ⁇ Vss.
  • the ground and the negative power-supply voltage have been used as the voltage sources of the 1-bit digital-analog conversion circuit which is a feedback circuit, there is also a conceivable structure in which a positive power-supply voltage and the ground, or a positive power-supply voltage and a negative power-supply voltage are used.
  • two blocks each comprising an addition circuit 81, an integrating circuit 82, and a 1-bit digital-analog conversion circuit 83 are connected in series and constitute a second order delta sigma modulator in which an integration is performed twice.
  • the operation of each part is identical with that of the first embodiment.
  • a plurality of blocks comprising an addition circuit 81, an integrating circuit 82, and a 1-bit digital-analog conversion circuit 83 may be connected in parallel, in series or with a combination thereof to constitute a delta sigma modulator of more than one order. If a higher order delta sigma modulator is made by increasing the number of stages, the noise characteristic will be more improved. Therefore, if cost is not taken into consideration, a second order than a first order or a third order than a second order is preferable to be used.
  • the noise characteristic can be improved.

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  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Filters That Use Time-Delay Elements (AREA)
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Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6069722A (en) * 1996-09-05 2000-05-30 Alcatel Transmitter for optically transmitting analog electric signals, and digital transmission system
US6140950A (en) * 1998-08-17 2000-10-31 Linear Technology Corporation Delta-sigma modulator with improved full-scale accuracy
EP1146648A2 (en) * 2000-04-13 2001-10-17 Matsushita Electric Industrial Co., Ltd. Delta sigma analog-to-digital converter
US6400295B1 (en) * 1999-11-19 2002-06-04 Alcatel Transducer interface arrangement including a sigma-delta modulator with offset correction and with gain setting
US6404368B1 (en) * 1999-09-17 2002-06-11 Nec Corporation Analog and digital ΔΣ modulator
US6556159B1 (en) * 2001-09-17 2003-04-29 Cirrus Logic, Inc. Variable order modulator
EP1417764A1 (en) * 2000-09-05 2004-05-12 Texas Instruments Incorporated Density-modulated dynamic dithering circuits and method for delta-sigma converter
US6869216B1 (en) * 2003-03-27 2005-03-22 National Semiconductor Corporation Digitizing temperature measurement system
US20050116849A1 (en) * 2001-09-17 2005-06-02 Cirrus Logic, Inc. Feedback steering delta-sigma modulators and systems using the same
US20060187097A1 (en) * 2005-02-23 2006-08-24 Enrico Dolazza Sigma delta converter with flying capacitor input
US20070171118A1 (en) * 2005-08-05 2007-07-26 Sanyo Electric Co., Ltd. Switch Control Circuit, AE Modulation Circuit, and AE Modulation Ad Converter
US20070236375A1 (en) * 2006-04-11 2007-10-11 Stmicroelectronics Sa Delta-sigma modulator provided with a charge sharing integrator
US20080074302A1 (en) * 2006-09-13 2008-03-27 Taiji Akizuki Delta-sigma AD converter
US7489263B1 (en) 2007-09-28 2009-02-10 Cirrus Logic, Inc. Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with multi-phase reference application
US7492296B1 (en) * 2007-09-28 2009-02-17 Cirrus Logic, Inc. Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with input signal and common-mode current nulling
US20120007760A1 (en) * 2009-04-30 2012-01-12 Widex A/S Input converter for a hearing aid and signal conversion method
US20120112947A1 (en) * 2009-01-12 2012-05-10 Zentrum Mikroelektronik Dresden Ag Wide range charge balancing capacitive-to-digital converter
US8384579B2 (en) * 2011-07-19 2013-02-26 Freescale Semiconductor, Inc. Systems and methods for data conversion
US8531324B2 (en) 2011-07-19 2013-09-10 Freescale Semiconductor, Inc. Systems and methods for data conversion
US8830097B2 (en) 2011-09-02 2014-09-09 Spansion Llc A/D converter
US20150055552A1 (en) * 2013-08-26 2015-02-26 Broadcom Corporation Configurable rf carrier phase noise shaping
US20160004354A1 (en) * 2006-11-14 2016-01-07 Cypress Semiconductor Corporation Capacitance to code converter with sigma-delta modulator
US20170163260A1 (en) * 2015-12-04 2017-06-08 National Chiao Tung University Impedance-to-digital converter, impedance-to-digital converting device, and method for adjustment of impedance-to-digital converting device
US20170257097A1 (en) * 2015-12-04 2017-09-07 National Chiao Tung University Impedance-to-digital converter, impedance-to-digital converting device, and method for adjustment of impedance-to-digital converting device
US20190207513A1 (en) * 2017-12-28 2019-07-04 Texas Instruments Incorporated Output current boosting of capacitor-drop power supplies
US10601431B2 (en) 2018-06-28 2020-03-24 Silicon Laboratories Inc. Time-to-voltage converter using correlated double sampling
US10693482B2 (en) * 2018-06-27 2020-06-23 Silicon Laboratories Inc. Time-to-voltage converter with extended output range
USRE48275E1 (en) 2015-06-22 2020-10-20 Silicon Laboratories Inc. Digital-to-time converter
US20230028586A1 (en) * 2021-07-23 2023-01-26 Hangzhou Vango Technologies, Inc. Method, apparatus and device for simultaneously sampling multiple-channel signals, and medium
US20230318619A1 (en) * 2022-04-05 2023-10-05 Stmicroelectronics (Research & Development) Limited Photodiode current compatible input stage for a sigma-delta analog-to-digital converter

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US6670902B1 (en) * 2002-06-04 2003-12-30 Cirrus Logic, Inc. Delta-sigma modulators with improved noise performance

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Cited By (50)

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Publication number Priority date Publication date Assignee Title
US6069722A (en) * 1996-09-05 2000-05-30 Alcatel Transmitter for optically transmitting analog electric signals, and digital transmission system
US6140950A (en) * 1998-08-17 2000-10-31 Linear Technology Corporation Delta-sigma modulator with improved full-scale accuracy
US6404368B1 (en) * 1999-09-17 2002-06-11 Nec Corporation Analog and digital ΔΣ modulator
US6400295B1 (en) * 1999-11-19 2002-06-04 Alcatel Transducer interface arrangement including a sigma-delta modulator with offset correction and with gain setting
EP1146648A2 (en) * 2000-04-13 2001-10-17 Matsushita Electric Industrial Co., Ltd. Delta sigma analog-to-digital converter
US6473018B2 (en) * 2000-04-13 2002-10-29 Matsushita Electric Industrial Co., Ltd. Delta sigma analog-to-digital converter
EP1146648A3 (en) * 2000-04-13 2004-01-07 Matsushita Electric Industrial Co., Ltd. Delta sigma analog-to-digital converter
EP1417764A4 (en) * 2000-09-05 2004-06-02 Texas Instruments Inc DENSITY MODULATED DYNAMIC DITHER CIRCUITS AND METHOD FOR A DELTA SIGMA CONVERTER
EP1417764A1 (en) * 2000-09-05 2004-05-12 Texas Instruments Incorporated Density-modulated dynamic dithering circuits and method for delta-sigma converter
US6933871B2 (en) 2001-09-17 2005-08-23 Cirrus Logic, Inc. Feedback steering delta-sigma modulators and systems using the same
US20050116849A1 (en) * 2001-09-17 2005-06-02 Cirrus Logic, Inc. Feedback steering delta-sigma modulators and systems using the same
US6556159B1 (en) * 2001-09-17 2003-04-29 Cirrus Logic, Inc. Variable order modulator
US6962436B1 (en) * 2003-03-27 2005-11-08 National Semiconductor Corporation Digitizing temperature measurement system and method of operation
US6869216B1 (en) * 2003-03-27 2005-03-22 National Semiconductor Corporation Digitizing temperature measurement system
US20060187097A1 (en) * 2005-02-23 2006-08-24 Enrico Dolazza Sigma delta converter with flying capacitor input
US7230555B2 (en) * 2005-02-23 2007-06-12 Analogic Corporation Sigma delta converter with flying capacitor input
US20070171118A1 (en) * 2005-08-05 2007-07-26 Sanyo Electric Co., Ltd. Switch Control Circuit, AE Modulation Circuit, and AE Modulation Ad Converter
US7403151B2 (en) * 2005-08-05 2008-07-22 Sanyo Electric Co., Ltd. Switch control circuit, ΔΣ modulation circuit, and ΔΣ modulation AD converter
US7474241B2 (en) * 2006-04-11 2009-01-06 Stmicroelectronics, Sa Delta-sigma modulator provided with a charge sharing integrator
US20070236375A1 (en) * 2006-04-11 2007-10-11 Stmicroelectronics Sa Delta-sigma modulator provided with a charge sharing integrator
US20080074302A1 (en) * 2006-09-13 2008-03-27 Taiji Akizuki Delta-sigma AD converter
US7466257B2 (en) * 2006-09-13 2008-12-16 Panasonic Corporation Delta-sigma AD converter
US10928953B2 (en) 2006-11-14 2021-02-23 Cypress Semiconductor Corporation Capacitance to code converter with sigma-delta modulator
US20160004354A1 (en) * 2006-11-14 2016-01-07 Cypress Semiconductor Corporation Capacitance to code converter with sigma-delta modulator
US9977551B2 (en) * 2006-11-14 2018-05-22 Cypress Semiconductor Corporation Capacitance to code converter with sigma-delta modulator
US7489263B1 (en) 2007-09-28 2009-02-10 Cirrus Logic, Inc. Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with multi-phase reference application
US7492296B1 (en) * 2007-09-28 2009-02-17 Cirrus Logic, Inc. Discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with input signal and common-mode current nulling
US20120112947A1 (en) * 2009-01-12 2012-05-10 Zentrum Mikroelektronik Dresden Ag Wide range charge balancing capacitive-to-digital converter
US8410969B2 (en) * 2009-01-12 2013-04-02 Zentrun Mikroelektronic Dresden AG Wide range charge balancing capacitive-to-digital converter
US8493256B2 (en) * 2009-04-30 2013-07-23 Widex A/S Input converter for a hearing aid and signal conversion method
US9041574B2 (en) 2009-04-30 2015-05-26 Widex A/S Input converter for a hearing aid and signal conversion method
US20120007760A1 (en) * 2009-04-30 2012-01-12 Widex A/S Input converter for a hearing aid and signal conversion method
US8531324B2 (en) 2011-07-19 2013-09-10 Freescale Semiconductor, Inc. Systems and methods for data conversion
TWI575883B (zh) * 2011-07-19 2017-03-21 飛思卡爾半導體公司 用於資料轉換的系統及方法
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