TWI676251B - 半導體裝置、半導體裝置的製造方法及電極板 - Google Patents
半導體裝置、半導體裝置的製造方法及電極板 Download PDFInfo
- Publication number
- TWI676251B TWI676251B TW107109216A TW107109216A TWI676251B TW I676251 B TWI676251 B TW I676251B TW 107109216 A TW107109216 A TW 107109216A TW 107109216 A TW107109216 A TW 107109216A TW I676251 B TWI676251 B TW I676251B
- Authority
- TW
- Taiwan
- Prior art keywords
- group
- groove
- electrode plate
- linear portion
- solder
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 50
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000002184 metal Substances 0.000 claims abstract description 157
- 229910052751 metal Inorganic materials 0.000 claims abstract description 157
- 229910000679 solder Inorganic materials 0.000 claims abstract description 145
- 230000002093 peripheral effect Effects 0.000 claims abstract description 52
- 238000003475 lamination Methods 0.000 claims abstract description 7
- 239000011347 resin Substances 0.000 claims description 27
- 229920005989 resin Polymers 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 11
- 238000009736 wetting Methods 0.000 description 19
- 238000009792 diffusion process Methods 0.000 description 17
- 238000010586 diagram Methods 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L23/4012—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws for stacked arrangements of a plurality of semiconductor devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/8321—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
一種半導體裝置包括電極板、金屬構件、以及連接金屬構件與電極板的焊料。第一槽以及第二槽組被設置在電極板的表面上。第一槽具有第一到第四線性部。第二槽組被佈置在由第一槽所圍繞的範圍內,且在外周圍側上具有端部分,端部分與第一槽連接。第二槽組包括第一組到第四組。每一組包括複數個第二槽,其與第一到第四線性部連接。當在電極板與金屬構件的疊層方向上觀看金屬構件時,金屬構件的區域的外周圍邊緣橫越第一組到第四組,此區域被與焊料連接。
Description
本發明關於一種半導體裝置、半導體裝置的製造方法及電極板。
日本專利申請案公開號第2016-195222號(JP 2016-195222 A)中所揭露的半導體裝置包括電極板、金屬構件、以及連接電極板與金屬構件的焊料。以環形形狀延伸的複數個環形槽被設置在電極板的表面上。電極板的中心部被多個環形槽所圍繞。金屬構件經由焊料與設置有複數個環形槽的範圍連接。
前述的複數個環形槽被設置來阻止焊料的潤濕及擴散。藉由在電極板中設置多個環形槽,各種類型之不同尺寸的金屬構件可被適當地焊接到電極板。例如,以下將說明設置三個環形槽的情況(換言之,在最外圍側上設置第一環形槽、在第一環形槽的內周圍側上設置第二環形槽、以及在第二環形槽的內周圍側上設置第三環形槽的情況)。
當小於第三環形槽的金屬構件被焊接到電極板時,金屬構件被焊接到第三環形槽的內周圍側上的範圍。在此情況下,從金屬構件與電極板之間的位置朝向外周圍側流出的焊料於電極板的表面上朝向外周圍側潤濕並擴散。一旦潤濕且擴散的焊料到達第三環形槽,焊料的潤濕及擴散在第三環形槽處停止。因此,防止焊料之不必要的潤濕及擴散,並形成具有適當形狀的焊料填角(solder fillet)。
當大於第三環形槽並小於第二環形槽的金屬構件被焊接到電極板時,金屬構件被佈置在第二環形槽的內周圍側上的範圍內,使得金屬構件覆蓋第三環形槽,且金屬構件被焊接到第二環形槽的內周圍側上的範圍。在此情況下,從金屬構件與電極板之間的位置朝向外周圍側流出的焊料的潤濕及擴散在第二環形槽處停止。因此,形成具有適當形狀的焊料填角。
當大於第二環形槽並小於第一環形槽的金屬構件被焊接到電極板時,金屬構件被佈置在第一環形槽的內周圍側上的範圍內,使得金屬構件覆蓋第二環形槽及第三環形槽,且金屬構件被焊接到第一環形槽的內周圍側上的範圍。此情況下,從金屬構件與電極板之間的位置朝向外周圍側流出的焊料的潤濕及擴散在第一環形槽處停止。因此,形成具有適當形狀的焊料填角。
如同到目前為止所述,只要金屬構件小於第一環形槽,不同尺寸的各種金屬構件可被焊接到電極板。
在JP 2016-195222 A所描述的半導體裝置中,當環形槽及金屬構件具有特定位置關係時,存在金屬構件無法被適當地焊接到電極板的情況。在下文中,第三環形槽與金屬構件之間的位置關係作為範例被說明。然而,其它的環形槽也是同樣的情況。當金屬構件具有與第三環形槽的尺寸大致相同的尺寸時,金屬構件的外周圍邊緣被佈置為相鄰於第三環形槽。在此情況下,從金屬構件與電極板之間的位置朝向外周圍側流出的焊料的潤濕及擴散在第三環形槽處停止,或可能通過第三環形槽並到達外周圍側。焊料的潤濕及擴散範圍依據位置而不同,且這可能導致焊料的扭曲形狀。此外,當金屬構件具有與第三環形槽的尺寸大致相同的尺寸時,由於誤差,存在金屬構件的一部分從第三環形槽向外側伸出的情況。此外,例如,當矩形的金屬構件被使用於方形的第三環形槽時,存在金屬構件的一部分從第三環形槽向外側伸出的情況。當金屬構件的一部分從第三環形槽如上所述地向外側伸出時,焊料的潤濕及擴散在金屬構件從第三環形槽向外側伸出的位置處到達第二環形槽,並且,在金屬構件未從第三環形槽向外側伸出的位置處,焊料在第三環形槽處停止。因此,焊料會變成扭曲形狀。當焊料如上所述地具有扭曲形狀時,傾向於在焊料內部產生高應力,降低了焊料的可靠性。在大量製造時,焊料的形狀不穩定且焊料的品質廣泛地變化。如同到目前為止所述,根據JP 2016-195222 A所描述的技術,存在無法準確地控制焊料的潤濕及擴散範圍的情況。
在JP 2016-195222 A中,塊狀的金屬構件被焊接到電極板。然而,當其他類型的金屬構件(例如,半導體晶片的表面電極等)被焊接到電極板時,發生的類似的問題。在本說明書中,所提供的是可將更多種類的金屬構件適當地焊接到電極板的技術。
本發明的第一態樣包括電極板、金屬構件及使金屬構件與電極板連接的焊料。在電極板的表面上,設置第一槽及第二槽組。第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且第一槽延伸為環形形狀。第二槽組被佈置在由第一槽所圍繞的範圍內,且在外周圍側上具有與第一槽連接的端部分。第二槽組包括複數個第二槽。第二槽組包括第一組、第二組、第三組及第四組,第一組具有與第一線性部連接的複數個第二槽,第二組具有與第二線性部連接的複數個第二槽,第三組具有與第三線性部連接的複數個第二槽,第四組具有與第四線性部連接的複數個第二槽。焊料連接範圍內之電極板的表面與金屬構件的表面,金屬構件的表面面對電極板的表面。當在電極板與金屬構件的疊層方向上觀看金屬構件時,金屬構件的區域的外周圍邊緣被佈置以橫越第一組、第二組、第三組及第四組,此區域被與焊料連接。
只要第一槽具有第一到第四線性部被設置為沿著矩形形狀的各個側邊延伸的結構,且延伸為環形形狀,其餘部分可能為任何形狀。例如,第一槽可具有矩形形狀,其帶有倒角。
在此半導體裝置中,第一槽及第二槽組被設置在電極板的表面中。第二槽組被佈置在由第一槽所圍繞的範圍內,且其外周圍側上的端部分被與第一槽連接。此外,金屬構件的區域的外周圍邊緣被佈置以橫越第二槽組(換言之,第一組、第二組、第三組及第四組),此區域被與焊料連接。因此,從金屬構件與電極板之間的位置流出到外周圍側的焊料在焊接的同時沿著第二槽組輕易地潤濕並擴散到外周圍側,且因此輕易地到達第一槽。一旦焊料到達第一槽,焊料流入到第一槽中,並限制焊料潤濕及擴散到第一槽的外周圍側。在此半導體裝置中,在第一槽的內周圍側上,藉由第二槽組促進焊料的潤濕及擴散,並藉由第一槽限制焊料潤濕及擴散到第一槽的外周圍側。因此,只要金屬構件的區域(此區域被與焊料連接)的外周圍邊緣被佈置以橫越第二槽組,焊料的潤濕及擴散以穩定的方式到達第一槽,且無論金屬構件的尺寸及形狀為何,焊料在第一槽處被停止。根據此結構,更多種類的金屬構件可被適當地焊接到電極板。
在本發明的第一態樣中,電極板在範圍的中心可包括平坦表面,且平坦表面不會具有第二槽組。
在本發明的第一態樣中,每一個第二槽可能不會與其他第二槽連接。亦即,第一組的第二槽可能不會與第二組到第四組的第二槽連接。焊料可被樹脂覆蓋。
在本發明的第一態樣中,每一個第二槽可能垂直地被與第一槽連接。
在本發明的第一態樣中,半導體晶片可透過焊料與在電極板的相反側上的金屬構件的表面連接。
在本發明的第一態樣中,金屬構件可為半導體晶片的表面電極。
本發明的第二態樣關於一種半導體裝置的製造方法。本發明的第二態樣包括透過焊料使金屬構件與電極板連接。在電極板的表面上,設置第一槽及第二槽組。第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且第一槽延伸為環形形狀。第二槽組被佈置在由第一槽所圍繞的範圍內,且在外周圍側上具有與第一槽連接的端部分。第二槽組包括複數個第二槽,且第二槽組包括第一組、第二組、第三組及第四組,第一組具有與第一線性部連接的複數個第二槽,第二組具有與第二線性部連接的複數個第二槽,第三組具有與第三線性部連接的複數個第二槽,第四組具有與第四線性部連接的複數個第二槽。當透過焊料使金屬構件與電極板連接時,使電極板與金屬構件彼此面對,且當在電極板與金屬構件的疊層方向上觀看金屬構件時,金屬構件的區域的外周圍邊緣被佈置以橫越第一組、第二組、第三組及第四組,此區域被與焊料連接,並且,在此狀態下,範圍及區域藉由焊料被相互連接。
本發明的第三態樣關於一種用於連接半導體晶片的電極板。本發明的第三態樣包括電極板,並且,在電極板的表面上設置第一槽及第二槽組。第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且第一槽延伸為環形形狀。第二槽組被佈置在由第一槽所圍繞的範圍內,且在外周圍側上具有與第一槽連接的端部分。第二槽組包括複數個第二槽,且第二槽組包括第一組、第二組、第三組及第四組,第一組具有與第一線性部連接的複數個第二槽,第二組具有與第二線性部連接的複數個第二槽,第三組具有與第三線性部連接的複數個第二槽,第四組具有與第四線性部連接的複數個第二槽。範圍被用於結合焊料。
本說明書還提出一種藉由透過焊料連接金屬構件與具有第一槽及第二槽組的電極板而用於製造半導體裝置的方法,以及一種用於此方法的電極板。
根據實施例,圖1所顯示的半導體裝置10具有作為絕緣體的樹脂層60、以及從樹脂層60向外突出的主端子16及信號端子18。圖5及圖6顯示半導體裝置10的製造流程。如圖5所示,在形成樹脂層60之前,主端子16及信號端子18被相互連接。在下文中,使主端子16與信號端子18相互連接的部分被稱為引線框架12。引線框架12包括散熱片14a、14b。在圖1中,散熱片14a、14b被樹脂層60覆蓋。如圖5所示,絕緣閘雙極電晶體(insulated gate bipolar transistor)(IGBT)20a與二極體22a被佈置在散熱片14a上。金屬塊30a被佈置在IGBT 20a上。金屬塊32a被佈置在二極體22a上。圖6所示的電極板40a被佈置在圖5所示的金屬塊30a、32a上。如圖5所示,IGBT 20b與二極體22b被佈置在散熱片14b上。金屬塊30b被佈置在IGBT 20b上。金屬塊32b被佈置在二極體22b上。圖6中的電極板40b被佈置在圖5所示的金屬塊30b、32b上。金屬塊30a、30b、32a、32b及電極板40a、40b由銅所製成。在圖1中,IGBT 20a、20b、二極體22a、22b、金屬塊30a、30b、32a、32b及電極板40a、40b被樹脂層60覆蓋。然而,電極板40a、40b的上表面從樹脂層60中暴露出來。IGBT 20a、20b及二極體22a、22b的主要部件分別藉由焊料與其它構件連接。IGBT 20a、20b及二極體22a、22b的連接結構一般為相同的。因此,說明IGBT 20a的連接結構。
如圖2所示,IGBT 20a包括信號電極70、發射電極72、半導體基板74及收集電極76。在半導體基板74的上表面上,佈置信號電極70與發射電極72。雖然圖2顯示一個信號電極70,但複數個信號電極70被設置在半導體基板74的上表面上。在半導體基板74的下表面上,佈置收集電極76。IGBT 20a被佈置在散熱片14a上。收集電極76藉由焊料80被與散熱片14a的上表面連接。複數個信號端子18被佈置在IGBT 20a的側面上。IGBT 20a的每一個信號電極70藉由接合線19而被與對應的信號端子18連接。金屬塊30a被佈置在IGBT 20a的發射電極72上。發射電極72藉由焊料82被與金屬塊30a的下表面連接。電極板40a被佈置在金屬塊30a上。金屬塊30a的上表面藉由焊料84被與電極板40a的下表面連接。散熱片14a的上表面、IGBT 20a、金屬塊30a及電極板40a的下表面被樹脂層60覆蓋。
如圖3所示,延伸為環形形狀的第一槽41及線性地延伸的複數個第二槽42被設置在電極板40a的下表面中。第一槽41沿著具有圓角的矩形形狀延伸,且具有四個線性部41a到41d。複數個第二槽42被設置在由第一槽41所圍繞的範圍內部。複數個第二槽42從由第一槽41所圍繞的範圍的中心側朝向外周圍側延伸。在外周圍側上之每一個第二槽42的端部分被與第一槽41連接。複數個第二槽42被與第一槽41之對應的線性部41a到41d連接。在下文中,與第一線性部41a連接的複數個第二槽42被稱為第一組,與第二線性部41b連接的複數個第二槽42被稱為第二組,與第三線性部41c連接的複數個第二槽42被稱為第三組,且與第四線性部41d連接的複數個第二槽42被稱為第四組。第一組的每一個第二槽42垂直地延伸到第一線性部41a。第二組的每一個第二槽42垂直地延伸到第二線性部41b。第三組的每一個第二槽42垂直地延伸到第三線性部41c。第四組的每一個第二槽42垂直地延伸到第四線性部41d。如圖2所示,第一槽41較第二槽42更深。如圖3所示,每一個第二槽42除了其被與第一槽41連接的部分之外未被與其他槽連接。這意味著每一個第二槽42獨立於其他的第二槽42。在由第一槽41所圍繞的範圍的中心,設置平坦表面44,在平坦表面44中未設置第二槽42。
圖3中的虛線顯示金屬塊30a的位置。當在金屬塊30a與電極板40a的疊層方向上觀看金屬塊30a時,金屬塊30a被佈置在由第一槽41所圍繞的範圍內。當在圖3所示的疊層方向上觀看金屬塊30a時,金屬塊30a的外周圍邊緣被佈置以橫越(相交)第一組到第四組的第二槽42。如圖2所示,焊料84被結合到金屬塊30a的大致整個上表面。同樣的,焊料84在由第一槽41所圍繞的大致整個範圍被結合到電極板40a。焊料84被結合到第一槽41的內表面及每一個第二槽42的內表面。
圖4為沿著圖3的線IV-IV所取之半導體裝置10的剖面圖。圖4顯示焊料84的剖面,在圖3中之由第一槽41所圍繞的範圍中,焊料84覆蓋未與金屬塊30a重疊的範圍。在圖4所顯示的範圍內,凹陷與突起沿著第二槽42被形成在焊料84的表面中。由於在焊料84的表面中存有凹陷與突起,樹脂層60進入焊料84的表面中的凹陷部分。因此,樹脂層60較不會從焊料84分離,且樹脂層60因此能夠適當地保護IGBT 20a等。
接下來,說明半導體裝置10的製造方法。首先,如圖5所示,IGBT 20a、20b、二極體22a、22b、金屬塊30a、30b、32a、32b被焊接到引線框架12的散熱片14a、14b上。更詳細地,在散熱片14a上依序疊層焊料80的焊料片、IGBT 20a、及焊料82的焊料片及金屬塊30a。對於IGBT 20b及二極體22a、22b,以類似的方式疊層每一個構件。接下來,在回流爐(reflow furnace)中加熱引線框架12。接著,每一個焊料片融化並接著被固化。如圖2所示,當焊料80的焊料片融化並接著被固化時,焊料80被結合到散熱片14a及收集電極76。因此,散熱片14a及收集電極76藉由焊料80而相互連接。當焊料82的焊料片融化並接著被固化時,焊料82被結合到發射電極72及金屬塊30a。因此,發射電極72及金屬塊30a藉由焊料82而相互連接。IGBT 20b及二極體22a、22b亦透過焊料以類似的方式與每一個構件相互連接。
接下來,IGBT 20a、20b的每一個信號電極70透過接合線19與對應的信號端子18相連接。
接下來,如圖6所示,電極板40a被與金屬塊30a、32a連接,且電極板40b被與金屬塊30b、32b連接。由於用來使電極板與金屬塊連接的方法通常為相同的,僅說明用來使電極板40a與金屬塊30a連接的方法。首先,如圖7所示,電極板40a被佈置使得在第一槽41及第二槽42被設置的側上的表面面向上方。接著,焊料片84a被佈置在第一槽41及第二槽42被設置的表面上。此外,如圖5所示地被組裝的半成品部件被佈置在焊料片84a的頂部。在此處,使金屬塊30a與焊料片84a的上表面接觸。因此,焊料片84a被夾在金屬塊30a與電極板40a之間。如圖3所示,當在疊層方向上觀看金屬塊30a時,金屬塊30a被佈置在由第一槽41所圍繞的範圍內,使得金屬塊30a的外周圍邊緣與第一組到第四組的第二槽42相交。焊料片84a僅被佈置在緊鄰於金屬塊30a下方的範圍內,且未被佈置在金屬塊30a的外周圍側上。
接下來,在回流爐中加熱圖7所顯示的疊層體。接著,焊料片84a融化。融化的焊料從緊鄰金屬塊30a下方的範圍朝向範圍的外周圍側潤濕並擴散。焊料的一部分流入到第二槽42中,如圖7中箭頭所示。流入到第二槽42中的焊料朝向外周圍側流動。此外,藉由第二槽42內部的焊料的引導,第二槽42外部的焊料(換言之,在電極板40a之相鄰於第二槽42的表面上的焊料)亦朝向外周圍側流動。這意味著第二槽42促進焊料朝向外周圍側的潤濕及擴散。一旦焊料到達第一槽41,焊料流入到第一槽41中。這限制了焊料朝向第一槽41的外周圍側的潤濕及擴散。因此,如圖8所示,焊料84在由第一槽41所圍繞的大致整個範圍內潤濕及擴散。在這之後,一旦疊層體冷卻,焊料84被固化。焊料84使金屬塊30a與電極板40a相互連接。
如圖4所示,在未被金屬塊30a覆蓋的範圍內於焊料84的表面上,沿著第二槽42形成凹陷及突起。
此外,如圖8所示,在由第一槽41所圍繞的範圍的中心部(緊鄰金屬塊30a的中心部的下方)中,設置平坦表面44,其當中未形成第二槽42。因此,在平坦表面44與金屬塊30a之間的焊料84的厚度變小。焊料84的導熱性低於金屬塊30a及電極板40a的導熱性。因此,藉由設置平坦表面44來減少電極板40a與金屬塊30a之間的焊料84的厚度,能夠降低電極板40a與金屬塊30a之間的熱阻。
即使當焊料84的量為小的時,第二槽42促進焊料的潤濕及擴散。因此,焊料的潤濕及擴散發生在由第一槽41所圍繞的大致整個範圍內。此外,當焊料84的量為大的時,多餘的焊料在第一槽41中被吸收。因此,能夠限制多餘的焊料爬上金屬塊30a的側表面。如同目前為止所說明的,由於無論焊料84的量如何,焊料的潤濕及擴散適當地發生在由第一槽41所圍繞的大致整個範圍內,焊料84的填角的形狀穩定。因此,焊料84的品質穩定。
接下來,如圖9所示,藉由射出成型形成樹脂層60。樹脂層60密封散熱片14a、14b、IGBT 20a、20b、二極體22a、22b、金屬塊30a、30b、32a、32b及電極板40a、40b。在此同時,如圖4所示,樹脂層60流入焊料84的表面中的凹陷部。因此,樹脂層60與焊料84的接觸面積變大,從而使得樹脂層60難以從焊料84分離。
接下來,如圖10所示,藉由裁切樹脂層60的上表面,電極板40a、40b被暴露在樹脂層60的上表面上。同樣地,雖然未顯示,藉由裁切樹脂層60的下表面,散熱片14a、14b被暴露在樹脂層60的下表面上。
接下來,如圖1所示,藉由裁切引線框架12之不必要的部分,使主端子16及信號端子18相互分離。因此,完成圖1所顯示之半導體裝置10。
在用於焊接金屬塊30a及電極板40a的上述方法中,金屬塊30a的整個上表面被與焊料84連接,如圖2所示,且金屬塊30a的外周圍邊緣(或金屬塊30a之與焊料84連接的上表面的外周圍邊緣)被佈置以橫越第一組到第四組的第二槽42,如圖3所示。如同目前為止所說明的,只要金屬塊30的區域的外周圍邊緣(此區域被與焊料84連接)被佈置以橫越第一組到第四組的第二槽42,焊料84的潤濕及擴散發生在由第一槽41所圍繞的大致整個範圍內。因此,即使在使用具有與圖3所顯示的金屬塊30a不同的尺寸及形狀的金屬塊的情況下,只要金屬塊30的區域的外周圍邊緣(此區域被與焊料84連接)被佈置以橫越第一組到第四組的第二槽42,能夠適當地將焊料84結合到由第一槽41所圍繞的大致整個範圍。這意味著只要與焊料84連接的金屬塊的區域的尺寸大於平坦表面44的尺寸並小於第一槽41的尺寸,能夠適當地焊接具有任何尺寸及形狀的金屬塊。
此外,即使若金屬塊30a的位置由於誤差而偏移,只要金屬塊30的區域的外周圍邊緣(此區域被與焊料84連接)被佈置以橫越第一組到第四組的第二槽42,能夠將焊料84適當地結合到由第一槽41所圍繞的大致整個範圍。因此,即使若在大量製造半導體裝置10時在金屬塊30a的安裝位置方面發生變化,焊料84的填角形狀為穩定的。因此,能夠穩定焊料84的品質。
如同目前為止所說明的,根據本說明書中所揭露的技術,在金屬塊的不同尺寸、形狀及佈置位置的各種情況下,能夠適當地將金屬塊焊接到電極板40a。
根據前述實施例,第一槽及第二槽被形成在金屬塊30a及電極板40a相互連接的區域內。然而,第一槽及第二槽可被設置在其它金屬構件與電極板相互連接的區域內。例如,如圖11所示,第一槽41及第二槽42可被設置在收集電極76(一種類型的金屬構件)與散熱片14a(一種類型的電極板)相互連接(換言之,散熱片14a的表面)的區域內。
同樣地,在前述實施例中,如圖3所示,每一個第二槽42為獨立的。然而,例如,如圖12所示,在除了第一槽41以外的部分,第二槽42可能藉由連接槽43相互連接。然而,當如圖12所示第二槽42藉由連接槽43相互連接時,融化的樹脂流在形成樹脂層60時容易在由第二槽42及連接槽43所圍繞的區域附近被干擾,且這容易造成在樹脂層60內的空隙(void)。因此,如圖3所示,較佳的是,第二槽為相互獨立的。
此外,在前述實施例中,如圖2所示,金屬塊30a的整個上表面被與焊料84連接。然而,金屬塊30a的上表面的一部分可被與焊料84連接。在此情況下,僅為必要的是,與焊料84連接的區域的外周圍邊緣被佈置以橫越第一組、第二組、第三組及第四組的第二槽42。在此情況下,金屬塊30a的其於部分(遠離焊料84的部分)可能延伸到由第一槽41所圍繞的範圍的更外側。
說明前述實施例的部件與申請專利範圍的部件之間的關係。實施例的金屬塊30a為申請專利範圍中的金屬構件的範例。實施例中的金屬塊30a的上表面為申請專利範圍中的金屬構件的區域的範例,此區域被與焊料連接。實施例中的IGBT 20a為申請專利範圍中的半導體晶片的範例。
以下列出本說明書中所揭露的技術元件。下面的技術元件相互獨立地為有用的。
在本說明書中揭露來作為範例的半導體裝置中,在由第一槽所圍繞的範圍的中心,電極板可包括平坦表面,其未設置第二槽。
根據此結構,由於焊料的厚度在範圍的中心變小,其能夠減少金屬構件與電極板之間的熱阻。
在本說明書中揭露來作為範例的半導體裝置中,除了第一槽外,每一個第二槽未與其他的第二槽連接,且焊料可被樹脂覆蓋。
根據此結構,能夠限制空隙在樹脂中被做成。
已給出關於實施例的詳細說明。然而,其僅為範例,且不限制申請專利範圍之範疇。申請專利範圍之範疇中所描述的技術包括上面所給出的特定範例的各種修改及變化。本說明書及圖式中所說明的技術元件單獨或作為各種組合具有技術有用性,且並不限於申請時申請專利範圍中所描述的組合。此外,在本說明書及圖式中所說明的技術作為範例同時達成複數個目的,並藉由達成這些目的中的一者而具有技術有用性。
10‧‧‧半導體裝置
12‧‧‧引線框架
14a‧‧‧散熱片
14b‧‧‧散熱片
16‧‧‧主端子
18‧‧‧信號端子
19‧‧‧接合線
20a‧‧‧絕緣閘雙極電晶體(IGBT)
20b‧‧‧絕緣閘雙極電晶體(IGBT)
22a‧‧‧二極體
22b‧‧‧二極體
30a‧‧‧金屬塊
30b‧‧‧金屬塊
32a‧‧‧金屬塊
32b‧‧‧金屬塊
40a‧‧‧電極板
40b‧‧‧電極板
41‧‧‧第一槽
41a‧‧‧第一線性部
41b‧‧‧第二線性部
41c‧‧‧第三線性部
41d‧‧‧第四線性部
42‧‧‧第二槽
43‧‧‧連接槽
44‧‧‧平坦表面
60‧‧‧樹脂層
70‧‧‧信號電極
72‧‧‧發射電極
74‧‧‧半導體基板
76‧‧‧收集電極
80‧‧‧焊料
82‧‧‧焊料
84‧‧‧焊料
84a‧‧‧焊料片
以下將參照所附圖式說明本發明的例示性實施例之特徵、優點及技術與工業上的意義,其中,相似的標號表示相似的元件,且其中: 圖1為半導體裝置的立體圖; 圖2為沿著圖1及圖3的線II-II所取之半導體裝置的剖面圖; 圖3為電極板的下表面的平面圖; 圖4為沿著圖3的線IV-IV所取之半導體裝置的剖面圖; 圖5為半導體裝置的製造流程的說明圖; 圖6為半導體裝置的製造流程的說明圖; 圖7為半導體裝置的製造流程的說明圖; 圖8為半導體裝置的製造流程的說明圖; 圖9為半導體裝置的製造流程的說明圖; 圖10為半導體裝置的製造流程的說明圖; 圖11為對應到圖2的剖面圖,並顯示根據修改的半導體裝置;以及 圖12為對應到圖3的平面圖,並顯示根據修改的電極板。
Claims (8)
- 一種半導體裝置,包括:電極板,在該電極板的表面上設置具有環形形狀的第一槽、以及第二槽組,該第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,該第二槽組被佈置在由該第一槽所圍繞的範圍內,且在外周圍側上具有端部分,該等端部分與該第一槽連接,該第二槽組包括複數個第二槽,且該第二槽組包括第一組、第二組、第三組及第四組,該第一組具有與該第一線性部連接的複數個該第二槽,該第二組具有與該第二線性部連接的複數個該第二槽,該第三組具有與該第三線性部連接的複數個該第二槽,該第四組具有與該第四線性部連接的複數個該第二槽;金屬構件;以及焊料,其連接該範圍內之該電極板的表面以及該金屬構件的表面,該金屬構件的該表面面對該電極板的該表面,其中,當在該電極板與該金屬構件的疊層方向上觀看該金屬構件時,該金屬構件的區域之外周圍邊緣被佈置以橫越該第一組、該第二組、該第三組及該第四組,該區域被與該焊料連接,並且其中,該電極板在該範圍的中心包括平坦表面,該平坦表面不具有該第二槽組。
- 如申請專利範圍第1項之半導體裝置,其中,該等第二槽中的每一個第二槽被垂直地連接該第一槽。
- 如申請專利範圍第1項之半導體裝置,其中,在該電極板的相反側上,半導體晶片經由焊料與該金屬構件的表面連接。
- 如申請專利範圍第1項之半導體裝置,其中,該金屬構件為半導體晶片的表面電極。
- 一種半導體裝置,包括:電極板,在該電極板的表面上設置具有環形形狀的第一槽、以及第二槽組,該第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,該第二槽組被佈置在由該第一槽所圍繞的範圍內,且在外周圍側上具有端部分,該等端部分與該第一槽連接,該第二槽組包括複數個第二槽,且該第二槽組包括第一組、第二組、第三組及第四組,該第一組具有與該第一線性部連接的複數個該第二槽,該第二組具有與該第二線性部連接的複數個該第二槽,該第三組具有與該第三線性部連接的複數個該第二槽,該第四組具有與該第四線性部連接的複數個該第二槽;金屬構件;以及焊料,其連接該範圍內之該電極板的表面以及該金屬構件的表面,該金屬構件的該表面面對該電極板的該表面,其中,當在該電極板與該金屬構件的疊層方向上觀看該金屬構件時,該金屬構件的區域之外周圍邊緣被佈置以橫越該第一組、該第二組、該第三組及該第四組,該區域被與該焊料連接,並且其中,該第一組的該等第二槽未與該第二組到該第四組的該等第二槽連接,且該焊料被樹脂覆蓋。
- 一種半導體裝置的製造方法,包括:透過焊料使金屬構件與電極板連接,其中,第一槽及第二槽組被設置在該電極板的表面上,該第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且該第一槽延伸為環形形狀,該第二槽組被佈置在由該第一槽所圍繞的範圍內,且在外周圍側上具有與該第一槽連接的端部分,該第二槽組包括複數個第二槽,且該第二槽組包括第一組、第二組、第三組及第四組,該第一組具有與該第一線性部連接的複數個該第二槽,該第二組具有與該第二線性部連接的複數個該第二槽,該第三組具有與該第三線性部連接的複數個該第二槽,該第四組具有與該第四線性部連接的複數個該第二槽,其中,當透過該焊料使該金屬構件與該電極板連接時,使該電極板與該金屬構件彼此面對,並且,當在該電極板與該金屬構件的疊層方向上觀看該金屬構件時,該金屬構件的區域的外周圍邊緣被佈置以橫越該第一組、該第二組、該第三組及該第四組,該區域被與該焊料連接,並且,在此狀態下,該範圍及該區域藉由該焊料被相互連接,並且其中,該電極板在該範圍的中心包括平坦表面,該平坦表面不具有該第二槽組。
- 一種用於連接半導體晶片的電極板,包括:該電極板,在該電極板的表面上設置第一槽以及第二槽組,該第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且該第一槽延伸為環形形狀,該第二槽組被佈置在由該第一槽所圍繞的範圍內,且在外周圍側上具有端部分,該等端部分與該第一槽連接,該第二槽組包括複數個第二槽,該第二槽組包括第一組、第二組、第三組及第四組,該第一組具有與該第一線性部連接的複數個該第二槽,該第二組具有與該第二線性部連接的複數個該第二槽,該第三組具有與該第三線性部連接的複數個該第二槽,該第四組具有與該第四線性部連接的複數個該第二槽,且該範圍被用於結合焊料,其中,該電極板在該範圍的中心包括平坦表面,該平坦表面不具有該第二槽組。
- 一種用於連接半導體晶片的電極板,包括:該電極板,在該電極板的表面上設置第一槽以及第二槽組,該第一槽具有沿著矩形形狀的各個側邊延伸的第一線性部、第二線性部、第三線性部及第四線性部,且該第一槽延伸為環形形狀,該第二槽組被佈置在由該第一槽所圍繞的範圍內,且在外周圍側上具有端部分,該等端部分與該第一槽連接,該第二槽組包括複數個第二槽,該第二槽組包括第一組、第二組、第三組及第四組,該第一組具有與該第一線性部連接的複數個該第二槽,該第二組具有與該第二線性部連接的複數個該第二槽,該第三組具有與該第三線性部連接的複數個該第二槽,該第四組具有與該第四線性部連接的複數個該第二槽,且該範圍被用於結合焊料,其中,該第一組的該等第二槽未與該第二組到該第四組的該等第二槽連接,且該焊料被樹脂覆蓋。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017054815A JP6610590B2 (ja) | 2017-03-21 | 2017-03-21 | 半導体装置とその製造方法 |
JP2017-054815 | 2017-03-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201838122A TW201838122A (zh) | 2018-10-16 |
TWI676251B true TWI676251B (zh) | 2019-11-01 |
Family
ID=61691773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW107109216A TWI676251B (zh) | 2017-03-21 | 2018-03-19 | 半導體裝置、半導體裝置的製造方法及電極板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US10475727B2 (zh) |
EP (1) | EP3379572B1 (zh) |
JP (1) | JP6610590B2 (zh) |
KR (1) | KR102073579B1 (zh) |
CN (1) | CN108630652B (zh) |
TW (1) | TWI676251B (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6874467B2 (ja) * | 2017-03-29 | 2021-05-19 | 株式会社デンソー | 半導体装置とその製造方法 |
JP6834815B2 (ja) * | 2017-07-06 | 2021-02-24 | 株式会社デンソー | 半導体モジュール |
CN111448653B (zh) * | 2017-12-13 | 2024-05-24 | 三菱电机株式会社 | 半导体装置及电力转换装置 |
US20220415745A1 (en) * | 2021-06-29 | 2022-12-29 | Infineon Technologies Ag | Semiconductor packages including recesses to contain solder |
CN113707632B (zh) * | 2021-08-30 | 2024-06-07 | 中国振华集团永光电子有限公司(国营第八七三厂) | 一种三端整流电路模块及其制造方法 |
JP2023041490A (ja) * | 2021-09-13 | 2023-03-24 | 株式会社東芝 | 半導体装置 |
JP7292352B2 (ja) * | 2021-11-02 | 2023-06-16 | 三菱電機株式会社 | 樹脂封止型半導体装置及び樹脂封止型半導体装置の製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070057373A1 (en) * | 2005-09-12 | 2007-03-15 | Denso Corporation | Semiconductor device having metallic plate with groove |
WO2015033197A2 (en) * | 2013-09-05 | 2015-03-12 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device |
JP2016195222A (ja) * | 2015-04-01 | 2016-11-17 | 株式会社デンソー | 接続構造体 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100545866B1 (ko) * | 2004-04-27 | 2006-01-24 | 삼성전자주식회사 | 커패시터 및 그 제조 방법 |
TWI247642B (en) * | 2005-03-15 | 2006-01-21 | Jian-Shian Li | Position-actuating and controlling device for direct movement of electrode of electro-discharge machine |
US7661954B2 (en) * | 2005-09-13 | 2010-02-16 | Uwe Harneit | Gas burner |
JP5002148B2 (ja) * | 2005-11-24 | 2012-08-15 | 株式会社東芝 | 半導体装置 |
JP4893303B2 (ja) * | 2006-12-29 | 2012-03-07 | 株式会社デンソー | 半導体装置 |
US8481368B2 (en) * | 2008-03-31 | 2013-07-09 | Alpha & Omega Semiconductor, Inc. | Semiconductor package of a flipped MOSFET and its manufacturing method |
JP2013123016A (ja) * | 2011-12-12 | 2013-06-20 | Denso Corp | 半導体装置 |
JP2014029967A (ja) * | 2012-07-31 | 2014-02-13 | Toshiba Lighting & Technology Corp | 半導体装置及びその製造方法 |
KR101922783B1 (ko) * | 2013-11-29 | 2018-11-27 | 가부시키가이샤 고베 세이코쇼 | 베이스판, 및 베이스판을 구비한 반도체 장치 |
JP6379815B2 (ja) * | 2014-07-31 | 2018-08-29 | 富士電機株式会社 | 半導体装置およびその製造方法 |
-
2017
- 2017-03-21 JP JP2017054815A patent/JP6610590B2/ja active Active
-
2018
- 2018-03-16 US US15/923,018 patent/US10475727B2/en not_active Expired - Fee Related
- 2018-03-16 KR KR1020180030630A patent/KR102073579B1/ko active IP Right Grant
- 2018-03-19 CN CN201810224113.8A patent/CN108630652B/zh active Active
- 2018-03-19 TW TW107109216A patent/TWI676251B/zh active
- 2018-03-19 EP EP18162560.9A patent/EP3379572B1/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070057373A1 (en) * | 2005-09-12 | 2007-03-15 | Denso Corporation | Semiconductor device having metallic plate with groove |
WO2015033197A2 (en) * | 2013-09-05 | 2015-03-12 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device |
JP2016195222A (ja) * | 2015-04-01 | 2016-11-17 | 株式会社デンソー | 接続構造体 |
Also Published As
Publication number | Publication date |
---|---|
KR102073579B1 (ko) | 2020-02-05 |
CN108630652A (zh) | 2018-10-09 |
EP3379572B1 (en) | 2019-12-18 |
US20180277462A1 (en) | 2018-09-27 |
CN108630652B (zh) | 2021-11-26 |
US10475727B2 (en) | 2019-11-12 |
JP2018157157A (ja) | 2018-10-04 |
KR20180106957A (ko) | 2018-10-01 |
JP6610590B2 (ja) | 2019-11-27 |
TW201838122A (zh) | 2018-10-16 |
EP3379572A1 (en) | 2018-09-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI676251B (zh) | 半導體裝置、半導體裝置的製造方法及電極板 | |
JP7156025B2 (ja) | 半導体装置 | |
JP4893303B2 (ja) | 半導体装置 | |
US20160204047A1 (en) | Semiconductor device and method for manufacturing the same | |
JP7192241B2 (ja) | 半導体モジュール及び半導体モジュールの製造方法 | |
JP5732880B2 (ja) | 半導体装置及びその製造方法 | |
JP5409889B2 (ja) | インバータ | |
JP4952556B2 (ja) | 半導体装置およびその製造方法 | |
JP5188602B2 (ja) | インバータ | |
JP4881256B2 (ja) | パワー半導体モジュール | |
US11552065B2 (en) | Semiconductor device | |
JP2016181607A (ja) | 半導体装置及びその製造方法 | |
JP7156172B2 (ja) | 半導体装置 | |
JP5056105B2 (ja) | 半導体装置およびその製造方法 | |
JP6311568B2 (ja) | 電子装置 | |
JP6924321B2 (ja) | 半導体装置 | |
KR200478914Y1 (ko) | 반도체 패키지 | |
JP2019129228A (ja) | 半導体装置及びその製造方法 | |
US20240021496A1 (en) | Semiconductor device | |
JP2008147218A (ja) | 半導体装置の製造方法 | |
JP6741135B1 (ja) | 半導体モジュール及び半導体モジュールの製造方法 | |
JP6619119B1 (ja) | 半導体装置 | |
JP5202685B2 (ja) | インバータ | |
JP7027983B2 (ja) | リードフレーム | |
JP2016009819A (ja) | パワー半導体モジュールおよびその製造方法 |