TWI533771B - 無核心層封裝基板及其製法 - Google Patents

無核心層封裝基板及其製法 Download PDF

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TWI533771B
TWI533771B TW103124499A TW103124499A TWI533771B TW I533771 B TWI533771 B TW I533771B TW 103124499 A TW103124499 A TW 103124499A TW 103124499 A TW103124499 A TW 103124499A TW I533771 B TWI533771 B TW I533771B
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layer
conductive
package substrate
electrical contact
openings
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TW103124499A
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TW201605309A (zh
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白裕呈
林俊賢
邱士超
蕭惟中
孫銘成
沈子傑
陳嘉成
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矽品精密工業股份有限公司
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Priority to TW103124499A priority Critical patent/TWI533771B/zh
Priority to CN201410368060.9A priority patent/CN105261606B/zh
Priority to US14/583,317 priority patent/US9510463B2/en
Publication of TW201605309A publication Critical patent/TW201605309A/zh
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Publication of TWI533771B publication Critical patent/TWI533771B/zh
Priority to US15/334,569 priority patent/US9899249B2/en

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Description

無核心層封裝基板及其製法
本發明係關於一種無核心層封裝基板及其製法，特別是指一種形成突出構件於線路層之電性接觸墊上之無核心層封裝基板及其製法。
隨著電子產業的蓬勃發展，電子產品亦逐漸邁向多功能及高性能之發展趨勢。為滿足半導體封裝件朝向高積集度(integration)及微型化(miniaturization)之封裝需求，在無核心層封裝基板中線路層之複數電性接觸墊之尺寸愈來愈小，使得當以複數銲球將晶片接置於該些電性接觸墊上時，該銲球與該電性接觸墊間之接觸面積較小，因而容易導致該銲球與該電性接觸墊之間產生接合力不足而影響後續產品之信賴性。
第1A圖係繪示習知技術之無核心層封裝基板1之剖視示意圖，第1B圖係繪示以銲球17將晶片16接置於習知技術第1A圖之無核心層封裝基板1上之剖視示意圖。
如圖所示，無核心層封裝基板1係包括一介電層10、一第一線路層11、一第二線路層12、複數導電盲孔13、 一第一絕緣保護層14以及一第二絕緣保護層15。
該介電層10係具有相對之第一表面10a與第二表面10b，該第一線路層11係具有複數第一電性接觸墊111，該第二線路層12係具有複數第二電性接觸墊121，該些導電盲孔13係電性連接該第一線路層11及該第二線路層12。
該第一絕緣保護層14係形成於該介電層10之第一表面10a上，並具有複數第一開孔141以外露出該些第一電性接觸墊111之接觸面112。該第二絕緣保護層15係形成於該介電層10之第二表面10b上，並具有複數第二開孔151以外露出該些第二電性接觸墊121。
惟，上述第1A圖之無核心層封裝基板1之缺點在於：該第一電性接觸墊111之接觸面112係為平面，故如第1B圖所示，當以複數銲球17將晶片16接置於該些第一電性接觸墊111時，該銲球17與該第一電性接觸墊111間之接觸面積較小，因而容易導致該銲球17與該第一電性接觸墊111之間產生接合力不足的問題，進而影響後續產品之信賴性。
因此，如何克服上述習知技術的問題，實已成目前亟欲解決的課題。
本發明係提供一種無核心層封裝基板，其包括：介電層，係具有相對之第一表面與第二表面；第一線路層，係嵌埋於該介電層內並外露於該第一表面，且該第一線路層係具有複數第一電性接觸墊；複數突出構件，係分別形成 於該些第一電性接觸墊上，且各該突出構件具有接觸面，以供外部之導電元件包覆於該突出構件之接觸面上；第二線路層，係形成於該介電層之第二表面上；以及複數導電盲孔，係分別形成於該介電層內以電性連接該第一線路層及該第二線路層。
該突出構件之接觸面可包括該突出構件之上表面與側表面，且該突出構件之寬度可小於或等於該第一電性接觸墊之寬度，該突出構件與該第一電性接觸墊可為相同材質所形成者或一體成形者，該突出構件可為導電柱或導電跡線之銲墊，該導電元件可為銲球。
該第二線路層可具有複數第二電性接觸墊，該導電盲孔可形成於該第一線路層與該第二電性接觸墊之間。
該無核心層封裝基板可包括導電層，係形成於該突出構件之接觸面上或再形成於部分該第一電性接觸墊上；或者，該導電層係形成於該突出構件與該第一電性接觸墊之間。
該無核心層封裝基板可包括具有複數開孔之絕緣保護層，係形成於該介電層之第二表面與該第二線路層上，並藉由該些開孔分別外露出該第二線路層之第二電性接觸墊。
本發明復提供一種無核心層封裝基板之製法，其包括：形成具有複數第一開孔之第一阻層於承載板上；形成複數突出構件於該些第一開孔內；形成具有複數第一電性 接觸墊之第一線路層於該第一阻層上，其中，該些第一電性接觸墊係對應形成於該些突出構件上；形成具有相對之第一表面與第二表面之介電層於該第一線路層上，以將該第一線路層嵌埋於該介電層內，其中，該介電層之第一表面係接合至該第一阻層，且該第一線路層係外露於該介電層之第一表面；形成複數導電盲孔於該介電層內以電性連接該第一線路層，並形成第二線路層於該介電層之第二表面上以電性連接該些導電盲孔；以及移除該第一阻層以外露出該些突出構件之接觸面。
該介電層可具有複數第二開孔，該些導電盲孔係藉由填充導電材料於該些第二開孔內所形成。
該無核心層封裝基板之製法可包括：形成剝離層於該承載板之頂面與底面其中一者或二者上，該第一阻層係形成於該剝離層上，且該些第一開孔係外露出部分該剝離層。
該無核心層封裝基板之製法可包括：形成導電層於該第一阻層、該些第一開孔之壁面及該些第一開孔之剝離層上，該第一線路層係形成於該導電層上，該些突出構件係分別形成於該些第一開孔內之導電層上。
該無核心層封裝基板之製法可包括：形成第二阻層於該第一線路層及該些第一電性接觸墊上；依據該第二阻層移除部分該導電層以外露出部分該第一阻層；以及移除該第二阻層以外露出該第一線路層及該些第一電性接觸墊。
該無核心層封裝基板之製法可包括：形成具有複數第三開孔之絕緣保護層於該第二線路層及其複數第二電性接 觸墊上，並藉由該些第三開孔分別外露出該些第二電性接觸墊；以及去除該剝離層以移除該承載板。
該無核心層封裝基板之製法可包括：依序形成剝離層與第一導電層於該承載板之頂面與底面其中一者或二者上，該第一阻層係形成於該第一導電層上，且該些第一開孔係外露出部分該第一導電層。
該無核心層封裝基板之製法可包括：形成第二導電層於該第一阻層及該些突出構件上，該第一線路層與該些第一電性接觸墊係形成於該第二導電層上。
該無核心層封裝基板之製法可包括：去除該剝離層以移除該承載板；移除該第一導電層與該第一阻層以外露出該些突出構件之接觸面；形成第二阻層於該些突出構件上；依據該第二阻層移除部分該第二導電層以外露出部分該介電層；以及移除該第二阻層以外露出該些突出構件之接觸面。
由上可知，本發明之無核心層封裝基板及其製法中，主要係在第一線路層之複數第一電性接觸墊上形成複數具有立體之接觸面(如上表面及側表面)之突出構件，以供外部之複數導電元件(如銲球)分別包覆於該些突出構件之接觸面上，並可藉由該些導電元件將半導體元件(如晶片)接置於該些突出構件及第一電性接觸墊上。藉此，該突出構件與該導電元件之間可形成較大的接觸面積，以強化該第一電性接觸墊與該導電元件之接合力，進而提高後續產品之信賴性。
1、2、2'‧‧‧無核心層封裝基板
10、27‧‧‧介電層
10a、27a‧‧‧第一表面
10b、27b‧‧‧第二表面
11、25‧‧‧第一線路層
111、251‧‧‧第一電性接觸墊
112、241‧‧‧接觸面
12、29‧‧‧第二線路層
121、281‧‧‧第二電性接觸墊
13、28‧‧‧導電盲孔
14‧‧‧第一絕緣保護層
141、221‧‧‧第一開孔
15‧‧‧第二絕緣保護層
151、271‧‧‧第二開孔
16‧‧‧晶片
17‧‧‧銲球
20‧‧‧承載板
20a‧‧‧頂面
20b‧‧‧底面
21‧‧‧剝離層
211、23‧‧‧導電層
22‧‧‧第一阻層
24‧‧‧突出構件
26‧‧‧第二阻層
30‧‧‧絕緣保護層
301‧‧‧第三開孔
31‧‧‧半導體元件
32‧‧‧導電元件
第1A圖係繪示習知技術之無核心層封裝基板之剖視示意圖；第1B圖係繪示以銲球將晶片接置於習知技術第1A圖之無核心層封裝基板上之剖視示意圖；第2A圖至第2L圖係繪示本發明之無核心層封裝基板及其製法之一實施例之剖視示意圖；第2M圖係繪示以導電元件將半導體元件接置於本發明第2L圖之無核心層封裝基板上之一實施例之剖視示意圖；第3A圖至第3L圖係繪示本發明之無核心層封裝基板及其製法之另一實施例之剖視示意圖；以及第3M圖係繪示以導電元件將半導體元件接置於本發明第3L圖之無核心層封裝基板上之另一實施例之剖視示意圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功 效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。
同時，本說明書中所引用之如「上」、「一」、「第一」、「第二」、「表面」或「接觸面」等用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A圖至第2L圖係繪示本發明之無核心層封裝基板2及其製法之一實施例之剖視示意圖，第2M圖係繪示以導電元件32將半導體元件31接置於本發明第2L圖之無核心層封裝基板2上之一實施例之剖視示意圖。
如第2A圖所示，先提供一具有相對之頂面20a與底面20b之承載板20，並形成一或二剝離層21於該承載板20之頂面20a與底面20b其中一者或二者上。該承載板20可為不鏽鋼板。
如第2B圖所示，依據該剝離層21是形成於該承載板20之頂面20a與底面20b其中一者或二者上，以形成一或二第一阻層22於該剝離層21上，且該第一阻層22係具有複數第一開孔221以外露出部分該剝離層21。
如第2C圖所示，依據該第一阻層22是形成於該一或二剝離層21上，以藉由濺鍍或其他方式形成一或二導電層23於該第一阻層22上、該些第一開孔221之壁面及該些第一開孔221之剝離層21上。該導電層23可為晶種層(seed layer)。
如第2D圖所示，形成複數突出構件24於該些第一開孔221內之導電層23上，並形成具有複數第一電性接觸墊251之第一線路層25於該導電層23上，且形成該些第一電性接觸墊251於該些突出構件24及部分該導電層23上。該突出構件24可為導電柱(如銅柱)或導電跡線之銲墊等，且該突出構件24之寬度可小於或等於該第一電性接觸墊251之寬度，該突出構件24與該第一電性接觸墊251可為相同材質所形成者或一體成形者。
如第2E圖所示，形成第二阻層26於該第一線路層25及該些第一電性接觸墊251上。
如第2F圖所示，依據該第二阻層26移除部分該導電層23以外露出部分該第一阻層22，再移除該第二阻層26以外露出該第一線路層25及該些第一電性接觸墊251。
如第2G圖所示，形成具有相對之第一表面27a與第二表面27b之介電層27於該第一線路層25上以嵌埋該第一線路層25於該介電層27內。該介電層27之第一表面27a係接合至該第一阻層22，該第一線路層25或該導電層23係外露於該介電層27之第一表面27a。
如第2H圖所示，藉由雷射鑽孔或其他方式，自該第二表面27b形成複數第二開孔271於該介電層27中以外露出部分該第一線路層25。
如第2I圖所示，填充導電材料於該介電層27之第二開孔271內以形成複數導電盲孔28而電性連接該第一線路層25，並形成第二線路層29於該介電層27之第二表面27b 上以電性連接該些導電盲孔28。該導電盲孔28與該第二線路層29兩者可為同時形成、相同材質或一體成形；但在其他實施例中，兩者亦可為先後形成、不同材質或分別成形。
如第2J圖所示，形成具有複數第三開孔301之絕緣保護層30於該第二線路層29及其複數第二電性接觸墊281上，並藉由該些第三開孔301分別外露出該些第二電性接觸墊281。
如第2K圖所示，去除該剝離層21以移除該承載板20而外露出該第一阻層22。
如第2L圖所示，移除該第一阻層22以外露出該些突出構件24之接觸面241或該導電層23，藉此形成一或二無核心層封裝基板2。該突出構件24之接觸面241可包括該突出構件24之上表面與側表面，且該突出構件24之上表面係高於該介電層27之第一表面27a，該第一線路層25上之導電層23係齊平於該介電層27之第一表面27a。
此外，如第2M圖所示，可藉由外部之複數導電元件(如銲球)32包覆該些突出構件24之接觸面(如上表面及側表面)241或該些接觸面241上之導電層23，以藉由該些導電元件32將半導體元件(如晶片)31接置於該些突出構件24及其下之第一電性接觸墊251上。
第3A圖至第3L圖係繪示本發明之無核心層封裝基板2'及其製法之另一實施例之剖視示意圖，第3M圖係繪示以導電元件32將半導體元件31接置於本發明第3L圖之無核 心層封裝基板2'上之另一實施例之剖視示意圖。
如第3A圖所示，先提供一具有相對之頂面20a與底面20b之承載板20，並形成一或二剝離層21於該承載板20之頂面20a與底面20b其中一者或二者上，且藉由濺鍍或其他方式形成一或二導電層211於該剝離層21上。該承載板20可為不鏽鋼板，該導電層211可為晶種層。
如第3B圖所示，依據該剝離層21與該導電層211是形成於該承載板20之頂面20a與底面20b其中一者或二者上，以形成一或二第一阻層22於該導電層211上，且該第一阻層22係具有複數第一開孔221以外露出部分該導電層211。
如第3C圖所示，形成複數突出構件24於該些第一開孔221內所外露之導電層211上。該突出構件24可為導電柱(如銅柱)或導電跡線之銲墊等。
如第3D圖所示，依據該第一阻層22是形成於該一或二導電層211上，以藉由濺鍍或其他方式形成一或二導電層23於該第一阻層22及該些突出構件24上。該導電層23可為晶種層。
如第3E圖所示，形成具有複數第一電性接觸墊251之第一線路層25於該導電層23上。該第一電性接觸墊251之寬度可小於、等於或大於該突出構件24之寬度。
在其他實施例中，亦可不必形成有該導電層23，從而直接形成該第一線路層25於該第一阻層22上，並形成該些第一電性接觸墊251於該些突出構件24上。
如第3F圖所示，形成具有相對之第一表面27a與第二表面27b之介電層27於該導電層23與該第一線路層25上，以將該第一線路層25嵌埋於該介電層27內且外露於該第一表面27a，且該介電層27之第一表面27a係面向該第一阻層22。接著，可藉由雷射鑽孔或其他方式，自該第二表面27b形成複數第二開孔271於該介電層27中以外露出部分該第一線路層25。
在其他實施例中，亦可不必形成有該導電層23，從而直接形成該介電層27於該第一阻層22上，並形成該些第一電性接觸墊251於該些突出構件24上。
如第3G圖所示，填充導電材料於該介電層27之第二開孔271內以形成複數導電盲孔28而電性連接該第一線路層25，並形成第二線路層29於該介電層27之第二表面27b上以電性連接該些導電盲孔28。該導電盲孔28與該第二線路層29兩者可為同時形成、相同材質或一體成形；但在其他實施例中，兩者亦可為先後形成、不同材質或分別成形。
如第3H圖所示，去除該剝離層21以移除該承載板20而外露出該導電層211與該第一阻層22。
如第3I圖所示，移除該導電層211與該第一阻層22以外露出該些突出構件24之接觸面241及部分該導電層23。
如第3J圖所示，形成第二阻層26於該些突出構件24之上表面。
如第3K圖所示，依據該第二阻層26移除部分該導電層23以外露出部分該介電層27之第一表面27a。
如第3L圖所示，移除該第二阻層26以外露出該些突出構件24之接觸面241，藉此形成一或二無核心層封裝基板2。該突出構件24之接觸面241可包括該突出構件24之上表面與側表面，且該突出構件24之上表面係高於該介電層27之第一表面27a，該第一線路層25係齊平於該介電層27之第一表面27a。
此外，如第3M圖所示，可藉由外部之複數導電元件(如銲球)32包覆該些突出構件24之接觸面(如上表面及側表面)241與該些突出構件24下之導電層23，以藉由該些導電元件32將半導體元件(如晶片)31接置於該些突出構件24上。
本發明另提供一種無核心層封裝基板2，如第2L圖所示，請一併參考第2M圖。無核心層封裝基板2主要包括一介電層27、一第一線路層25、複數突出構件24、一第二線路層29以及複數導電盲孔28。
該介電層27係具有相對之第一表面27a與第二表面27b。該第一線路層25係嵌埋於該介電層27內並外露於該第一表面27a，且該第一線路層25係具有複數第一電性接觸墊251。
該些突出構件24係分別形成於該些第一電性接觸墊251上，且各該突出構件24具有接觸面241，以供外部之導電元件32包覆於該突出構件24之接觸面241上。該突 出構件24之接觸面241可包括該突出構件24之上表面與側表面，且該突出構件24之寬度可小於或等於該第一電性接觸墊251之寬度，該突出構件24與該第一電性接觸墊251可為相同材質所形成者或一體成形者，該突出構件24可為導電柱(如銅柱)或導電跡線之銲墊等，該導電元件32可為銲球等。
該第二線路層29係形成於該介電層27之第二表面27b上，並具有複數第二電性接觸墊281，該導電盲孔28可形成於該介電層27內以電性連接該第一線路層25及該第二線路層29之第二電性接觸墊281。
該無核心層封裝基板2可包括導電層23，係形成於該突出構件24之接觸面241上或再形成於部分該第一電性接觸墊251上。該導電元件32係包覆該接觸面241之導電層23或再包覆該第一電性接觸墊251之導電層23。
該無核心層封裝基板2可包括具有複數開孔(如第三開孔301)之絕緣保護層30，該絕緣保護層30係形成於該介電層27之第二表面27b與該第二線路層29上，並藉由該些開孔(如第三開孔301)分別外露出該第二線路層29之第二電性接觸墊281。
本發明又提供一種無核心層封裝基板2'，如第3L圖所示，請一併參考第3M圖。第3L圖之無核心層封裝基板2'與上述第2L圖之無核心層封裝基板2大致相同，其主要差異如下：在第3L圖中，該導電層23係形成於該突出構件24 與該第一電性接觸墊251之間。因此，如第3M圖所示，該導電元件32可包覆該突出構件24之接觸面241或再包覆該突出構件24下之導電層23。
由上可知，本發明之無核心層封裝基板及其製法中，主要係在第一線路層之複數第一電性接觸墊上形成複數具有立體之接觸面(如上表面及側表面)之突出構件，以供外部之複數導電元件(如銲球)分別包覆於該些突出構件之接觸面上，並可藉由該些導電元件將半導體元件(如晶片)接置於該些突出構件及第一電性接觸墊上。藉此，該突出構件與該導電元件之間可形成較大的接觸面積，以強化該第一電性接觸墊與該導電元件之接合力，進而提高後續產品之信賴性。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
2‧‧‧無核心層封裝基板
23‧‧‧導電層
24‧‧‧突出構件
241‧‧‧接觸面
25‧‧‧第一線路層
251‧‧‧第一電性接觸墊
27‧‧‧介電層
27a‧‧‧第一表面
27b‧‧‧第二表面
28‧‧‧導電盲孔
281‧‧‧第二電性接觸墊
29‧‧‧第二線路層
30‧‧‧絕緣保護層
301‧‧‧第三開孔
31‧‧‧半導體元件
32‧‧‧導電元件

Claims (19)

  1. 一種無核心層封裝基板，其包括：介電層，係具有相對之第一表面與第二表面；第一線路層，係嵌埋於該介電層內並具有複數外露於該介電層之第一表面之第一電性接觸墊；複數突出構件，係分別形成於該些外露於該介電層之第一表面之第一電性接觸墊上，且各該突出構件具有接觸面，以供外部之導電元件包覆於該突出構件之接觸面上；第二線路層，係形成於該介電層之第二表面上；以及複數導電盲孔，係分別形成於該介電層內以電性連接該第一線路層及該第二線路層。
  2. 如申請專利範圍第1項所述之無核心層封裝基板，其中，該突出構件之接觸面係包括該突出構件之上表面與側表面。
  3. 如申請專利範圍第1項所述之無核心層封裝基板，其中，該突出構件之寬度係小於或等於該第一電性接觸墊之寬度。
  4. 如申請專利範圍第1項所述之無核心層封裝基板，其中，該突出構件與該第一電性接觸墊係為相同材質所形成者或一體成形者。
  5. 如申請專利範圍第1項所述之無核心層封裝基板，其中，該突出構件係為導電柱或導電跡線之銲墊，該導 電元件係為銲球。
  6. 如申請專利範圍第1項所述之無核心層封裝基板，其中，該第二線路層係具有複數第二電性接觸墊，該導電盲孔係形成於該第一線路層與該第二電性接觸墊之間。
  7. 如申請專利範圍第1項所述之無核心層封裝基板，復包括導電層，係形成於該突出構件之接觸面上或再形成於部分該第一電性接觸墊上。
  8. 如申請專利範圍第1項所述之無核心層封裝基板，復包括導電層，係形成於該突出構件與該第一電性接觸墊之間。
  9. 如申請專利範圍第1項所述之無核心層封裝基板，復包括具有複數開孔之絕緣保護層，係形成於該介電層之第二表面與該第二線路層上，並藉由該些開孔分別外露出該第二線路層之第二電性接觸墊。
  10. 一種無核心層封裝基板之製法，其包括：形成具有複數第一開孔之第一阻層於承載板上；形成複數突出構件於該些第一開孔內；形成具有複數第一電性接觸墊之第一線路層於該第一阻層上，其中，該些第一電性接觸墊係對應形成於該些突出構件上；形成具有相對之第一表面與第二表面之介電層於該第一線路層上，以將該第一線路層嵌埋於該介電層內，其中，該介電層之第一表面係接合至該第一阻層， 且該第一線路層係外露於該介電層之第一表面；形成複數導電盲孔於該介電層內以電性連接該第一線路層，並形成第二線路層於該介電層之第二表面上以電性連接該些導電盲孔；以及移除該第一阻層以外露出該些突出構件之接觸面。
  11. 如申請專利範圍第10項所述之無核心層封裝基板之製法，其中，該介電層復具有複數第二開孔，該些導電盲孔係藉由填充導電材料於該些第二開孔內所形成。
  12. 如申請專利範圍第10項所述之無核心層封裝基板之製法，復包括形成剝離層於該承載板之頂面與底面其中一者或二者上，該第一阻層係形成於該剝離層上，且該些第一開孔係外露出部分該剝離層。
  13. 如申請專利範圍第12項所述之無核心層封裝基板之製法，復包括形成導電層於該第一阻層、該些第一開孔之壁面及該些第一開孔之剝離層上，該第一線路層係形成於該導電層上，該些突出構件係分別形成於該些第一開孔內之導電層上。
  14. 如申請專利範圍第13項所述之無核心層封裝基板之製法，復包括：形成第二阻層於該第一線路層及該些第一電性接觸墊上；依據該第二阻層移除部分該導電層以外露出部分該第一阻層；以及 移除該第二阻層以外露出該第一線路層及該些第一電性接觸墊。
  15. 如申請專利範圍第14項所述之無核心層封裝基板之製法，復包括：形成具有複數第三開孔之絕緣保護層於該第二線路層及其複數第二電性接觸墊上，並藉由該些第三開孔分別外露出該些第二電性接觸墊；以及去除該剝離層以移除該承載板。
  16. 如申請專利範圍第10項所述之無核心層封裝基板之製法，復包括依序形成剝離層與第一導電層於該承載板之頂面與底面其中一者或二者上，該第一阻層係形成於該第一導電層上，且該些第一開孔係外露出部分該第一導電層。
  17. 如申請專利範圍第16項所述之無核心層封裝基板之製法，復包括形成第二導電層於該第一阻層及該些突出構件上，該第一線路層與該些第一電性接觸墊係形成於該第二導電層上。
  18. 如申請專利範圍第17項所述之無核心層封裝基板之製法，復包括：去除該剝離層以移除該承載板；移除該第一導電層與該第一阻層以外露出該些突出構件之接觸面；形成第二阻層於該些突出構件上；依據該第二阻層移除部分該第二導電層以外露出 部分該介電層；以及移除該第二阻層以外露出該些突出構件之接觸面。
  19. 如申請專利範圍第10項所述之無核心層封裝基板之製法，其中，該承載板係為不鏽鋼板。
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