TW579540B - Method of processing a semiconductor wafer and substrate for semiconductor wafers used in the same - Google Patents

Method of processing a semiconductor wafer and substrate for semiconductor wafers used in the same Download PDF

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Publication number
TW579540B
TW579540B TW91122042A TW91122042A TW579540B TW 579540 B TW579540 B TW 579540B TW 91122042 A TW91122042 A TW 91122042A TW 91122042 A TW91122042 A TW 91122042A TW 579540 B TW579540 B TW 579540B
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Taiwan
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semiconductor wafer
substrate
scope
processing
patent application
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TW91122042A
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Chinese (zh)
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Masatoshi Nanjo
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Disco Corp
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  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Prior to a grinding step, the front surface of a semiconductor wafer is stuck on a substrate to be mounted on the substrate. The transfer step of mounting the semiconductor wafer on a frame having a mounting opening in its center portion through a mounting tape and removing the substrate from the front surface of the semiconductor wafer is carried out between the grinding step and the subsequent treating step. The substrate is formed of a laminate consisting of a plurality of layers.

Description

579540 A7 B7 五、發明説明(1 ) [發明領域] ί請先閱讀背面之注意事項再填寫本頁} 本發明關係於一處理半導體晶圓的方法,該晶圓具有大 量之由在其前面呈格子形式排列之街道界定之矩形區域並 在個別矩形區域內具有一半導體電路,以及,關係於用於此製 程中之基材。 [先前技藝說明] 如同爲熟習於本技藝者所知,於半導體裝置的生產中,大 量之矩形區域係爲呈格子形式排列之街道所界定於一半導 體晶圓的前面,並且,在每一矩形區域內均形成有一半導體電 路。半導體晶圓的背面係被磨光,以降低其厚度並且半導體 晶圓係被沿著該等街道切割,以將此等矩形區域彼此分離,藉 以形成半導體晶片。 經濟部智慧財產局員工消費合作社印製 一般而言,一磨光機構係應用至該半導體晶圓的背面,以 降低其厚度至一預定値,然後,在該半導體晶圓的前面,使用 一切割工具,以沿著街道切割,而將矩形區域彼此分離。當半 導體晶圓被沿著街道切割時,其係被一安裝帶所安裝在一框 架上,該框架於其中心部份具有一安裝開口,使得爲切割所分 離的矩形區域可以以一單位方式加以進行或淸洗。更明確 地說,安裝帶係固定至框架,使得其延伸經安裝開口並黏著至 在安裝開口中之半導體晶圓的背面,藉以半導體晶圓係安裝 在該框架上。隨後,被分離之矩形區域,即半導體晶片被拾取 並送至一預定位置。 現在,一切割工具係首先應用至半導體晶圓的前面,以形 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ:297公釐) -4 - 4( 5 79 A7 __________ B7 五、發明説明(2 ) (請先閱讀背面之注意事項再填寫本頁) 成具有進入街道預定深度的凹槽,然後,一磨光機構應用至該 半導體晶圓的背面,以降低半導體晶圚的厚度,使得矩形面積 可以彼此由於上述凹槽的存在,而彼此分離。於此例子中,當 半導體晶圓背面要被磨光時,其被經由一安裝帶安裝至中心 部份具有安裝開口的框架上,使得矩形區域作爲被輸送並淸 洗的單位。更明確地說,安裝帶係固定至框中,使得其延伸經 過框架的安裝開口,並且,具黏著至在安裝開口中之半導體晶 圓的前面上,藉以該半導體晶圓被安裝在框架上。隨後,被分 離之矩形區域,即半導體晶片被拾取並送至一預定位置。 經濟部智慧財產局a(工消費合作社印製 爲了形成很小及質輕的半導體晶片,現在經常想要半導 體背面被大量地磨光,以降低其厚度,例如至150微米或更小 ,特別是50微米或更小。例如,當矽半導體晶圓的厚度被大 量降低時,半導體晶圓的剛性很低,因而,很難在不損壞它下, 磨光該半導體晶圓,並且,很難以預定速度輸送該被磨光後的 半導體晶圓。爲了防止半導體晶圓爲磨光所損壞,半導體晶 圓可以藉由應用磨光機構在半導體晶圓的背面,以保護基材 或保護帶黏著至半導體晶圓背面的狀態,加以磨光。然而,當 保護基材或保護帶係黏著在半導體晶圓的前面時,半導體晶 圓必須直接由其前面抓取,以執行磨光半導體晶圓背面步驟 後的處理步驟,例如沿著街道切割、拾取被分離之矩形區域 等等。然而,該抓取係爲保護基材或保護帶所中斷。 [發明槪要] 因此,本發明的第一目的係提供一新穎及改良處理半導 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐·) -5- 579540 A7 B7 經濟部智慧財產局Μ工消资合作社印製 五、發明説明(3 ) 體晶圓的方法,其使得半導體晶圓背面被磨光而不受到破壞 、半導體晶圓予以被容易輸送,再者,能在半導體晶圓的背面 磨光後,自由地抓取半導體晶圓的前面,即使該半導體晶圓的 厚度係爲該半導體晶圓背面的磨光所大量降低。 本發明的第二目的係提供一基材,其可以有利地使用作 爲予以黏著至半導體晶圓前面的基材,以支撐該半導體晶圓 並防止當基材由半導體晶圓移開時,半導體晶圓被損壞而不 會故障。 本案發明人進行密集硏究並發現上述第一目的可以藉 由以下步驟加以完成:在磨光半導體晶圓背面的步驟前,將一 半導體晶圓的前面固定至一基材上,以將半導體晶圓安裝在 該基材上;並執行一傳送步驟,以將該半導體晶圓經由一安裝 帶安裝至於其中心部份具有一安裝開口的框架上,該安裝帶 係固定至半導體晶圓的背面並在一磨光步驟與由其前面取 得半導體晶圓的後續處理步驟間,將該基材由該半導體晶圓 的前面移去,以執行預定處理。 發明人已經發現第二目的可以藉由以由多層構成的積 層所形成之基材加以取得。 即,依據本發明的一態樣,其中提供有一處理一半導體晶 圓的一方法,該晶圓具有由呈格子形式排列於其前面的街道 所界定之大量矩形區域,並且,在每一矩形區域內均具有一半 導體電路,該方法包含: 一安裝步驟,用以藉由將半導體晶圓的前面黏著至一基 材上,而將半導體晶圓安裝於該基材上; (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標隼(CNS ) Α4規格(210Χ 297公釐) -6 - 579540 A7 ______B7 五、發明説明(4 ) 一磨光步驟,用以將半導體基材的前面經由該基材吸附 至一吸盤機構上,並藉由施加一磨光機構至該半導體晶圓的 (請先閱讀背面之注意事項再填寫本頁) 背面,而磨光該半導體晶圓的背面,以降低該半導體晶圓的厚 度; 一傳送步驟,用以將一安裝帶安裝至一具有安裝開口於 其中心部份的框架上,使得安裝帶延伸通過該安裝開口,將半 導體晶圓的背面黏著至該安裝帶上,以將半導體晶圓安裝於 框架之安裝開口內並於半導體晶圓的背面被黏著於安裝帶 之前或後,將基材由半導體的前面去除;及 一處理步驟,用以由半導體晶圓的前面取得安裝在該框 架上之半導體晶圓並執行一預定處理。 經濟部智慧財產局S工消f合作社印製 於傳送步驟中,在半導體晶圓的背面被黏著至安裝帶後, 基材較佳係由半導體晶圓的前面移去。較佳地,基材係由一 由多層所構成之積層所形成。該積層包含具有高剛性的一 層及具有相對低剛性的一層,該半導體晶圓的前面係被黏著 至該低剛性層側。較佳地,當基材被由半導體晶圓的前面移 去時,高剛性層係首先被移去,然後,再移去低剛性層。最好 是該基材包含多數高剛性層構成之積層。該等高剛性層可 以均是一聚對苯二甲酸乙烯酸片或膜及低剛性層可以均是 聚烯烴片或膜。該基材係大於半導體晶圓及基材的圓周較 佳係超出半導體晶圓的圓周1至2mm。於本發明的一較佳 實施例中,處理步驟係爲沿街道切割該半導體晶圓的切割步 驟,藉由將半導體晶圓的背面經由安裝帶吸附至一吸盤機構 並對半導體晶圓的前面施加一切割機構。於另一實施例中, 本紙張尺度適用中國國家標準(CNS ) Λ4規格(2丨〇>< 297公^ 579540 A7 B7 經濟部智慧財產局g(工消費合作社印製 五、發明説明(5 ) 具有預定深度的凹槽係由予以安裝至基材的半導體晶圓的 前面沿著街道形成,並且,當半導體晶圓於磨光步驟中被磨光 時,半導體晶圓被分割成大量之矩形區域,並且,處理步驟爲 一拾取步驟,用以個別拾取已分離之矩形區域。於磨光步驟 中,半導體晶圓的厚度可以降低至150微米或更少。 依據本發明之另一態樣,其中提供有一基材,用於諸半導 體晶圓,該基材係由多層構成之積層所形成。 較佳地,該積層包含一具有相當高剛性之一層及具有相 對低剛性的一層,及該半導體晶圓係被黏著至低剛性層側。 較佳地,該積層包含多數高剛性層。該等高剛性層可以是聚 對苯二甲酸乙烯酸片或膜及低剛性層可以是聚烯烴片或膜 。較佳地,該基材係大於半導體晶圓,並且,當半導體晶圓定 位於基材上時,基材的圓周較佳係超出半導體晶圓的圓周1 至 2 m m 〇 [圖式簡要說明] 第1圖爲一半導體晶圓例的立體圖,其中可以應用本發 明的處理方法者; 第2圖爲一立體圖,顯示於本發明的處理方法中之安裝 步驟時,半導體晶圓被安裝至一基材的狀態; 第3圖爲一側視圖,顯示本發明之處理方法中之安裝步 驟時,半導體晶圓被安裝至基材的狀態; 第4圖爲於本發明的處理方法中,磨光步驟的示意側視 圖; (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -8- 579540579540 A7 B7 V. Description of the invention (1) [Field of invention] Please read the notes on the back before filling out this page} The present invention relates to a method for processing a semiconductor wafer, which has a large number of wafers presented in front of it. The rectangular areas defined by the streets arranged in a grid form have a semiconductor circuit in individual rectangular areas, and are related to the substrate used in this process. [Previous technical description] As is known to those skilled in the art, in the production of semiconductor devices, a large number of rectangular areas are defined in front of a semiconductor wafer by streets arranged in a grid form, and in each rectangle A semiconductor circuit is formed in each area. The back surface of the semiconductor wafer is polished to reduce its thickness and the semiconductor wafer is cut along these streets to separate these rectangular areas from each other, thereby forming a semiconductor wafer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Generally speaking, a polishing mechanism is applied to the back of the semiconductor wafer to reduce its thickness to a predetermined thickness. Then, in the front of the semiconductor wafer, a dicing is used. Tool to cut along the street while separating rectangular areas from each other. When a semiconductor wafer is cut along a street, it is mounted on a frame by a mounting tape having a mounting opening at a central portion thereof, so that a rectangular region separated for cutting can be applied in a unit manner. Perform or rinse. More specifically, the mounting tape is fixed to the frame so that it extends through the mounting opening and adheres to the back of the semiconductor wafer in the mounting opening, whereby the semiconductor wafer system is mounted on the frame. Subsequently, the separated rectangular area, that is, the semiconductor wafer is picked up and sent to a predetermined position. Now, a cutting tool is first applied to the front of the semiconductor wafer, and the Chinese National Standard (CNS) A4 specification (210 ×: 297 mm) is applied to the paper size. -4-4 (5 79 A7 __________ B7 V. Description of the invention (2) (Please read the precautions on the back before filling this page) to form a groove with a predetermined depth into the street, and then apply a polishing mechanism to the back of the semiconductor wafer to reduce the thickness of the semiconductor wafer, so that The rectangular areas can be separated from each other due to the existence of the above-mentioned grooves. In this example, when the back surface of the semiconductor wafer is to be polished, it is mounted to a frame having a mounting opening in a central portion via a mounting tape, so that The rectangular area is used as a unit to be transported and cleaned. More specifically, the mounting tape is fixed to the frame so that it extends through the mounting opening of the frame and is adhered to the front surface of the semiconductor wafer in the mounting opening. The semiconductor wafer is mounted on the frame. Then, the separated rectangular area, that is, the semiconductor wafer is picked up and sent to a predetermined position. Ministry of Economic Affairs Intellectual Property Bureau a (Printed by Industrial and Consumer Cooperatives in order to form small and lightweight semiconductor wafers, now often want the semiconductor backside to be heavily polished to reduce its thickness, for example to 150 microns or less, especially 50 microns Or smaller. For example, when the thickness of a silicon semiconductor wafer is greatly reduced, the rigidity of the semiconductor wafer is low, and therefore it is difficult to polish the semiconductor wafer without damaging it, and it is difficult to convey it at a predetermined speed. The polished semiconductor wafer. In order to prevent the semiconductor wafer from being damaged by polishing, the semiconductor wafer can be polished on the back side of the semiconductor wafer by a polishing mechanism to protect the substrate or the protective tape from adhering to the semiconductor wafer. The state of the back surface is polished. However, when the protective substrate or the protective tape is adhered to the front of the semiconductor wafer, the semiconductor wafer must be directly grasped from the front to perform the processing after the step of polishing the back of the semiconductor wafer Steps such as cutting along the street, picking up the separated rectangular area, etc. However, the grabbing is interrupted by the protective substrate or protective tape. [发明 槪 要] Therefore, the first object of the present invention is to provide a novel and improved processing semi-conducting paper size applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm ·) -5- 579540 A7 B7 Intellectual Property Bureau of the Ministry of Economic Affairs Cooperative cooperative printing V. Description of the invention (3) A bulk wafer method, which allows the back surface of the semiconductor wafer to be polished without being damaged, and the semiconductor wafer is easily transported. Furthermore, it can be ground on the back surface of the semiconductor wafer. After light, freely grasp the front of the semiconductor wafer, even if the thickness of the semiconductor wafer is greatly reduced by the polishing of the back of the semiconductor wafer. A second object of the present invention is to provide a substrate, which can be advantageously used. Used as a substrate to be adhered to the front of a semiconductor wafer to support the semiconductor wafer and prevent the semiconductor wafer from being damaged without failure when the substrate is removed from the semiconductor wafer. The inventors of the present case conducted intensive research and found that the above-mentioned first object can be accomplished by the following steps: before the step of polishing the back of the semiconductor wafer, fixing the front of a semiconductor wafer to a substrate to fix the semiconductor crystal The wafer is mounted on the substrate circularly; and a transfer step is performed to mount the semiconductor wafer to a frame having a mounting opening at a central portion thereof via a mounting tape which is fixed to the back of the semiconductor wafer and The substrate is removed from the front surface of the semiconductor wafer between a polishing step and a subsequent processing step of obtaining a semiconductor wafer from the front surface to perform a predetermined process. The inventors have found that the second object can be achieved by a substrate formed of a laminate composed of a plurality of layers. That is, according to an aspect of the present invention, there is provided a method for processing a semiconductor wafer having a large number of rectangular areas defined by streets arranged in a grid in front of it, and in each rectangular area There is a semiconductor circuit inside, and the method includes: a mounting step for mounting the semiconductor wafer on the substrate by adhering the front side of the semiconductor wafer to a substrate; (Please read the Note: Please fill in this page again) This paper size is applicable to China National Standard (CNS) A4 specification (210 × 297 mm) -6-579540 A7 ______B7 V. Description of the invention (4) A polishing step is used to convert the semiconductor substrate The front side of the semiconductor wafer is adsorbed onto a chuck mechanism through the substrate, and a polishing mechanism is applied to the back surface of the semiconductor wafer (please read the precautions on the back side before filling out this page) to polish the semiconductor wafer. A back surface to reduce the thickness of the semiconductor wafer; a transfer step for mounting a mounting tape on a frame having a mounting opening in a central portion thereof so that the mounting tape extends through The mounting opening adheres the back surface of the semiconductor wafer to the mounting tape to mount the semiconductor wafer in the mounting opening of the frame and before or after the back surface of the semiconductor wafer is adhered to the mounting tape. And a processing step for obtaining a semiconductor wafer mounted on the frame from the front of the semiconductor wafer and performing a predetermined process. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Industrial Cooperatives. In the transfer step, after the back side of the semiconductor wafer is adhered to the mounting tape, the substrate is preferably removed from the front side of the semiconductor wafer. Preferably, the substrate is formed of a laminate composed of a plurality of layers. The laminated layer includes a layer having high rigidity and a layer having relatively low rigidity. The front surface of the semiconductor wafer is adhered to the low rigidity layer side. Preferably, when the substrate is removed from the front of the semiconductor wafer, the high rigidity layer is removed first, and then the low rigidity layer is removed. Preferably, the substrate comprises a laminate composed of a plurality of highly rigid layers. These high-rigidity layers may all be a polyethylene terephthalate sheet or film and the low-rigidity layers may be all polyolefin sheets or films. The substrate is larger than the semiconductor wafer and the circumference of the substrate is preferably 1 to 2 mm beyond the circumference of the semiconductor wafer. In a preferred embodiment of the present invention, the processing step is a dicing step of cutting the semiconductor wafer along the street, by attaching the back surface of the semiconductor wafer to a sucker mechanism through a mounting tape and applying the front surface of the semiconductor wafer. A cutting mechanism. In another embodiment, this paper size applies the Chinese National Standard (CNS) Λ4 specification (2 丨 〇 > < 297) ^ 579540 A7 B7 Intellectual Property Bureau of the Ministry of Economic Affairs (printed by the Industrial and Consumer Cooperatives 5. Invention Description ( 5) A groove having a predetermined depth is formed along the street from the front surface of the semiconductor wafer to be mounted on the substrate, and when the semiconductor wafer is polished in the polishing step, the semiconductor wafer is divided into a large number of The rectangular area, and the processing step is a picking step for individually picking up the separated rectangular areas. In the polishing step, the thickness of the semiconductor wafer can be reduced to 150 microns or less. According to another aspect of the present invention A substrate is provided for semiconductor wafers, and the substrate is formed of a multilayer composed of multiple layers. Preferably, the multilayer includes a layer having a relatively high rigidity and a layer having a relatively low rigidity, and the The semiconductor wafer is adhered to the low-rigidity layer side. Preferably, the build-up layer includes most of the high-rigidity layer. The high-rigidity layer may be a polyethylene terephthalate sheet or film and a low-rigidity layer. It is a polyolefin sheet or film. Preferably, the substrate is larger than the semiconductor wafer, and when the semiconductor wafer is positioned on the substrate, the circumference of the substrate is preferably 1 to 2 beyond the circumference of the semiconductor wafer. mm 〇 [Schematic description] Figure 1 is a perspective view of an example of a semiconductor wafer, in which the processing method of the present invention can be applied; Figure 2 is a perspective view showing the mounting steps in the processing method of the present invention, A state in which a semiconductor wafer is mounted on a substrate; FIG. 3 is a side view showing a state in which the semiconductor wafer is mounted on a substrate during a mounting step in the processing method of the present invention; and FIG. 4 is a view of the present invention In the processing method, a schematic side view of the polishing step; (Please read the precautions on the back before filling this page) This paper size applies to China National Standard (CNS) A4 (210X297 mm) -8-579540

、發明説明(6 第5(a)及5(b)圖爲剖面圖,顯示本發明處理方法中之傳 送歩驟; (請先閱讀背面之注意事項再填寫本頁) 第6圖爲一立體圖,顯示於本發明處理方法的傳送步驟 %,半導體晶圓經由一安裝帶被安裝至一框架的狀態;及 第7圖爲一示意剖面圖,顯示於本發明之處理方法中之 切割步驟(處理步驟)。 主要元件對照表 2 半導體晶圓 4 線性緣 6 街道 8 矩形區域 10 基材 12 低剛性層 14 尚剛性層 16 吸盤機構 18 磨光機構 20 安裝帶 22 框架 24 安裝開口 26 桌台 28 桌台 30 吸盤機構 32 切割機構 經濟部智慧財產局Μ工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X 297公釐) -9 - 579540 經濟部智慧財產局員工消費合作社印製 λΊ __Β7五、發明説明(7 ) [較佳實施例的詳細說明] 用於本發明方法中之半導體晶圓處理方法及基材的較 佳實施例將參考附圖加以詳細說明。 第1圖顯示本發明處理方法可以應用之半導體晶圓的 典型例。所示半導體晶圓2有一碟形外形,其具有一被稱爲” 定向平端”之線性緣4於其圓周的一部份中並具有大量由呈, 格式形式排列之街道6所界定於其前面的矩形區域8。一半 導體電路係形成於每一矩形區域中。 一安裝步驟係執行於本發明的處理方法中。如第2及3 圖所示之安裝步驟中,半導體晶圓2係藉由將半導體晶圓2 的前面黏著至基材10上,而安裝於基材10上。基材10可以 爲一碟狀外形或一類似於半導體晶圓2的外形,並有一線性 緣對應於半導體晶圓2的線性緣4。 較佳地,基材10係略大於半導體晶圓2及基材10的圓 周超出該半導體晶圓2的圓周。基材10的圓周超出半導體 晶圓2之圓周的長度係約1至2mm。當基材10具有一碟形 外形及半導體晶圓2具有線性緣4時,基材1 0的圓周超出半 導體晶圓2的圓周1至2mm,於不包含該線性緣4的區域中, 以及,於相關於線性緣4之基材10的圓周的突出長度係較大 於1至2mm(於此說明書中,基材10圓周的突出長度表示基 材1 0圓周突出半導體晶圓2的線性緣部份外的長度,但該半 導體晶圓2具有線性緣4時)。於處理半導體晶圓2時,多數 半導體晶圓2被夾持於未示出的卡匣中。更明確地說,半導 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁) -10- 579540 經濟部智M財產局8工消費合作社印货 A7 B7五、發明説明(8 ) 體晶圓2被儲存於多數形成在卡匣側壁中之垂直方向相隔 的儲存凹槽內,並在多數情形下被承載。當半導體晶圓半導 體晶圓2很薄(例如50微米或更少)及半導體晶圓2的緣與 儲存凹槽的底面等接觸時,半導體晶圓2有可能被損壞。因 此,當安裝半導體晶圓2的基材10的圓周超出半導體晶圓2 的圓周時,防止半導體晶圓2的圓周與儲存凹槽之底部等的 直接接觸,而沒有故障,藉以避免半導體晶圓2的損壞。然而 ,當基材10太大及其圓周突出太多時,安裝有半導體晶圓2 的基材1 0並不能被儲存於具有標準大小之卡匣的儲存凹槽 中。再者,當基材10略大於半導體晶圓2及基材10的圓周 超出半導體晶圓2的圓周時,依據發明人之經驗,於磨光半導 體晶圓2的背面時,在半導體晶圓2圓周產生碎片的可能被 大大降低,及由基材10移去半導體晶圓2將變成相當容易。 較佳地,基材1 0係由一由多層所構成之積層所形成,更 明確地說,該積層包含具有相當低剛性之一層及一相當高剛 性之一層,及該半導體晶圓2被黏著至該低剛性層側。最好, 該高剛性層包含多數層。於所例示實施例中,基材1 0係爲一 積層,其於最上位置包含一低剛性層12及於低剛性層12下 有三高剛性層14。低剛性層12可以爲一聚烯烴片或膜及該 等高剛性層可以爲一聚對苯二甲酸乙烯酸片材或膜。低剛 性層12及三個高剛性層14係藉由黏著劑黏在一起。黏著 劑較佳爲紫外線固化黏著劑,其係爲曝露至紫外線輻射加以 固化,以損失或降低其黏著性,或者,一熱固化黏著劑,其係加 熱固化,以損失或降低其黏著性。紫外線固化或熱固化黏著 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) Λ4規格(21〇>< 297公釐) -11 - 579540 Α7 Β7 經濟部智慧財產局員工消費合作社印繁 五、發明説明(9 ) 劑係較佳應用至該低剛性層12的頂面,因此,該半導體晶圓2 的前面係藉由黏著劑黏至該低剛性層1 2的頂面。因此,半導 體晶圓2係安裝在基材10上,其係朝下,即背面朝上。 隨後,執行一磨光步驟。參考第4圖,一包含一多孔吸板 的吸盤機構16係用於此磨光步驟中。此吸盤機構16具有 略大於基材10的外徑的外徑,及基材1〇及安裝在基材1〇上 之半導體晶圓2係被放置於吸盤機構1 6上。吸盤機構1 6 係與一真空源相通,以經由該基材10吸附半導體晶圓2的背 面至吸盤機構16上。磨光機構1 8係應用至半導體晶圓2 的背面以磨光它,並降低其厚度至一預定値。磨光機構磨光 機構18係爲一環形磨光工具,其具有一含鑽石穎粒的磨光件 於其下表面上。於磨光半導體晶圓2的背面時,夾持半導體 晶圓2的吸盤機構16係沿著其中心軸旋轉及磨光機構1 8 係被壓靠向半導體晶圓2的背面。於此磨光步驟中,因爲半 導體晶圓2係爲黏著至半導體晶圓2的前面上之基材10所 加強,所以,其有可能磨光半導體晶圓2至一例如1 50微米或 更低,更明確地說50微米或更低之厚度,而不會造成對半導 體晶圓2的例如損壞等的問題。上述半導體晶圓2的背面 之磨光可以較佳使用爲Disco有限公司所販售之’DFG841’的 磨光機加以執行。當上述磨光機被使用時,多數安裝於基材 10上半導體晶圓2可以被夾持於一卡匣(未示出)中,於一垂 直方向呈規則間距,以被供給至磨光機。 於本發明的處理方法中,重要的是,於磨光步驟後,執行 一傳送步驟。於第5(a)及5(b)圖中所示之傳送步驟中,半導 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ 297公釐) -12- 579540 A7 B7 五、發明説明(1〇 ) (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 體晶圓2係首先經由一安裝帶20被安裝至一框架22上。 框架22係爲一環形件,其可以由適當合成樹脂或金屬作成並 且在其中心部份具有一環形安裝開口 24。安裝帶20可以由 適當合成樹脂片材或膜作成,及,一紫外線固化黏著劑或加熱 固化黏著劑之黏著劑係較佳被用以施加至一側,即其下側,使 得安裝帶20可以藉由一黏著劑黏著於一側,即在框架22的 頂側上。如於第5(a)圖所示,安裝帶20所固定之框架22係 朝下向著放置於桌台26(此桌台26可以藉由如第4圖所示 之吸盤機構16或與吸盤機構16分開之支撐件加以建構)之 半導體晶圓2,使得半導體晶圓2係定位於框架22的安裝開 口 24中。安裝帶20的下表面然後黏著至半導體晶圓2的 背面。隨後,由下至上定位呈上述順序的基材1 0、半導體晶 圓2、框架22及安裝帶20係被翻面,使得呈此順序安排之 由下至上爲安裝帶20、框架22、半導體晶圓2及基材10, 並且,此組件係被放置於適當之桌台28上。基材10係被曝 露至紫外線輻射或熱,以固化於基材10及半導體晶圓2的表 面間之黏著劑及於基材10之鄰近層間之黏著劑,以損失或降 低其厚度。然後,每一構成基材10的層的一端,即低剛性層 1 2及三高剛性層14的一端係以先後秩序被一個一個地向另 一端拉。換句話說,最上層之高剛性層14係首先被剝離,隨 後,第二高剛性層14、第三高剛性層14及低剛性層12,藉以, 由半導體晶圓2的前面移去基材10。隨後,半導體晶圓2係 由其被安裝在基材1 0上,以其前面黏著至基材1 0的狀態改 變爲其被黏著至框架22上,以其背面黏著至安裝帶20的狀 本紙張尺度適中國國家標準(CNS ) A4規格(210X 297公釐) -13- 579540 A7 B7 經濟部智慈財產局員工消費合作社印製 五、發明説明(11 ) 態。第6圖顯示該半導體晶圓2,其係經由安裝帶2 〇彳皮安:自 至框架22,其前面朝上。 藉此,對於用於此實施例之基材10,應注意以下幾點。即 ,基材10係爲由低剛性層1 2及諸局剛性層14構成之積層。 因此,即使當高剛性層具有相當低剛性時,整體積層也貞有·相 當高剛性。低剛性層1 2作爲一 ”緩衝υ材料,以保護半導體晶 圓2的表面不受外力。因此,即使當半導體晶圓2被如第4 圖所示磨光直到150微米或更低,特別是50微米或更低時, 其可以完全地磨光,而不會被損壞,因爲其係以基材i 〇加以 加強。另一方面,爲了由半導體晶圓2的前面移去基材10,整 個基材10並未一次移除,而是一個一個地移除該三剛性層 14,然後,移除低剛性層12。因此,當基材10係由半導體晶圓 2的表面移除時,於半導體晶圓2中產生過量應力的情形可 以避免。另外,當具有相當高剛性之該等高剛性層14被移除 時,於高剛性層14及半導體晶圓2前面間之低剛性低剛性層 1 2作用爲一所謂緩衝材料,以降低產生於半導體晶圓2中之 應力。因此,基材10可以由半導體晶圓2的前面移除,而不 會有在半導體晶圓2中產生過量之應力,而損壞半導體晶圓 2的可能。當具有相當高剛性之基材1 0係一次由半導體晶 圓2的前面移除時,有可能半導體晶圓2爲產生於半導體晶 圓2中之相當大的應力所損壞。 於完成上述傳送步驟後,一處理步驟藉由抓取半導體晶 圓2的前面加以進行一預定處理。於第7圖所示之實施例 中,半導體晶圓2的背面係經由安裝帶20吸附著至吸盤機構 本紙張尺度適用中國國家標準(CNS )八4規格(210X 297公釐) J— I i ΪΓ· ------?丨 (請先閱讀背面之注意事項再填寫本頁) 訂 1·. -14- 579540 A7 ___B7 __ 五、發明説明(12 ) (請先聞讀背面之注意事項再填寫本頁) 30,及一切割機構32係應用至半導體晶圓2的前面,以沿著 街道6切割半導體晶圓2。_吸盤機構3 0包含一多孔吸板,其 係與一真空源相通,以經由安裝帶20吸附半導體晶圓2的背 面。切割機構32可以由一薄、碟形刀葉構成,其可以藉由一 適當黏結劑黏結鑽石磨光粒加以形成。藉由沿著街道6相 對地移動吸盤機構30及切割機構32,於切割機構32以高速 沿著其中心軸旋轉的同時,半導體晶圓2被沿著街道6切割, 以將矩形區域8彼此分開。安裝帶20係被保持未切割,因此 ,即使當矩形區域被彼此分離時,它們仍以其背面被黏著在安 裝帶20上,並被夾持在框架22上。於切割步驟被執行後,分 離之矩形區域8被淸洗,個別拾取及承載至一預定地點。上 述之半導體晶圓2的切割可以藉由一爲Disco有限公司所販 售名爲DFD641之切割機器(同時也稱爲一”切割器”加以進行 。即使此類型之切割機器被使用時,多數經由安裝帶20安裝 在框架22並以垂直方向呈規則間距儲存於卡匣(未示出)中 之半導體晶圓2可以被供給至該切割機器。 經濟部智慧財產局員工消費合作社印製 於所示實施例中,在半導體晶圓2的厚度由磨光半導體 晶圓2的背面,而降低至一預定値後,半導體晶圓2係沿著街 道6切割。或者,於如第4圖所示之磨光步驟後,具有預定深 度之凹槽可以沿著街道6被刻於半導體晶圓2的前面(凹槽 可以藉由類似於參考第7圖之切割步驟之切割步驟加以刻 劃)。於此時,當半導體晶圓2的背面被磨光以降低其厚度, 如於第4圖所示之磨光步驟,則由於上述凹槽的存在,半導體 晶圓2係被分離成多數矩形區域8,並且,分離之矩形區域8 本紙張尺度適用中國國家標準(CNS ) A4規格(2l〇X29<7公釐1 ~ * -15- 579540 A7 _______B7 五、發明説明(13 ) 仍保持安裝於基材1〇上。當參考第5(&)及5(b)圖所解釋的 傳送步驟被執行時,其中建立一狀態,其中,個別分離矩形區 域8係均經由安裝帶2〇安裝至框架22。於此時,已知之用 以拾取個別分離矩形區域8及將之攜帶至一預定地點(例如 用以安裝矩形區域8之桌台)之拾取步驟可以用以作爲於傳 迗步驟後,所執行之處理步驟。 雖然,本發明之較佳實施例已經參考附圖加以詳述,但應 了解的是,本發明並不限定於此,各種改變.及修改應在不脫離 本發明之精神及範圍下加以完成。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慈財產局Μ工消f合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) -16-、 Explanation of the invention (6 Figures 5 (a) and 5 (b) are sectional views showing the transfer steps in the processing method of the present invention; (Please read the precautions on the back before filling this page) Figure 6 is a perspective view , Shown in the transfer step% of the processing method of the present invention, the state where the semiconductor wafer is mounted to a frame via a mounting tape; and FIG. 7 is a schematic cross-sectional view showing the cutting steps (processing in the processing method of the present invention Steps) Comparison table of main components 2 Semiconductor wafer 4 Linear edge 6 Street 8 Rectangular area 10 Substrate 12 Low rigid layer 14 Still rigid layer 16 Suction mechanism 18 Polishing mechanism 20 Mounting belt 22 Frame 24 Mounting opening 26 Table 28 Table Table 30 Suction mechanism 32 Cutting mechanism Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs M Industrial Cooperative Cooperative Printed on paper This paper applies Chinese National Standard (CNS) Α4 specifications (210X 297 mm) -9-579540 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs λΊ __Β7 V. Description of the invention (7) [Detailed description of the preferred embodiment] The semiconductor wafer processing method and the preferred implementation of the substrate used in the method of the present invention It will be described in detail with reference to the accompanying drawings. Fig. 1 shows a typical example of a semiconductor wafer to which the processing method of the present invention can be applied. The semiconductor wafer 2 shown has a dish-like shape with a linear edge called an "oriented flat end" 4 In a part of its circumference, there are a large number of rectangular areas 8 bounded by streets 6 arranged in the form and format. A semiconductor circuit is formed in each rectangular area. A mounting step is performed in this In the processing method of the invention, in the mounting steps shown in FIGS. 2 and 3, the semiconductor wafer 2 is mounted on the substrate 10 by adhering the front surface of the semiconductor wafer 2 to the substrate 10. The substrate 10 can be a dish-like shape or a shape similar to the semiconductor wafer 2 and has a linear edge corresponding to the linear edge 4 of the semiconductor wafer 2. Preferably, the substrate 10 is slightly larger than the semiconductor wafer 2 and the substrate The circumference of 10 exceeds the circumference of the semiconductor wafer 2. The length of the circumference of the substrate 10 beyond the circumference of the semiconductor wafer 2 is about 1 to 2 mm. When the substrate 10 has a dish-like shape and the semiconductor wafer 2 has a linear edge 4 , The circumference of the substrate 10 1 to 2 mm beyond the circumference of the semiconductor wafer 2 in a region not including the linear edge 4, and the protruding length of the circumference of the substrate 10 related to the linear edge 4 is greater than 1 to 2 mm (in this description The protruding length of the circumference of the substrate 10 represents the length of the substrate 10 that protrudes outside the linear edge portion of the semiconductor wafer 2, but the semiconductor wafer 2 has a linear edge 4.) When processing the semiconductor wafer 2, most of them The semiconductor wafer 2 is held in a cassette not shown. More specifically, the semi-conducting paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling (This page) -10- 579540 Ministry of Economic Affairs, Intellectual Property Bureau, Bureau of Industrial and Industrial Cooperatives, A7, B7, V. Description of the invention (8) The bulk wafer 2 is stored in most of the vertically spaced storage grooves formed in the side wall of the cassette. Inside, and in most cases are carried. When the semiconductor wafer 2 is thin (for example, 50 micrometers or less) and the edge of the semiconductor wafer 2 contacts the bottom surface of the storage groove, etc., the semiconductor wafer 2 may be damaged. Therefore, when the circumference of the substrate 10 on which the semiconductor wafer 2 is mounted exceeds the circumference of the semiconductor wafer 2, direct contact between the circumference of the semiconductor wafer 2 and the bottom of the storage groove or the like is prevented without failure, thereby avoiding the semiconductor wafer 2 damage. However, when the substrate 10 is too large and its circumference protrudes too much, the substrate 10 on which the semiconductor wafer 2 is mounted cannot be stored in a storage groove of a cassette having a standard size. Furthermore, when the substrate 10 is slightly larger than the semiconductor wafer 2 and the circumference of the substrate 10 exceeds the circumference of the semiconductor wafer 2, according to the experience of the inventors, when the back surface of the semiconductor wafer 2 is polished, the semiconductor wafer 2 The possibility of debris generation on the periphery is greatly reduced, and the removal of the semiconductor wafer 2 from the substrate 10 becomes relatively easy. Preferably, the substrate 10 is formed of a multilayer composed of multiple layers. More specifically, the multilayer includes a layer having a relatively low rigidity and a layer having a relatively high rigidity, and the semiconductor wafer 2 is adhered. To the low rigidity layer side. Preferably, the highly rigid layer comprises a plurality of layers. In the illustrated embodiment, the substrate 10 is a laminated layer including a low-rigidity layer 12 at the uppermost position and three high-rigidity layers 14 under the low-rigidity layer 12. The low rigidity layer 12 may be a polyolefin sheet or film and the high rigidity layer may be a polyethylene terephthalate sheet or film. The low-rigidity layer 12 and the three high-rigidity layers 14 are bonded together by an adhesive. The adhesive is preferably an ultraviolet curing adhesive, which is cured by exposure to ultraviolet radiation to lose or reduce its adhesiveness, or a heat-curable adhesive, which is cured by heating to lose or reduce its adhesiveness. UV-curing or heat-curing (please read the precautions on the back before filling in this page) The paper size applies the Chinese National Standard (CNS) Λ4 specification (21〇 > < 297mm) -11-579540 Α7 Β7 Ministry of Economy Intellectual Property Bureau employee consumer cooperatives Yin Fan 5. Invention description (9) The agent is preferably applied to the top surface of the low rigidity layer 12, so the front of the semiconductor wafer 2 is adhered to the low rigidity layer by an adhesive. 1 2 of the top surface. Therefore, the semiconductor wafer 2 is mounted on the substrate 10 with the back side facing up. Subsequently, a polishing step is performed. Referring to Fig. 4, a chuck mechanism 16 including a perforated suction plate is used in this polishing step. This chuck mechanism 16 has an outer diameter slightly larger than the outer diameter of the substrate 10, and the substrate 10 and the semiconductor wafer 2 mounted on the substrate 10 are placed on the chuck mechanism 16. The chuck mechanism 16 is in communication with a vacuum source to adsorb the back surface of the semiconductor wafer 2 to the chuck mechanism 16 via the substrate 10. The polishing mechanism 18 is applied to the back surface of the semiconductor wafer 2 to polish it and reduce its thickness to a predetermined thickness. Polishing mechanism The polishing mechanism 18 is a ring-shaped polishing tool, which has a polishing member containing diamond glaze on its lower surface. When the back surface of the semiconductor wafer 2 is polished, the chuck mechanism 16 holding the semiconductor wafer 2 is rotated along its central axis, and the polishing mechanism 18 is pressed against the back surface of the semiconductor wafer 2. In this polishing step, since the semiconductor wafer 2 is reinforced by the substrate 10 adhered to the front surface of the semiconductor wafer 2, it is possible to polish the semiconductor wafer 2 to a thickness of, for example, 150 μm or less. More specifically, a thickness of 50 micrometers or less without causing problems such as damage to the semiconductor wafer 2. The above-mentioned polishing of the back surface of the semiconductor wafer 2 can be preferably performed using a polishing machine "DFG841" sold by Disco Co., Ltd. When the above-mentioned polishing machine is used, most of the semiconductor wafers 2 mounted on the substrate 10 can be held in a cassette (not shown) at regular intervals in a vertical direction to be supplied to the polishing machine. . In the processing method of the present invention, it is important that a transfer step is performed after the polishing step. In the transfer steps shown in Figures 5 (a) and 5 (b), the semiconductor (please read the precautions on the back before filling this page) This paper size applies the Chinese National Standard (CNS) Α4 specification (210 × 297) (Mm) -12- 579540 A7 B7 V. Description of the invention (10) (Please read the precautions on the back before filling out this page) The Intellectual Property Bureau, Ministry of Economic Affairs, Employee Consumer Cooperative Printed Wafers 2 are first passed through a mounting tape 20 is mounted to a frame 22. The frame 22 is a ring-shaped member which can be made of a suitable synthetic resin or metal and has a ring-shaped mounting opening 24 in the center portion thereof. The mounting tape 20 may be made of a suitable synthetic resin sheet or film, and an ultraviolet curing adhesive or a heat-curing adhesive is preferably applied to one side, that is, the lower side thereof, so that the mounting tape 20 can It is adhered to one side by an adhesive, that is, on the top side of the frame 22. As shown in FIG. 5 (a), the frame 22 fixed by the mounting band 20 is placed on the table 26 facing downward (this table 26 can be connected to the sucker mechanism 16 or the sucker mechanism as shown in FIG. 4). 16 separate support members are constructed) so that the semiconductor wafer 2 is positioned in the mounting opening 24 of the frame 22. The lower surface of the mounting tape 20 is then adhered to the back surface of the semiconductor wafer 2. Subsequently, the substrate 10, the semiconductor wafer 2, the frame 22, and the mounting tape 20, which are positioned in the above order from bottom to top, are turned over, so that the mounting tape 20, the frame 22, and the semiconductor crystal arranged in this order from bottom to top are Circle 2 and substrate 10, and this assembly is placed on a suitable table 28. The substrate 10 is exposed to ultraviolet radiation or heat to cure the adhesive between the substrate 10 and the surface of the semiconductor wafer 2 and the adhesive between adjacent layers of the substrate 10 to lose or reduce its thickness. Then, one end of each layer constituting the substrate 10, that is, one end of the low-rigidity layer 12 and three high-rigidity layers 14 is pulled one by one to the other end in a sequential order. In other words, the uppermost high-rigidity layer 14 is peeled off first, and then the second high-rigidity layer 14, the third high-rigidity layer 14, and the low-rigidity layer 12 are used to remove the substrate from the front surface of the semiconductor wafer 2. 10. Subsequently, the semiconductor wafer 2 is changed from being mounted on the substrate 10 to a state where the front surface is adhered to the substrate 10 to being adhered to the frame 22 and the back surface is adhered to the mounting tape 20 The paper size is in accordance with Chinese National Standard (CNS) A4 specification (210X 297 mm) -13- 579540 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Office of the Ministry of Economic Affairs V. Invention Description (11). FIG. 6 shows the semiconductor wafer 2 via a mounting tape 20A: from to the frame 22 with the front side facing upward. Therefore, the following points should be noted for the substrate 10 used in this embodiment. That is, the substrate 10 is a laminated layer composed of a low-rigidity layer 12 and local rigid layers 14. Therefore, even when the high-rigidity layer has a relatively low rigidity, the overall laminate has a relatively high rigidity. The low-rigidity layer 12 serves as a "buffering" material to protect the surface of the semiconductor wafer 2 from external forces. Therefore, even when the semiconductor wafer 2 is polished as shown in FIG. 4 to 150 microns or less, especially At 50 microns or less, it can be completely polished without being damaged because it is reinforced with the substrate i 0. On the other hand, in order to remove the substrate 10 from the front of the semiconductor wafer 2, the entire The substrate 10 is not removed at one time, but the three rigid layers 14 are removed one by one, and then the low rigid layer 12 is removed. Therefore, when the substrate 10 is removed from the surface of the semiconductor wafer 2, The occurrence of excessive stress in the semiconductor wafer 2 can be avoided. In addition, when the highly rigid layers 14 having relatively high rigidity are removed, a low rigidity and low rigidity layer between the high rigidity layer 14 and the front face of the semiconductor wafer 2 The 12 acts as a so-called buffer material to reduce the stress generated in the semiconductor wafer 2. Therefore, the substrate 10 can be removed from the front of the semiconductor wafer 2 without generating an excessive amount of the semiconductor wafer 2. Stress may damage the semiconductor wafer 2. When the substrate 10 having a relatively high rigidity is removed once from the front of the semiconductor wafer 2, it is possible that the semiconductor wafer 2 is damaged by the considerable stress generated in the semiconductor wafer 2. After completing the above-mentioned transfer step In a processing step, a predetermined process is performed by grasping the front surface of the semiconductor wafer 2. In the embodiment shown in FIG. 7, the back surface of the semiconductor wafer 2 is adsorbed to the paper size of the suction cup mechanism through the mounting tape 20. Applicable to China National Standard (CNS) 8-4 specification (210X 297 mm) J—I i ΪΓ · ------? 丨 (Please read the precautions on the back before filling this page) Order 1. · -14- 579540 A7 ___B7 __ 5. Description of the invention (12) (Please read the precautions on the back before filling out this page) 30, and a cutting mechanism 32 is applied to the front of the semiconductor wafer 2 to cut the semiconductor crystal along the street 6 Circle 2. The chuck mechanism 30 includes a porous chuck that communicates with a vacuum source to attract the back of the semiconductor wafer 2 via the mounting tape 20. The cutting mechanism 32 may be composed of a thin, dish-shaped blade, It can be polished by bonding the diamond with a suitable binder By moving the chuck mechanism 30 and the dicing mechanism 32 relatively along the street 6, the semiconductor wafer 2 is cut along the street 6 while the dicing mechanism 32 is rotating at high speed along its central axis to cut a rectangular area. 8 are separated from each other. The mounting tapes 20 are kept uncut, so even when the rectangular areas are separated from each other, they are still adhered to the mounting tapes 20 with their back surfaces and are clamped to the frame 22. In the cutting step, After the execution, the separated rectangular area 8 is washed, individually picked up and carried to a predetermined location. The above-mentioned dicing of the semiconductor wafer 2 can be performed by a dicing machine named DFD641 (also called as Do it for a "cutter". Even when this type of dicing machine is used, most of the semiconductor wafers 2 mounted on the frame 22 via the mounting tape 20 and stored in a cassette (not shown) at regular intervals in the vertical direction can be supplied to the dicing machine. Printed in the illustrated embodiment by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. After the thickness of the semiconductor wafer 2 is reduced by polishing the back of the semiconductor wafer 2 to a predetermined thickness, the semiconductor wafer 2 is along the street 6 切。 6 cutting. Alternatively, after the polishing step as shown in FIG. 4, a groove having a predetermined depth may be engraved in front of the semiconductor wafer 2 along the street 6 (the groove may be formed by a cutting step similar to that of FIG. 7 The cutting steps are scored). At this time, when the back surface of the semiconductor wafer 2 is polished to reduce its thickness, as shown in the polishing step shown in FIG. 4, the semiconductor wafer 2 is separated into most rectangular areas due to the existence of the above grooves. 8, And, the separated rectangular area 8 This paper size applies the Chinese National Standard (CNS) A4 specification (2l0X29 < 7 mm 1 ~ * -15- 579540 A7 _______B7 5. The invention description (13) is still installed on the base Material 10. When the transfer steps explained with reference to Figures 5 & 5 and 5 (b) are performed, a state is established in which the 8 separate series of individual rectangular areas are all mounted to the frame via a mounting belt 20. 22. At this time, the picking step known to pick up the individual separated rectangular area 8 and carry it to a predetermined location (for example, to install a table for the rectangular area 8) can be used as a post-transmission step, so Process steps performed. Although the preferred embodiment of the present invention has been described in detail with reference to the accompanying drawings, it should be understood that the present invention is not limited thereto, and various changes and modifications should be made without departing from the spirit and Complete it under the scope. (Please Notes on the back read and re-fill of this page) Ministry of Economic Affairs Chi Chi Property Office Μ f consumer cooperatives work printed in this paper scale applicable Chinese National Standard (CNS) A4 size (210 X 297 mm) -16-

Claims (1)

579540 A8 B8 _____ g88 年丨 修正 六、申請專利範圍1 第91 122042號專利申請案 中文申請專利範圍修正本 (請先聞讀背面之注意事項再填寫本頁) 民國92年12月24日修正 1· 一*種處理半導體晶圓的方法,該晶圓具有多數由排列 於其前面呈格子形式之街道所界定之矩形區域,並且,於個別 矩形區域中具有多數半導體電路,該方法包含: 安裝步驟,用以藉由將該半導體晶圓的前面黏著至一基 材上,而將該半導體晶圓安裝在該基材上; 一磨光步驟,用以將該半導體晶圓的前面經由該基材吸 附至一吸盤機構並藉由施加一磨光機構至該半導體晶圓的 背面,而磨光該半導體晶圓的背面,以降低該半導體晶圓的厚 度; 一傳送步驟,用以將一安裝帶安裝至一具有安裝開口於 其中心部份的框架,使得安裝帶延伸通過該安裝開口,將半導 體晶圓的背面黏著至該安裝帶上,以將半導體晶圓安裝於框 架之安裝開口內並於半導體晶圓的背面被黏著於安裝帶之 前或後,將基材由半導體的前面去除;及 經濟部智慧財產局員工消費合作社印製 一處理步驟,用以由其前面抓取安裝在框架上之半導體 晶圓,並執行一預定處理。 2. 如申請專利範圍第1項所述之處理半導體晶圓的方法 ,其中該基材係於半導體晶圓的背面於傳送步驟中黏著在安 裝帶後,由半導體晶圓的前面移除。 3. 如申請專利範圍第1項所述之處理半導體晶圓的方法 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 579540 A8 B8 C8 D8 六、申請專利範圍2 ,其中該基材係由多層所構成之積層所形成。 (請先閱讀背面之注意事項再填寫本頁) 4. 如申請專利範圍第3項所述之處理半導體晶圓的方法 ,其中該基材係由具有相當高剛性之一層及具有相當低剛性 的一層構成之積層所形成,該半導體晶圓的前面係被黏著至 該低剛性層側,及當基材由半導體晶圓的前面移除時,高剛性 層係首先被移除,然後,低剛性層被移除。 5. 如申請專利範圍第4項所述之處理半導體晶圓的方法 ,其中該基材包含積層之多數高剛性層。 6. 如申請專利範圍第4項所述之處理半導體晶圓的方法 ,其中該等高剛性層均爲一聚對苯二甲酸乙烯酸片材或膜。 7. 如申請專利範圍第1項所述之處理半導體晶圓的方法 ,其中該基材係大於半導體晶圓,並且,基材的圓周係超出半 導體晶圓的圓周。 8. 如申請專利範圍第7項所述之處理半導體晶圓的方法 ,其中該基材的圓周係超出半導體晶圓的圓周1至2mm。 經濟部智慧財產局員工消費合作社印製 9. 如申請專利範圍第1項所述之處理半導體晶圓的方法 ,其中該處理步驟爲一切割步驟,用以將半導體晶圓的背面經 由安裝帶吸附至一吸盤機構,並施加一切割機構至該半導體 晶圓的前面,以將該半導體晶圓沿著街道切割。 10. 如申請專利範圍第1項所述之處理半導體晶圓的方 法,其中該等具有預定深度之凹槽係沿著街道,由予以安裝在 基材的半導體晶圓的前面形成,及當半導體晶圓於磨光步驟 磨光被磨光時,半導體晶圓被分割成大量之矩形區域,以及, 處理步驟係爲一拾取步驟,用以個別拾取個分離之矩形區域 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)-2 - 579540 A8 B8 C8 D8 3----- 穴、申請專利範圍 ο (請先閲讀背面之注意事項再填寫本頁) 11 ·如申請專利範圍第1項所述之處理半導體晶圓的方 法,其中該半導體晶圓的厚度係於磨光步驟中,降低至150微 米或更低。 12. —種用於半導體晶圓背面磨光製程的基材,其係由多 數層構成之積層, 其中該積層包含有相當高剛性之一層及有一相當低剛 性之一層,該半導體晶圓係黏著至低剛性層側上。 13. 如申請專利範圍第12項所述之基材,其包含積層之 多數高剛性層。 14. 如申請專利範圍第12項所述之基材,其中該等高剛 性層均爲一聚對苯二甲酸乙烯酸片材或膜及該低剛性層係 爲一聚烯烴片材或膜。 15. 如申請專利範圍第12項所述之基材,其中該基材係 大於半導體晶圓,並且,當半導體晶圓定位於基材上時,基材 的圓周係超出半導體晶圓的圓周。 16. 如申請專利範圍第15項所述之基材,其中該基材的 圓周係超出半導體晶圓的圓周1至2mm。 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)579540 A8 B8 _____ g88 Year 丨 Amendment VI. Application for Patent Scope 1 Patent Application No. 91 122042 Chinese Application for Amendment of Patent Scope (please read the precautions on the back before filling out this page) Amended on December 24, 1992 · A method for processing a semiconductor wafer, the wafer having a plurality of rectangular areas bounded by streets arranged in a grid pattern in front of the wafer, and having a plurality of semiconductor circuits in individual rectangular areas, the method comprising: a mounting step For mounting the semiconductor wafer on the substrate by adhering the front surface of the semiconductor wafer to a substrate; and a polishing step for passing the front surface of the semiconductor wafer through the substrate Attach to a chuck mechanism and apply a polishing mechanism to the back surface of the semiconductor wafer to polish the back surface of the semiconductor wafer to reduce the thickness of the semiconductor wafer; a transfer step for mounting a mounting tape Mounted to a frame with a mounting opening in its central portion so that the mounting tape extends through the mounting opening to adhere the backside of the semiconductor wafer to the mounting Tape to mount the semiconductor wafer in the mounting opening of the frame and the back of the semiconductor wafer is adhered to the front or back of the mounting tape to remove the substrate from the front of the semiconductor; and printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A processing step is prepared for grasping the semiconductor wafer mounted on the frame from the front and performing a predetermined processing. 2. The method for processing a semiconductor wafer as described in item 1 of the scope of the patent application, wherein the substrate is adhered to the back surface of the semiconductor wafer in a transfer step, and is then removed from the front surface of the semiconductor wafer after the mounting tape. 3. The method for processing semiconductor wafers as described in item 1 of the scope of patent application. The paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) 579540 A8 B8 C8 D8. 6. The scope of patent application 2 The material is formed by a laminated layer composed of a plurality of layers. (Please read the precautions on the back before filling this page) 4. The method for processing semiconductor wafers as described in item 3 of the scope of patent application, wherein the substrate is made of a layer with a relatively high rigidity and a layer with a relatively low rigidity It is formed by a layer composed of a layer, the front surface of the semiconductor wafer is adhered to the low rigidity layer side, and when the substrate is removed from the front surface of the semiconductor wafer, the high rigidity layer system is first removed, and then, the low rigidity The layer is removed. 5. The method for processing a semiconductor wafer as described in item 4 of the scope of patent application, wherein the substrate comprises a plurality of highly rigid layers laminated. 6. The method for processing a semiconductor wafer as described in item 4 of the scope of patent application, wherein the high-rigidity layers are all a polyethylene terephthalate sheet or film. 7. The method for processing a semiconductor wafer according to item 1 of the scope of patent application, wherein the substrate is larger than the semiconductor wafer, and the circumference of the substrate exceeds the circumference of the semiconductor wafer. 8. The method for processing a semiconductor wafer according to item 7 of the scope of the patent application, wherein the circumference of the substrate exceeds the circumference of the semiconductor wafer by 1 to 2 mm. Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 9. The method for processing semiconductor wafers as described in item 1 of the scope of patent application, wherein the processing step is a dicing step for adsorbing the backside of the semiconductor wafers through a mounting tape To a sucker mechanism, and applying a cutting mechanism to the front of the semiconductor wafer to cut the semiconductor wafer along the street. 10. The method for processing a semiconductor wafer as described in item 1 of the scope of patent application, wherein the grooves having a predetermined depth are formed along the street from the front of the semiconductor wafer to be mounted on the substrate, and when the semiconductor When the wafer is polished during the polishing step, the semiconductor wafer is divided into a large number of rectangular areas, and the processing step is a picking step for individually picking up separate rectangular areas. The paper dimensions are in accordance with Chinese national standards (CNS) A4 specification (210X297 mm)-2-579540 A8 B8 C8 D8 3 ----- Cavities, patent application scope ο (Please read the precautions on the back before filling out this page) 11 The method for processing a semiconductor wafer according to item 1, wherein the thickness of the semiconductor wafer is reduced to 150 micrometers or less during the polishing step. 12. A substrate used for the polishing process of the back surface of a semiconductor wafer, which is a laminate composed of a plurality of layers, wherein the laminate includes a layer having a relatively high rigidity and a layer having a relatively low rigidity, and the semiconductor wafer is adhered To the low rigid layer side. 13. The substrate according to item 12 of the scope of patent application, which comprises most of the highly rigid layers laminated. 14. The substrate according to item 12 of the scope of patent application, wherein the high-rigidity layer is a polyethylene terephthalate sheet or film and the low-rigidity layer is a polyolefin sheet or film. 15. The substrate according to item 12 of the scope of patent application, wherein the substrate is larger than the semiconductor wafer, and when the semiconductor wafer is positioned on the substrate, the circumference of the substrate exceeds the circumference of the semiconductor wafer. 16. The substrate according to item 15 of the scope of patent application, wherein the circumference of the substrate exceeds the circumference of the semiconductor wafer by 1 to 2 mm. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized to the Chinese National Standard (CNS) A4 (210X297 mm)
TW91122042A 2001-06-18 2002-09-25 Method of processing a semiconductor wafer and substrate for semiconductor wafers used in the same TW579540B (en)

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