TW201327944A - 發光二極體燈條及其製造方法 - Google Patents
發光二極體燈條及其製造方法 Download PDFInfo
- Publication number
- TW201327944A TW201327944A TW100149674A TW100149674A TW201327944A TW 201327944 A TW201327944 A TW 201327944A TW 100149674 A TW100149674 A TW 100149674A TW 100149674 A TW100149674 A TW 100149674A TW 201327944 A TW201327944 A TW 201327944A
- Authority
- TW
- Taiwan
- Prior art keywords
- light
- emitting diode
- solder
- circuit board
- pad
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims abstract description 71
- 238000005476 soldering Methods 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 11
- 125000006850 spacer group Chemical group 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 239000011889 copper foil Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000003466 welding Methods 0.000 abstract description 6
- 239000002184 metal Substances 0.000 abstract 2
- 238000006073 displacement reaction Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000005286 illumination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000010309 melting process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10742—Details of leads
- H05K2201/10886—Other details
- H05K2201/10916—Terminals having auxiliary metallic piece, e.g. for soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
一種發光二極體燈條,包括發光二極體封裝結構及承載該發光二極體封裝結構的電路板,該發光二極體封裝結構上設有引腳,該電路板上設有焊接層,所述引腳包括水平凸塊,焊接層包括複數個間隔的焊墊,相鄰兩焊墊內側塗有錫膏,水平凸塊抵靠於兩焊墊之間並與錫膏接觸,從而避免發光二極體在後續操作中產生歪斜或偏移而導致影響發光二極體燈條成品的性能等要求的缺失。本發明還涉及一種發光二極體燈條的製造方法。
Description
本發明涉及一種半導體結構,尤其涉及一種發光二極體燈條及其製造方法。
相比於傳統的發光源,發光二極體(Light Emitting Diode,LED)具有重量輕、體積小、污染低、壽命長等優點,其作為一種新型的發光源,已經被越來越廣泛地應用。
習知的發光二極體燈條一般包括電路板及位於電路板上的複數個發光二極體,所述發光二極體的底面呈平面狀,且底面上凸設有焊點。製作該發光二極體燈條是採用表面貼片技術將發光二極體電連接於電路板上。此過程一般是先將錫膏塗抹在發光二極體下表面的焊點上,再利用打件機將發光二極體置於電路板上並將焊錫對準電路板電連接區域,最後藉由回流焊處理完成電連接。然而在打件過程中可能會出現打件位置不準確使得發光二極體歪斜或偏移;在回流焊處理過程中,焊錫的熔化也會導致發光二極體產生漂移,致使完成表面貼片的發光二極體的位置通常會變得雜亂無章,從而無法達到客戶的標準並影響燈條成品的整體性能。
有鑒於此,有必要提供一種能夠校準發光二極體排列的發光二極體燈條及其製造方法。
一種發光二極體燈條,包括發光二極體封裝結構及承載該發光二極體封裝結構的電路板,該發光二極體封裝結構上設有引腳,該電路板上設有焊接層,所述引腳包括水平凸塊,焊接層包括複數個間隔的焊墊,相鄰兩焊墊內側塗有錫膏,水平凸塊抵靠於兩焊墊之間並與錫膏接觸。
一種發光二極體燈條製造方法,包括以下步驟:
提供發光二極體,該發光二極體上向外延伸引腳,該引腳包括水平凸塊;
提供電路板,該電路板上表面設有複數個分隔的焊墊,相鄰兩焊墊之間形成有焊錫區,每兩個焊墊為一組,每組焊墊的內側塗覆錫膏;
將每個發光二極體對應每組焊墊,水平凸塊與錫膏接觸。
本發明的發光二極體燈條中發光二極體上設有凸出的引腳,並使電路板的焊墊與每個發光二極體一一對應使得打件及焊接過程中發光二極體貼設於電路板上的位置不會發生偏移,可保證發光二極體燈條中所述發光二極體貼裝位置的精準度,進一步保證該發光二極體燈條成品的性能。
下面參照附圖,結合具體實施例對本發明作進一步的描述。
請參見圖1,本發明實施方式提供的發光二極體燈條100,包括發光二極體封裝結構10及承載發光二極體封裝結構10的電路板20。
所述發光二極體封裝結構10包括基板11、設置於該基板11上的電極12、裝設於基板11上的發光二極體晶片13以及覆蓋發光二極體晶片13的封裝層14。
所述基板11大致呈板狀,該基板11包括上表面111與下表面112。該上表面111承載發光二極體晶片13。該基板11可採用陶瓷等材料製作而成。
所述電極12設置於所述基板11上,其包括間隔設置的第一電極121與第二電極122。該第一電極121與第二電極122分別自基板11的上表面111中央繞行基板11的相對兩側面延伸至基板11的下表面112。該電極12靠近基板11的下表面112的側部邊緣分別水平向外延伸並豎直向下延伸,對應第一電極121形成第一水平凸塊1211與第一豎直凸塊1212,對應第二電極122形成第二水平凸塊1221與第二豎直凸塊1222。第一水平凸塊1211與第一豎直凸塊1212的組合,第二水平凸塊1221與第二豎直凸塊1222的組合作為發光二極體封裝結構10的引腳,用於與電路板20焊接,從而電性連接並固定發光二極體封裝結構10。引腳與電極12採用一體成型製成,亦可先形成電極12,再於電極12的側面與下表面形成水平凸塊與豎直凸塊。在本實施方式中,引腳是在形成電極12之後形成於電極12上。
所述電路板20用於承載發光二極體封裝結構10,電路板20將所述發光二極體封裝結構10與外部電源電連接而為發光二極體封裝結構10提供電能。該電路板20大致呈板狀,電路板20的上表面上設有焊接層。該焊接層不連續地分佈於該電路板20的上表面而形成複數個分離的焊墊21,以供發光二極體封裝結構10的焊點焊接。每兩個相鄰的焊墊21為一組,對應連接一個發光二極體封裝結構10。
本實施方式中,以其中一對焊墊21為例進行說明,該焊墊21包括第一焊墊211與第二焊墊212,其材料為銅箔,並採用蝕刻的方式形成於電路板20的上表面。第一焊墊211與第二焊墊212的高度大於發光二極體封裝結構10的第一豎直凸塊1212與第二豎直凸塊1222的高度。
兩焊墊位於同一直線上並相互間隔一定距離形成焊錫區22,第一焊墊211包括面對第二焊墊212的側壁2111,第二焊墊212包括面對第一焊墊211的側壁2121,兩側壁2111、2121間隔的稍距離大於發光二極體封裝結構10的寬度與第一水平凸塊1211與第二水平凸塊1221的總和,以使發光二極體封裝結構10完全容置於焊錫區22中,當然,該相隔的距離以設計允許的誤差範圍而定。兩側壁2111、2121上均塗覆有錫膏30。發光二極體封裝結構10的凸塊與電路板20上的錫膏30分別對應接觸,並藉由回流焊使錫膏溶化後固定,從而將發光二極體封裝結構10與電路板20連接固定。具體地,第一焊墊211的側壁2111上塗覆的錫膏30與發光二極體封裝結構10的第一水平凸塊1211與第一豎直凸塊1212接觸;第二焊墊212的側壁2121上塗覆的錫膏30與發光二極體封裝結構10的第二水平凸塊1221與第二豎直凸塊1222接觸,以使發光二極體封裝結構10容置於焊錫區22。第一水平凸塊1211與第二水平凸塊1221分別與兩側壁2111、2121對應相距預定的距離,以在回流焊過程中控制發光二極體封裝結構10在水平方向上的位移,避免超出設計誤差範圍以產生不良品的缺失。也就是說,第一水平凸塊1211與第一焊墊211之間設有一預設的間隙,以允許發光二極體封裝結構10在回流焊中因錫膏30的融化及凝固而產生一定的位移,並使該位移控制在誤差範圍之內。第一豎直凸塊1212與第二豎直凸塊1222支撐發光二極體封裝結構10於電路板20上,以使發光二極體封裝結構10的底部與電路板20的上表面形成一間隔區23。該間隔區23分隔發光二極體封裝結構10與電路板20,以防止電路板20上其他佈線(圖未視)與發光二極體封裝結構10接觸從而形成干擾,還為錫膏30在回流焊時融化流動提供了空間。另一方面,由於間隔區23的設置,使錫膏30在熔化過程中只能在此區域內流動,增大了錫膏30與電路板20的接觸面積,從而加強錫膏30黏著的可靠度,使連接更加牢固。
在利用打件機將發光二極體封裝結構10貼裝於電路板20上的過程中,先在每組焊墊21內側塗覆錫膏30,將所述發光二極體封裝結構10對應每組焊墊21的焊錫區22向下置入,使第一豎直凸塊1212與第二豎直凸塊1222置於電路板20上,第一水平凸塊1211與第二水平凸塊1221靠近兩焊墊21的側壁2111、2121。在本實施方式中,第一豎直凸塊1212與第二豎直凸塊1222的高度小於焊墊21的厚度,既利於為錫膏30的流動預留一定的空間,又不至於使發光二極體封裝結構10裝設的位置過高從而在豎直方向上佔用太多的空間。
請同時參閱圖2,為本發明的發光二極體燈條的製作方法,其步驟包括:
提供發光二極體封裝結構10,該發光二極體封裝結構10上向外延伸引腳15,該引腳15包括豎直凸塊與水平凸塊;
提供電路板20,該電路板20上表面設有複數個分隔的焊墊21,相鄰兩焊墊21之間形成有焊錫區22,每兩個焊墊21為一組,每組焊墊21的內側塗覆錫膏30;
將每個發光二極體封裝結構10對應每組焊墊21,使豎直凸塊置於電路板20上,水平凸塊與錫膏30接觸;
將承載所述發光二極體封裝結構10的電路板20過回焊爐,使得焊錫區22的焊錫熔化後再冷卻後與發光二極體封裝結構10的引腳15與焊墊21焊接固定,形成前述發光二極體燈條。
在上述製作方法中,由於發光二極體封裝結構10上設有凸出的引腳15,並使電路板20的焊墊21與每個發光二極體封裝結構10一一對應使得打件及焊接過程中發光二極體封裝結構10貼設於電路板20上的位置不會發生偏移。由於焊墊21可採用銅箔層藉由蝕刻方式製成,因此焊墊21的精度能夠較容易的控制,而在此基礎上限定發光二極體的左右位移,可保證發光二極體燈條中所述發光二極體封裝結構10貼裝位置的精準度,進一步保證該發光二極體燈條成品的性能。
綜上所述,本發明符合發明專利要件,爰依法提出專利申請。惟,以上所述者僅為本發明之較佳實施例,舉凡熟悉本案技藝之人士,在爰依本發明精神所作之等效修飾或變化,皆應涵蓋於以下之申請專利範圍內。
100...發光二極體燈條
10...發光二極體封裝結構
11...基板
111...上表面
112...下表面
12...電極
121...第一電極
1211...第一水平凸塊
1212...第一豎直凸塊
122...第二電極
1221...第二水平凸塊
1222...第二豎直凸塊
13...發光二極體晶片
14...封裝層
15...引腳
20...電路板
21...焊墊
211...第一焊墊
2111、2121...側壁
212...第二焊墊
22...焊錫區
30...錫膏
圖1為本發明一實施方式的發光二極體燈條的剖面示意圖。
圖2為本發明一實施方式的發光二極體燈條的製造方法的流程圖。
100...發光二極體燈條
10...發光二極體封裝結構
11...基板
111...上表面
112...下表面
12...電極
121...第一電極
1211...第一水平凸塊
1212...第一豎直凸塊
122...第二電極
1221...第二水平凸塊
1222...第二豎直凸塊
13...發光二極體晶片
14...封裝層
15...引腳
20...電路板
21...焊墊
211...第一焊墊
2111、2121...側壁
212...第二焊墊
22...焊錫區
30...錫膏
Claims (10)
- 一種發光二極體燈條,包括發光二極體封裝結構及承載該發光二極體封裝結構的電路板,該發光二極體封裝結構上設有引腳,該電路板上設有焊接層,其改良在於:所述引腳包括水平凸塊,焊接層包括複數個間隔的焊墊,相鄰兩焊墊內側塗有錫膏,水平凸塊抵靠於兩焊墊之間並與錫膏接觸。
- 如申請專利範圍第1項所述的發光二極體燈條,其中,所述焊墊包括第一焊墊與第二焊墊,該第一焊墊與第二焊墊呈直線間隔設置,第一焊墊與第二焊墊之間形成焊錫區,所述錫膏塗覆於第一焊墊正對第二焊墊的側面與第二焊墊正對第一焊墊的側面。
- 如申請專利範圍第1項所述的發光二極體燈條,其中,所述發光二極體封裝結構包括基板、形成與基板上的電極及位於基板上的發光二極體晶片,電極自基板的上表面延伸自下表面,所述水平凸塊從電極的側面分別向外及向下延伸而出。
- 如申請專利範圍第3項所述的發光二極體燈條,其中,所述引腳還包括豎直凸塊,該豎直凸塊從電極的下表面向下延伸形成並抵靠在電路板上。
- 如申請專利範圍第4項所述的發光二極體燈條,其中,所述豎直凸塊的高度小於焊墊的厚度,發光二極體封裝結構的底面與電路板的上表面相互間隔形成間隔區。
- 如申請專利範圍第1項所述的發光二極體燈條,其中,每相鄰兩焊墊對應一個卡設於焊錫區中的發光二極體封裝結構,每一發光二極體封裝結構的水平凸塊與其正對的焊墊的側面之間具有一預定空隙。
- 如申請專利範圍第1項所述的發光二極體燈條,其中,所述焊墊為銅箔,並採用蝕刻的方式形成於電路板上表面。
- 一種發光二極體燈條製造方法,包括以下步驟:
提供發光二極體封裝結構,該發光二極體封裝結構上向外延伸引腳,該引腳包括水平凸塊;
提供電路板,該電路板上表面設有複數個分隔的焊墊,相鄰兩焊墊之間形成有焊錫區,每兩個焊墊為一組,每組焊墊的內側塗覆錫膏;
將每個發光二極體封裝結構對應每組焊墊,水平凸塊與錫膏接觸。 - 如申請專利範圍第8項所述的發光二極體燈條製造方法,其中,所述發光二極體封裝結構的水平凸塊與其正對的焊墊的側面之間具有一預定空隙。
- 如申請專利範圍第8項所述的發光二極體燈條製造方法,其中,所述引腳還包括豎直凸塊抵靠於電路板上,該豎直凸塊的高度小於焊墊的厚度,發光二極體封裝結構的底面與電路板的上表面相互間隔形成間隔區。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW100149674A TWI514635B (zh) | 2011-12-29 | 2011-12-29 | 發光二極體燈條及其製造方法 |
US13/525,368 US9000571B2 (en) | 2011-12-29 | 2012-06-18 | Surface-mounting light emitting diode device and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW100149674A TWI514635B (zh) | 2011-12-29 | 2011-12-29 | 發光二極體燈條及其製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201327944A true TW201327944A (zh) | 2013-07-01 |
TWI514635B TWI514635B (zh) | 2015-12-21 |
Family
ID=48694139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW100149674A TWI514635B (zh) | 2011-12-29 | 2011-12-29 | 發光二極體燈條及其製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9000571B2 (zh) |
TW (1) | TWI514635B (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI536617B (zh) * | 2012-02-17 | 2016-06-01 | 鴻海精密工業股份有限公司 | 發光二極體燈條及其製造方法 |
JP6623508B2 (ja) * | 2014-09-30 | 2019-12-25 | 日亜化学工業株式会社 | 光源及びその製造方法、実装方法 |
US10429509B2 (en) * | 2014-12-24 | 2019-10-01 | Stmicroelectronics Pte Ltd. | Molded proximity sensor |
CN105890631B (zh) * | 2014-12-25 | 2018-09-28 | 意法半导体有限公司 | 模制邻近传感器 |
JP6484398B2 (ja) * | 2015-05-19 | 2019-03-13 | 日亜化学工業株式会社 | 半導体装置 |
CN106535498A (zh) * | 2016-11-10 | 2017-03-22 | 江苏鸿佳电子科技有限公司 | 一种用于led灯的线路板贴片焊接方法 |
CN114535734B (zh) * | 2020-11-25 | 2024-01-26 | 东莞市中麒光电技术有限公司 | 一种led的激光焊接方法 |
CN113423173B (zh) * | 2021-05-29 | 2023-09-29 | 华为技术有限公司 | 电子元件封装体、电子元件封装组件及电子设备 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6787884B2 (en) * | 2002-05-30 | 2004-09-07 | Matsushita Electric Industrial Co., Ltd. | Circuit component, circuit component package, circuit component built-in module, circuit component package production and circuit component built-in module production |
KR100587020B1 (ko) * | 2004-09-01 | 2006-06-08 | 삼성전기주식회사 | 고출력 발광 다이오드용 패키지 |
US7635915B2 (en) * | 2006-04-26 | 2009-12-22 | Cree Hong Kong Limited | Apparatus and method for use in mounting electronic elements |
US9082607B1 (en) * | 2006-12-14 | 2015-07-14 | Utac Thai Limited | Molded leadframe substrate semiconductor package |
KR20140058698A (ko) * | 2009-06-24 | 2014-05-15 | 아오이 전자 주식회사 | 반도체 장치 및 반도체 장치의 제조 방법 |
TW201128812A (en) * | 2009-12-01 | 2011-08-16 | Lg Innotek Co Ltd | Light emitting device |
US20120299036A1 (en) * | 2011-05-26 | 2012-11-29 | Chipmos Technologies Inc. | Thermally enhanced light emitting device package |
US8742555B2 (en) * | 2011-08-30 | 2014-06-03 | Jian Wen | Lead frame having a flag with in-plane and out-of-plane mold locking features |
-
2011
- 2011-12-29 TW TW100149674A patent/TWI514635B/zh not_active IP Right Cessation
-
2012
- 2012-06-18 US US13/525,368 patent/US9000571B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20130168722A1 (en) | 2013-07-04 |
TWI514635B (zh) | 2015-12-21 |
US9000571B2 (en) | 2015-04-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI514635B (zh) | 發光二極體燈條及其製造方法 | |
JP5933959B2 (ja) | 半導体光学装置 | |
TWI425667B (zh) | Led覆晶結構及其製造方法 | |
WO2014115561A1 (ja) | 半導体装置 | |
TWI505519B (zh) | 發光二極體燈條及其製造方法 | |
JP6850938B1 (ja) | 半導体装置、及びリードフレーム材 | |
TWI536617B (zh) | 發光二極體燈條及其製造方法 | |
JP5881829B2 (ja) | クワッドフラットノーリードパッケージ体をパッケージングする方法、及びパッケージ体 | |
US9748205B2 (en) | Molding type power module | |
JP2018152465A (ja) | 半導体モジュール | |
JP2013016709A (ja) | 半導体装置 | |
US20240250005A1 (en) | Metal clip assembly, semiconductor device assembly, method for manufacturing semiconductor device assembly, and application of semiconductor device assembly | |
JP6754769B2 (ja) | 半導体モジュールおよびその製造方法 | |
JP2012212794A (ja) | 表面実装用側面受発光型光半導体装置およびそれを用いたモジュール | |
JP2015188004A (ja) | パッケージ、半導体装置及び半導体モジュール | |
JP5833610B2 (ja) | 発光ダイオードパッケージ及びその製造方法 | |
TW201442161A (zh) | 半導體裝置 | |
JP5721797B2 (ja) | 発光ダイオードパッケージ及びその製造方法 | |
CN103258946B (zh) | 发光二极管灯条及其制造方法 | |
CN103185228B (zh) | 发光二极管灯条及其制造方法 | |
TWI546931B (zh) | 半導體器件的製作方法 | |
KR20150055438A (ko) | 인쇄회로기판, 이를 포함하는 반도체 패키지 및 인쇄회로기판 제조 방법 | |
JP2016082169A (ja) | 電子装置 | |
TWI492687B (zh) | 發光二極體燈條及其製造方法 | |
JP2013161961A (ja) | 半導体モジュールの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |