201131837 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種具有薄化結構之半導體發光元件及其 製造方法。 【先前技術】 半導體發光元件’例如發光二極體(LED)，在近年來 亮度不斷的提昇下，應用領域已從傳統的指示燈或裝飾 用途拓展至各類裝置之光源，甚至在不久的將來，極有 可能取代傳統之日光燈，成為新一代照明領域之光源。 目前發光二極體之内部量子效率約為50%至80%左 右；約有20%至50%之輸入功率無法被轉換光，而以熱 的方式產生在發光二極體内。若無法有效的將發光二極 體内部的熱導出，會導致發光二極體溫度上升，而劣化 了發光二極體的可靠度。另一方面，發光二極體產生之 光線若無法有效被取出，部份光線因全反射因素而侷限 在發光二極體内部來回反射或折射，最終被電極或發光 層吸收，使亮度無法提升。本發明提供創新之解決方案， 藉由降低發光二極體之熱阻或提高光取出效率，以解決 發光二極體之熱累積問題，並提昇元件的可靠度及發光 效率。本發明同時提供一可應用於高功率輸出之發光元 201131837 件，以應用於照明領域。 【發明内容】 本發明提供一發光元件，包含：一載體；一半導體發光結 構，形成於該載體上；一導電通道，延伸至該半導體發光結構 之一深度；一第一導線墊透過該導電通道與該半導體發光結構 電性連接；以及一第二導線墊，電性連接該半導體發光結構。 本發明另提出一發光元件，包含：一載體；一半導體發光 結構，形成於該載體上；一導電通道，延伸至該半導體發光結 構之一深度；一第一導線墊電性連接該半導體發光結構；以及 -第二導線墊；其巾’該第-及第二導線塾分卿成於該載體 的兩側。 【實施方式】 圃 仰小一付合冬發明一貫施例夂水平式發光元件i， 包括一薄化基板111，具有一上表面S1及一下表面S2 ; 一半 導體緩衝層112位於薄化基板in之上表面；—半導體發光 結構12形成於半導體緩衝層112上，包含—第—導電型半導 體層121、一活性層122、以及—第二導電型半導體層123, -部份之半導體發光結構12係部份移除以裸露出部份 之第一導電型半導體層121 ; —反科思， 夂射層142形成於薄化基板 111之下表面；一載體13藉由一中 1/1Λ ^ 丫間層mi貼附於反射層 M2;—第一導線墊15及一第二導绩 等綠蟄16分別與第二導電型 201131837 半導體層123及第一導電型半導體層12ι電性連接，且第一 導線墊15及第二導線墊16位於基板之同一側；以及複數個 第一通道17穿透薄化基板U1並延伸至半導體緩衝層丨12之 一深度。其中，薄化基板111係薄化一用以成長半導體緩衝 層112及半導體發光結構12之成長基板後所形成。成長基板 之材料包括至少一材料選自於砷化鎵、藍寶石、碳化矽、氮 化鎵、以及氮化鋁所組成之材料群組等，其導熱係數通常不 大於载體的導熱係數。為降低發光元件之熱阻，於完成成長 半導體緩衝層112及半導體發光結構12於成長基板之後，進 行薄化以使成長基板之厚度由原來約200或300微米以上減 至約不大於5〇微米以形成薄化基板丨丨丨，以有效降低元件之 熱阻。薄化基板111之厚度較佳為不大於20微米；更佳為不 大於5微米。此外，為保持製程之可靠度，半導體緩衝層112 係作為薄化成長基板時之緩衝層，以避免於薄化過程中，因 薄化速率或均勻度的差異所造成的製程變異，使半導體發光 結構12受到損壞。薄化基板111及半導體緩衝層112所形成 ' 之薄化結構仍要保有一定之厚度，較佳為不小於2微米，以 • 保持製程之可靠度。載體13之導熱係數不小於薄化基板⑴ 之導熱係數，以降低發光元件之熱阻。載體13包含導熱係數 不小於50W/m · °c之材質；較佳為不小於刚w/m · 〇c，例 如包含魏物、碳化物、金屬、金屬合金、金屬氧化物、金 屬複合材料、鑽石、類鑽碳（diam〇nd_Ukecarb〇n)等材料， 並可加入低膨脹係數材質以降低載體的產生的應力。第—通 201131837 道π係包含一透明材質例 或空氣，其折射率與薄化基板 夕、鼠化矽、有機高分子、 〇]，以增加光摘出效率。第二111之折射率差異至少大於 明材質，例如碳化矽、氧 通道17亦可包含一高導熱透 之熱阻，並提高光摘出效率鑽石等材料，以降低元件 道Π係穿透薄化基板U1並延伸^施例中，複數個第一通 ^ 0 1 ] ^irJL 至半導體緩衝層112之一深 没孕乂佳為0.1〜1微米，使得 道Π與半導體緩衝層】：板1U及複數個第-通 〃铸齡躺112相細之界面為— = 錢而增加光摘出效率。複數個第一通道 —’但亦可以準週期性、變週期性、 或非週期性排列；例如為以直押 狀體形成之三_列，之祕或多邊形柱 次乂複數長條形溝渠彼此交聯 (c聰杨ng)，例如呈網狀。中間層⑷可作為一黏著層以 黏著載體U及反射層142 ;於另一實施例中，中間層⑷可 作為-電鑛晶種層’使得載體13得以魏形成於其上；於另 •—實施例，中間I 141亦可作為-擴散阻障層，以抑制反射 層141與載體13之交互擴散而影響材質特性。第一導電型半 導體層12卜活性層122、或第二導電型半導體層之材料 包含 AlpGaqInn_p_q}P 或 AlxInyGa0_x-y)N，其中，〇却，q幻；p、 q、x、y均為正數；（p+q)U; (x+y)U。第一導電型半 導體層121包括一第一導電型束缚(ciadding)層，第二導電型 半導體層123包括一第二導電型束缚(dadding)層。 圖2A揭示一符合本發明一實施例之垂直式發先元件 201131837 2a’相較於圖1所示之發光元们，發光元件&之第一導線 替25及第二導㈣26係位於基板之相異侧；此外，發光元 件2a更包含至少-個傳導通道娜穿透薄化基板⑴及半導 體緩衝層II2並延伸至第—導電型半導體層121之—深产且 與第-導電性半導體層121紐連接。反射層地及中^ 24la為-導電材質’於—正向偏壓下，於第—導線塾μ及 第二導線墊26之間形成一通路。如圖2B所示之發光元件 2b，其傳導通道28b亦可穿透反射層⑽，並且具有盘中間 層24帅同之材質。圖2C揭示另一垂直式發光元件2^目 較於圖2A財之發光元件2a，發光元件2e之料體發光結 構12之-部份係部份移除以裸露出部份之第—導電型半導 體層⑵，並且包含至少—個傳導通道撕自裸露之第一導 電型半導體層121延伸至反射層142。傳導通道加、挪、 或28c的數量及排列為使得電流分佈具有較佳的效果；除此 之外，傳導通道28a、28b、或撕因具有較第一導電性半 導體層121為高之導熱係數’可將半導體發光結構12所產生 的熱直接傳導至載體13。傳導通道28a、挪、或28e之材質 包含金屬、金屬合金、金屬氧化物、或導電高分子等導電導 熱材質。 圖3A揭不彳合本發明一實施例之水平式發光元件 3a，相較於圖i所示之發光元件】，發光元件％具有一透明 載體33及-複數個透明之第—通道37a ’並且以—透明中間 層341黏著於薄化基板lu。如圖3B所示，通道37b亦可僅 201131837 形成於薄化基板111内，而不穿透薄化基板U1。中間層341 可為一透明黏著層，其材質包含苯并環丁烯（BCB)、過氟 環丁烷(PFBC)、環氧樹脂(Epoxy)、矽膠(Silic〇ne)等有機高 分子材質。通道37a及37b係包含一透明材質例如：氧化矽、 氮化矽、有機高分子、或空氣，其折射率與薄化基板lu之 折射率差異至少大於0.1，以增加光摘出效率。通道37a及 b亦可包含一咼導熱透明材質，例如氮化鎵、氮化鋁、唉 鲁、夕氧化鋅、或鑽石等材質，以降低元件之熱阻，並提高 光摘出政率。通道37a或37b可為具有與中間層341相 不同材質。 於圖4揭不依本發明另一水平式發光元件之實施例。相較 :圖1所不之發光元件i ’原先用以成長半導體緩衝層山 半導體發光結構U之成長基板，於本實施例巾，係於完成 2體緩衝層112及半導體發光結構12之成長後完全移除。 鲁體1^件4之詳細結構包含：載體13 ;中間層141形成於載 49 ^上，反射層142形成於中間層141上；一電流分散層 層49成於反射I 142 ^ ;半導體緩制112形成於電流分散 一品上’半導體發光結構12形成於半導體緩衝層112之第 第:域上’包含第一導電型半導體層12卜活性層122、以及 半:導電型半導體層123 ;第-導線塾15形成於第二導電型 第_ ^曰、123上，第一導線墊16形成於半導體緩衝層112之 區域上，複數個導電通道47穿透半導體緩衝層112並延 至第-導電型半導體層121之—深度。另，—部份之複數 201131837 個導電通道47係形成於第二導線墊16與電流分散層49之間 以形成電性導通’另-部份之複數個導電通道47係介於第一 導電型半導體層121及電流分散層49之間以分散電流。導電 通道47及電流分散層49為-透明導電材質，包含金屬氧化 物，例如為氧化銦錫、或導電性良好之半導體層，例如捧雜 碳、矽、或鎂之GaP或GaN材質。發光元件4更包含一歐姆 接觸層48形成於通道47與第—導電型半導體層i2i之間， 以降低接面電阻；歐姆接觸層48之材質可為一高載子（電子 或電洞）濃度之半導體層。為保持製程之可靠度，半導體緩 衡廣112具有-厚度，較佳地，半導體緩衝| ιΐ2之厚度係 六於2 «’以避免於成長基板之去除過程中，因製程之變 異益成半導體發光結構η受到損壞。半導體緩衝層之厚 度介於2至20微米；較佳為介於2至10微米。 圖5Α至5G揭示一形成圖2C之發光元件及之製程方 法’包含以下步驟： 1.如圖5A所示’首先提供—成長基板u，並於成長基 板11上依序成長—半導體緩衝層112、—半導體發光結構 12,包括一第一導電型半導體層121、一活性層122、及二第 >導電型半導體層m於成長基板n之—側，接著以微獅 刻方式去除—部份之半導體發光結構，以裸露-部份第一導 電絮半導體層U1之表面； 2·如圖5Β所示，以C02雷射照射裸露之第—導電型半 導雜層ui之表面以形成一第二通道181; 201131837 3. 如圖5C所不’提供一支擇體i9，並 貼附於半導體發光疊層之表面； 精由-黏者層191 4. 如圖5D所示，研磨成長基板 度以形成-薄化基板„卜並露出至—預定厚 5. 如圖5E卿，自薄化基板 第-通道17穿透薄化基板ill並延伸至半導體==個 -深度，較佳為0.W微米，政中 '，、衝曰112之 雷射光束縣； 、叙方法包括以 6. 如圖5F所示，填充一透明材質或 道Π内，接著形成-反射層142於薄化基板ιη之表第面通 7. 提供—載體13及一中間層⑷形成於載體上. 8. 貼附中間層141及載體13至反射層⑷；， 9. 如圖SG所示，移除黏著層⑼及支樓體d ; 一、10.如圖2C之發光元件2c所示，覆蓋一導電材質於第 -通道181内使成為—傳導通道故’並形成第—導線塾μ 於第二導電型半導體層123 ±，以及形成第二導線墊施於 載體13之外表面。 步驟4之研磨的方法包括化學機械研磨 mechanical polishing; CMP)方法，係運用一化學機械研磨設 備藉由研磨塾以及一化學研磨液(chemical slurry)，同時 以物理性及化學性地移除基板。於本發明之一實施例，成長 基板之材質為厚度約2〇〇〜400微米之藍寶石，化學研磨液包 含具化學反應性之化學研磨顆粒，例如Snica膠體，分佈於 201131837 KOH溶液中’並於研磨中與藍寳石反應產生Al2Si2〇7而被磨 除。於一實施例中’膠體尺寸可選擇直徑01 以下，以得 到一光滑之表面；於另一實施例，膠體尺寸可選擇直徑〇.丨μιη 至1 μπι之間’以得到一與發光波長相近尺寸之漫射面。為逹 到兼具研磨效率及維持良好之均勻度，並避免過度研磨而損 壞半導體發光結構12，於研磨初期使用研磨速率較快之研磨 方式，例如使用傳統機械研磨設備，以純機械研磨方式快速 研磨基板至接近目標值’例如研磨速率約為l〇〇jim/hr，將藍 寶石基板快速研磨至約60μιη (目標值為20um)，再使用化 學機械研磨設備，以化學機械研磨方式研磨，以提高研磨均 勻度及精準度，例如以直徑約1 之Siiica膠體研磨，研磨 速率約為60 μΓη/hr。此外，若欲完全研磨去除成長基板（如 本發明圖4之實施例），並停止於半導體緩衝層112上，半 導體緩衝層m之材質可選用對Silica無化學反應性或化學 反應性差之材質’例如為氮化鎵(GaN)為主之材料，以作為去 除藍寶石基板之停止層’並使用較細小之膠體研磨，例如直 徑約〇.Un^Silica膠體，以提高藍寶石基板對半導體緩衝 層m之選擇比（藍寶石基板之研磨速率與半導體緩衝層⑴ 之研磨速率之比值），其對藍寶石之研磨速率約為6rt; 對具有GaN半導體緩衝層112之研磨速率約為藍寶 石基板對GaN半導體緩衝層丨12之選擇比約為6。 策Μ步驟9之中間層141係為—黏著層用以黏著載體13及 基板U1 ;黏著層141可為有機黏著層或金屬黏著層。 201131837 於另-實施例’中間層141係為―電鐘晶種層，且載體13係 電鍍形成於此電鑛晶種層上，電鑛形成之載體D之材質包含 電鍍銅，中間層141更可包含一擴散阻絶層形成於反射層142 及所述之電鍍晶種層之間，以抑制反射層 142與載體13之交 互擴散而影響材質特性。 圖6A至圖6C揭示_關於步驟2或步驟5之雷射光照射 6A所示為一傳統量測膜厚之 形成通道之裝置及方法。如圖BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light-emitting element having a thinned structure and a method of fabricating the same. [Prior Art] Semiconductor light-emitting elements, such as light-emitting diodes (LEDs), have been expanding from conventional indicator lights or decorative applications to light sources of various devices in the near future, even in the light of recent years. It is very likely to replace the traditional fluorescent lamp and become the light source of the new generation of lighting. At present, the internal quantum efficiency of the light-emitting diode is about 50% to 80%; about 20% to 50% of the input power cannot be converted into light, but is generated thermally in the light-emitting diode. If the heat inside the light-emitting diode cannot be effectively led out, the temperature of the light-emitting diode rises, and the reliability of the light-emitting diode is deteriorated. On the other hand, if the light generated by the light-emitting diode cannot be effectively taken out, part of the light is limited by the total reflection factor, and is reflected or refracted inside the light-emitting diode, and finally absorbed by the electrode or the light-emitting layer, so that the brightness cannot be improved. The present invention provides an innovative solution for solving the heat accumulation problem of the light-emitting diode by reducing the thermal resistance of the light-emitting diode or improving the light extraction efficiency, and improving the reliability and luminous efficiency of the element. The invention also provides a illuminating element 201131837 which can be applied to high power output for application in the field of illumination. SUMMARY OF THE INVENTION The present invention provides a light emitting device comprising: a carrier; a semiconductor light emitting structure formed on the carrier; a conductive path extending to a depth of the semiconductor light emitting structure; a first conductive pad through the conductive via Electrically connecting to the semiconductor light emitting structure; and a second lead pad electrically connected to the semiconductor light emitting structure. The present invention further provides a light emitting device comprising: a carrier; a semiconductor light emitting structure formed on the carrier; a conductive path extending to a depth of the semiconductor light emitting structure; and a first lead pad electrically connecting the semiconductor light emitting structure And a second wire pad; the towel's first and second wires are divided into two sides of the carrier. [Embodiment] The horizontal light-emitting element i includes a thinned substrate 111 having an upper surface S1 and a lower surface S2, and a semiconductor buffer layer 112 is located on the thinned substrate. The upper surface; the semiconductor light emitting structure 12 is formed on the semiconductor buffer layer 112, and includes a first conductive semiconductor layer 121, an active layer 122, and a second conductive semiconductor layer 123, and a portion of the semiconductor light emitting structure 12 Partially removed to expose a portion of the first conductive semiconductor layer 121; -Anchor, the enamel layer 142 is formed on the lower surface of the thinned substrate 111; a carrier 13 is formed by a 1/1 Λ ^ The layer m is attached to the reflective layer M2; the first conductive pad 15 and the second conductive green layer 16 are electrically connected to the second conductive type 201131837 semiconductor layer 123 and the first conductive semiconductor layer 12, respectively, and first The wire pad 15 and the second wire pad 16 are located on the same side of the substrate; and the plurality of first channels 17 penetrate the thinned substrate U1 and extend to a depth of the semiconductor buffer layer 丨12. The thinned substrate 111 is formed by thinning a growth substrate for growing the semiconductor buffer layer 112 and the semiconductor light emitting structure 12. The material of the growth substrate comprises at least one material selected from the group consisting of gallium arsenide, sapphire, tantalum carbide, gallium nitride, and aluminum nitride, and the thermal conductivity is generally not greater than the thermal conductivity of the carrier. In order to reduce the thermal resistance of the light-emitting element, after the growth of the semiconductor buffer layer 112 and the semiconductor light-emitting structure 12 is completed, the thinning is performed to reduce the thickness of the grown substrate from about 200 or 300 micrometers or more to about 5 micrometers or less. To form a thinned substrate 丨丨丨 to effectively reduce the thermal resistance of the device. The thickness of the thinned substrate 111 is preferably not more than 20 μm; more preferably not more than 5 μm. In addition, in order to maintain the reliability of the process, the semiconductor buffer layer 112 serves as a buffer layer for thinning the growth substrate, so as to avoid process variation caused by the difference in thinning rate or uniformity during the thinning process, and to cause semiconductor light emission. Structure 12 is damaged. The thinned structure formed by thinning the substrate 111 and the semiconductor buffer layer 112 is still required to have a certain thickness, preferably not less than 2 μm, to maintain the reliability of the process. The thermal conductivity of the carrier 13 is not less than the thermal conductivity of the thinned substrate (1) to reduce the thermal resistance of the light-emitting element. The carrier 13 comprises a material having a thermal conductivity of not less than 50 W/m · °c; preferably not less than w/m · 〇c, for example, containing Wei, carbide, metal, metal alloy, metal oxide, metal composite, Diamond, diamond-like carbon (diam〇nd_Ukecarb〇n) and other materials, and can be added with a low expansion coefficient material to reduce the stress generated by the carrier. No. 201131837 The π system contains a transparent material or air, and its refractive index and thinned substrate, plaque, organic polymer, 〇], to increase the light extraction efficiency. The refractive index difference of the second 111 is at least greater than that of the bright material. For example, the tantalum carbide and the oxygen channel 17 may further comprise a high thermal conductivity, and improve the light extraction efficiency of the diamond and the like to reduce the component ballast system to penetrate the thinned substrate. U1 and extending ^, in the embodiment, a plurality of first pass ^ 0 1 ] ^ irJL to one of the semiconductor buffer layer 112 is less than 0.1 to 1 micron, so that the ballast and the semiconductor buffer layer are: 1U and plural The interface of the first-to-be-casting age is 112-thin, and the light extraction efficiency is increased. a plurality of first channels—but can also be quasi-periodic, periodic, or non-periodic; for example, a three-column formed by a straight body, a secret or a polygonal column, and a plurality of long trenches Cross-linking (c Cong Yang ng), for example, in the form of a net. The intermediate layer (4) can serve as an adhesive layer to adhere the carrier U and the reflective layer 142; in another embodiment, the intermediate layer (4) can serve as an electro-minening seed layer to enable the carrier 13 to be formed thereon; In the embodiment, the intermediate I 141 can also serve as a diffusion barrier layer to suppress the interdiffusion of the reflective layer 141 and the carrier 13 to affect the material properties. The material of the first conductive type semiconductor layer 12, the active layer 122, or the second conductive type semiconductor layer contains AlpGaqInn_p_q}P or AlxInyGa0_x-y)N, wherein 〇, q 幻; p, q, x, y are all positive numbers ;(p+q)U; (x+y)U. The first conductive type semiconductor layer 121 includes a first conductive type ciadding layer, and the second conductive type semiconductor layer 123 includes a second conductive type dadding layer. FIG. 2A illustrates a vertical emitting element 201131837 2a′ according to an embodiment of the present invention. Compared to the illuminating elements shown in FIG. 1, the first conductive line 25 and the second conductive (four) 26 of the light-emitting element are located on the substrate. In addition, the light-emitting element 2a further includes at least one conductive channel that penetrates the thinned substrate (1) and the semiconductor buffer layer II2 and extends to the first conductive type semiconductor layer 121 - a deep-producing and first-conductive semiconductor layer 121 Newton connection. The reflective layer and the middle layer of the conductive material are formed under the forward bias to form a path between the first wire 塾μ and the second wire pad 26. As shown in Fig. 2B, the light-emitting element 2b has a conductive path 28b which also penetrates the reflective layer (10) and has a material similar to that of the intermediate layer 24. 2C shows that the other vertical light-emitting element is smaller than the light-emitting element 2a of FIG. 2A, and the part of the light-emitting structure 12 of the light-emitting element 2e is partially removed to expose the first-conducting type. The semiconductor layer (2), and including at least one of the conductive vias, is torn from the exposed first conductive semiconductor layer 121 to the reflective layer 142. The number and arrangement of the conduction path addition, movement, or 28c are such that the current distribution has a better effect; in addition, the conduction path 28a, 28b, or tear has a higher thermal conductivity than the first conductive semiconductor layer 121. The heat generated by the semiconductor light emitting structure 12 can be directly conducted to the carrier 13. The material of the conduction path 28a, the movement, or the 28e includes a conductive heat conductive material such as a metal, a metal alloy, a metal oxide, or a conductive polymer. 3A illustrates a horizontal light-emitting element 3a according to an embodiment of the present invention, which has a transparent carrier 33 and a plurality of transparent first-channels 37a' compared to the light-emitting element shown in FIG. The transparent intermediate layer 341 is adhered to the thinned substrate lu. As shown in FIG. 3B, the channel 37b may also be formed in the thinned substrate 111 only in 201131837 without penetrating the thinned substrate U1. The intermediate layer 341 may be a transparent adhesive layer made of an organic high molecular material such as benzocyclobutene (BCB), perfluorocyclobutane (PFBC), epoxy resin (Epoxy) or silicone (Silic〇ne). The channels 37a and 37b comprise a transparent material such as hafnium oxide, tantalum nitride, organic polymer, or air, and the refractive index differs from the thinned substrate lu by at least 0.1 to increase the light extraction efficiency. Channels 37a and b may also include a thermally conductive transparent material such as gallium nitride, aluminum nitride, ruthenium, galvanic oxide, or diamond to reduce the thermal resistance of the component and improve the light extraction rate. The passage 37a or 37b may have a different material from the intermediate layer 341. An embodiment of another horizontal light-emitting element according to the present invention is disclosed in FIG. Compared with the light-emitting element i of FIG. 1 , the growth substrate which is originally used to grow the semiconductor buffer layer mountain semiconductor light-emitting structure U is formed after the growth of the 2-body buffer layer 112 and the semiconductor light-emitting structure 12 is completed. Remove completely. The detailed structure of the body 4 includes: a carrier 13; the intermediate layer 141 is formed on the carrier 49, the reflective layer 142 is formed on the intermediate layer 141; and a current dispersion layer 49 is formed to reflect I 142 ^; 112 is formed on the current dispersion product. The semiconductor light-emitting structure 12 is formed on the first: region of the semiconductor buffer layer 112. The first conductive semiconductor layer 12 includes an active layer 122, and a semi-conducting semiconductor layer 123. The first conductive pad 47 is formed on the region of the semiconductor buffer layer 112, and the plurality of conductive vias 47 penetrate the semiconductor buffer layer 112 and extend to the first conductive semiconductor layer. 121 - depth. In addition, a plurality of 201131837 conductive channels 47 are formed between the second wire pad 16 and the current dispersion layer 49 to form an electrical conduction. The other plurality of conductive channels 47 are interposed between the first conductivity type. A current is dispersed between the semiconductor layer 121 and the current dispersion layer 49. The conductive path 47 and the current dispersion layer 49 are made of a transparent conductive material and contain a metal oxide such as indium tin oxide or a semiconductor layer having good conductivity, such as GaP or GaN made of carbon, germanium or magnesium. The illuminating element 4 further includes an ohmic contact layer 48 formed between the channel 47 and the first conductive type semiconductor layer i2i to reduce the junction resistance; the material of the ohmic contact layer 48 may be a high carrier (electron or hole) concentration. The semiconductor layer. In order to maintain the reliability of the process, the semiconductor buffer has a thickness of -112, preferably, the thickness of the semiconductor buffer | ιΐ2 is six to 2 «' to avoid the process of the growth of the substrate, due to the variation of the process The structure η is damaged. The thickness of the semiconductor buffer layer is between 2 and 20 microns; preferably between 2 and 10 microns. 5A to 5G disclose a method for forming the light-emitting device of FIG. 2C and the method includes the following steps: 1. First, as shown in FIG. 5A, 'first-provided--grown substrate u, and sequentially grown on the growth substrate 11--semiconductor buffer layer 112 The semiconductor light emitting structure 12 includes a first conductive semiconductor layer 121, an active layer 122, and a second conductive semiconductor layer m on the side of the growth substrate n, and then removed by a micro lion. a semiconductor light emitting structure to expose the surface of the first conductive frit semiconductor layer U1; 2, as shown in FIG. 5A, irradiating the surface of the exposed first-conducting semi-conductive layer ui with a C02 laser to form a first Two channels 181; 201131837 3. As shown in Figure 5C, a piece of body i9 is provided and attached to the surface of the semiconductor light-emitting layer; fine-adhesive layer 191 4. As shown in Fig. 5D, the substrate length is ground. To form a thinned substrate and exposed to a predetermined thickness of 5. As shown in Fig. 5E, the thinned substrate first channel 17 penetrates the thinned substrate ill and extends to the semiconductor == one-depth, preferably 0. W micron, political middle', rushing 112 laser beam county; As shown in FIG. 5F, a transparent material or a ballast is filled, and then a reflective layer 142 is formed on the surface of the thinned substrate i. The carrier 13 and an intermediate layer (4) are formed on the carrier. 8. Attach the intermediate layer 141 and the carrier 13 to the reflective layer (4); 9. Remove the adhesive layer (9) and the support body d as shown in Fig. SG; 1. 10. As shown in the light-emitting element 2c of Fig. 2C, cover A conductive material is made into a conductive path in the first channel 181 and forms a first conductive line 于μ in the second conductive type semiconductor layer 123±, and a second conductive pad is formed on the outer surface of the carrier 13. Step 4 The method of grinding includes a chemical mechanical polishing (CMP) method using a chemical mechanical polishing apparatus to simultaneously remove physical and chemically by polishing a crucible and a chemical slurry. In one embodiment, the growth substrate is made of sapphire having a thickness of about 2 〇〇 to 400 μm, and the chemical polishing liquid contains chemically reactive chemical abrasive particles, such as a Snica colloid, which is distributed in the 201131837 KOH solution and is sapphire Al2Si2〇7 should be produced and removed. In one embodiment, the 'colloid size can be selected to be less than 01 to obtain a smooth surface; in another embodiment, the size of the colloid can be selected from 〇.丨μιη to 1 μπι. In order to obtain a diffusing surface of a size close to the wavelength of light emission, in order to achieve the same polishing efficiency and maintain good uniformity, and avoid excessive polishing to damage the semiconductor light emitting structure 12, the grinding rate is faster at the initial stage of polishing. By way of example, using conventional mechanical grinding equipment, the substrate is rapidly ground to a near target value by pure mechanical grinding. For example, the polishing rate is about l〇〇jim/hr, and the sapphire substrate is rapidly ground to about 60 μm (target value is 20 um). The chemical mechanical polishing equipment is ground by chemical mechanical polishing to improve the uniformity and precision of the grinding, for example, grinding with a Siica gel having a diameter of about 1 and a grinding rate of about 60 μΓη/hr. In addition, if the growth substrate (such as the embodiment of FIG. 4 of the present invention) is completely polished and stopped on the semiconductor buffer layer 112, the material of the semiconductor buffer layer m may be made of a material that is not chemically reactive or chemically reactive to Silica. For example, a gallium nitride (GaN)-based material is used as a stop layer for removing the sapphire substrate and is polished using a fine colloid, such as a diameter of about Un.Un^Silica colloid, to increase the sapphire substrate to the semiconductor buffer layer m. The selection ratio (ratio of the polishing rate of the sapphire substrate to the polishing rate of the semiconductor buffer layer (1)) is about 6 rt for the sapphire; the polishing rate for the GaN semiconductor buffer layer 112 is about the sapphire substrate to the GaN semiconductor buffer layer. The choice ratio of 12 is about 6. The intermediate layer 141 of the step 9 is an adhesive layer for adhering the carrier 13 and the substrate U1; the adhesive layer 141 may be an organic adhesive layer or a metal adhesive layer. 201131837 In another embodiment, the intermediate layer 141 is a "bell" seed layer, and the carrier 13 is electroplated to form the seed layer of the electric ore. The material of the carrier D formed by the electric ore comprises electroplated copper, and the intermediate layer 141 is further A diffusion barrier layer may be formed between the reflective layer 142 and the electroplated seed layer to inhibit interdiffusion of the reflective layer 142 and the carrier 13 to affect material properties. Figures 6A through 6C illustrate apparatus and methods for forming a channel for conventional measurement of film thickness as shown by laser light illumination 6A of step 2 or step 5. As shown
橢圓偏光儀6之示意圖包含—待測疊層結構包含—第一材質 61以及一第二材質62、一雷射a、一雷射接收器，、以及 一資料運算纽裝置65，㈣於軸通道前制第—材_ 及第二材質62之膜厚。請同時參考圖6B及圖W揭示-依 本發明形成通道之妓，包細下步驟： 、1.提供—疊層結構包含-第-材料層61(例如為GaN、 或如圖2C之121及11 处 第一材料層62(例如為Sapphire 或如圖2C之111);The schematic diagram of the ellipsometer 6 includes a first material 61 and a second material 62, a laser a, a laser receiver, and a data operation device 65, and (4) a shaft channel. The film thickness of the front material _ and the second material 62. Please refer to FIG. 6B and FIG. 12 simultaneously - after forming the channel according to the present invention, the steps are as follows: 1. Providing - the laminated structure comprises - the - material layer 61 (for example, GaN, or as shown in FIG. 2C and 11 first material layer 62 (for example, Sapphire or 111 as shown in Fig. 2C);
2.測得第一材料層 之膜厚值T2 ; 61之膜厚值T1，以及第二材料層62 使用雷射6 6以-第-雷射參數組合移除照射於第一材 之第—照射區域使形成—接近T1深度之通道，以裸 路出第一材料層62 ; ,《以-第二雷射參數組合，於前—步驟中所形成之通 遏’移除_於第二_層62之第二照缝域，使形成一接 近(T1+T3)深度之通道，其中T3ST2。 13 201131837 刖述之第及第—雷射參數組合包含雷射種類、強度、 脈衝週期W，脈衝咖紐W 數設定，㈣整雷射光 照射之強度及照射時間，以控制移除之深度及移除效率。 本發月所辟之各貫施例僅用以說明本發明，並非用以 限制本發明之制。任何人對本發騎作之任何顯而易知之 修飾或變更皆不脫離本發明之精神與範圍。 【圖式簡單說明】 圖1為一示意圖 一實施例。 ，顯示依本發明之水平式發光it件結構之第 示依本發明之垂直式發光元件結構 圖2A至2C為示意圖，顯 之第一至第三實施例。 圖3A及3B為示意圖， 第二至第三實施例。 顯示依本發明水平式發光元件結構之 圖4為一示意圖 實施例。 ’顯示依本發明水平式發光元件結構之第四 圖5八至5G顯示形成圖2C之發光元件結構之各 闯Λ Λ扣_ /哪不思圖 圖6Α顯示一橢圓偏光儀之示意圖。 至6Β顯示一雷射形成通道之各步驟示意圖。 圖6C顯示一雷射形成通道之裝置示意圖。 【主要元件符號說明】 11 :成長基板； ⑴：薄化基板； 201131837 112 :半導體緩衝層； 121 :第一導電型半導體層； 123 :第二導電型半導體層； 141、241a、241b、341 :中間層； 15、25 :第一導線墊； 17、37a、37b :第一通道； 191 :黏著層； 28a、28b、28c、47:導電通道； 49 :電流分散層； 62 :第二材料層； 64 :雷射接收器； S1 :上表面； W:脈衝時間寬度； 12 :半導體發光結構； 122 :活性層； 13 :載體； 142、242a、242b :反射層； 16、26、26a :第二導線墊； 181 :第二通道； 19 :支撐體； 48 :歐姆接觸層； 61 :第一材料層； 63、66 :雷射； 65 :資料運算處理器； S2 :下表面； tpulse :脈衝週期。2. Measure the film thickness value T2 of the first material layer; the film thickness value T1 of 61, and the second material layer 62 using the combination of the laser 6 6 and the -th-laser parameter to remove the illumination of the first material - The illuminating area is such that a channel close to the depth of T1 is formed, and the first material layer 62 is barely exited; "Combined with the second laser parameter, the pass formed in the previous step" is removed _ in the second _ The second seam region of layer 62 is such that a channel close to (T1 + T3) depth is formed, where T3ST2. 13 201131837 The first and third parameters of the laser parameters include laser type, intensity, pulse period W, pulse coffee W setting, (iv) intensity and illumination time of the entire laser beam to control the depth and shift of the removal. In addition to efficiency. The examples of the present invention are intended to illustrate the invention and are not intended to limit the invention. Any modification or alteration of the present invention by any person without departing from the spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a vertical light-emitting element according to the present invention is shown in Figs. 2A to 2C, and the first to third embodiments are shown. 3A and 3B are schematic views, second to third embodiments. Fig. 4 showing the structure of a horizontal light-emitting element according to the present invention is a schematic embodiment. The fourth embodiment of Figs. 5 to 5G showing the structure of the light-emitting element of Fig. 2C is shown in Fig. 5 to Fig. 5G. Fig. 6A shows a schematic view of an ellipsometer. A schematic diagram showing the steps of a laser forming channel to 6 inches. Figure 6C shows a schematic view of a device for forming a laser. [Description of main component symbols] 11: growth substrate; (1): thinned substrate; 201131837 112: semiconductor buffer layer; 121: first conductive type semiconductor layer; 123: second conductive type semiconductor layer; 141, 241a, 241b, 341: Intermediate layer; 15, 25: first wire pad; 17, 37a, 37b: first channel; 191: adhesive layer; 28a, 28b, 28c, 47: conductive channel; 49: current dispersion layer; 62: second material layer 64: laser receiver; S1: upper surface; W: pulse time width; 12: semiconductor light emitting structure; 122: active layer; 13: carrier; 142, 242a, 242b: reflective layer; 16, 26, 26a: Two wire pads; 181: second channel; 19: support; 48: ohmic contact layer; 61: first material layer; 63, 66: laser; 65: data operation processor; S2: lower surface; tpulse: pulse cycle.
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