TW200732919A - Method for improving flexibility of direct memory access channels - Google Patents

Method for improving flexibility of direct memory access channels

Info

Publication number
TW200732919A
TW200732919A TW095137344A TW95137344A TW200732919A TW 200732919 A TW200732919 A TW 200732919A TW 095137344 A TW095137344 A TW 095137344A TW 95137344 A TW95137344 A TW 95137344A TW 200732919 A TW200732919 A TW 200732919A
Authority
TW
Taiwan
Prior art keywords
priority
network switch
packet
users
memory access
Prior art date
Application number
TW095137344A
Other languages
English (en)
Other versions
TWI326829B (en
Inventor
Kuo-Ching Chen
Tai-Cheng Chen
Mike Duh
Li-Hsiang Wang
Original Assignee
Via Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Via Tech Inc filed Critical Via Tech Inc
Publication of TW200732919A publication Critical patent/TW200732919A/zh
Application granted granted Critical
Publication of TWI326829B publication Critical patent/TWI326829B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
TW095137344A 2006-02-24 2006-10-11 Method for improving flexibility of direct memory access channels TWI326829B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/361,737 US7689732B2 (en) 2006-02-24 2006-02-24 Method for improving flexibility of arbitration of direct memory access (DMA) engines requesting access to shared DMA channels

Publications (2)

Publication Number Publication Date
TW200732919A true TW200732919A (en) 2007-09-01
TWI326829B TWI326829B (en) 2010-07-01

Family

ID=38251369

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095137344A TWI326829B (en) 2006-02-24 2006-10-11 Method for improving flexibility of direct memory access channels

Country Status (3)

Country Link
US (1) US7689732B2 (zh)
CN (1) CN100442258C (zh)
TW (1) TWI326829B (zh)

Families Citing this family (16)

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Publication number Priority date Publication date Assignee Title
JP2008210280A (ja) * 2007-02-27 2008-09-11 Fujitsu Ltd 半導体装置及びｄｍａコントローラ
US8325633B2 (en) * 2007-04-26 2012-12-04 International Business Machines Corporation Remote direct memory access
US8417842B2 (en) * 2008-05-16 2013-04-09 Freescale Semiconductor Inc. Virtual direct memory access (DMA) channel technique with multiple engines for DMA controller
JP5173707B2 (ja) * 2008-09-26 2013-04-03 キヤノン株式会社 情報処理装置、及びその制御方法
KR101202738B1 (ko) * 2008-12-22 2012-11-20 한국전자통신연구원 멀티 채널 데이터 전송 장치
US8767757B1 (en) * 2012-02-15 2014-07-01 Applied Micro Circuits Corporation Packet forwarding system and method using patricia trie configured hardware
US9128925B2 (en) * 2012-04-24 2015-09-08 Freescale Semiconductor, Inc. System and method for direct memory access buffer utilization by setting DMA controller with plurality of arbitration weights associated with different DMA engines
US8732352B1 (en) * 2013-01-25 2014-05-20 Apple Inc. Dynamic allocation of buffers for direct memory access
US20140281099A1 (en) * 2013-03-14 2014-09-18 Broadcom Corporation METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONTROLLING FLOW OF PCIe TRANSPORT LAYER PACKETS
CN103714027B (zh) * 2014-01-10 2016-04-20 浪潮(北京)电子信息产业有限公司 一种直接内存存取控制器的数据传输方法及装置
US9558528B2 (en) * 2015-03-25 2017-01-31 Xilinx, Inc. Adaptive video direct memory access module
US10374805B2 (en) * 2015-07-20 2019-08-06 Intel Corporation Technologies for trusted I/O for multiple co-existing trusted execution environments under ISA control
JP6900691B2 (ja) * 2017-02-07 2021-07-07 オムロン株式会社 制御装置および通信装置
CN111101763B (zh) * 2018-10-26 2021-02-19 珠海格力电器股份有限公司 一种电机驱动电路、控制方法、驱动芯片
JP7192427B2 (ja) * 2018-11-19 2022-12-20 オムロン株式会社 制御システムおよび制御装置
US20230185745A1 (en) * 2021-12-13 2023-06-15 Cryptography Research, Inc. Data flow control module for autonomous flow control of multiple dma engines

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3241376A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Dma-steuereinrichtung zur uebertragung von daten zwischen einem datensender und einem datenempfaenger
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
US5251312A (en) * 1991-12-30 1993-10-05 Sun Microsystems, Inc. Method and apparatus for the prevention of race conditions during dynamic chaining operations
US5561820A (en) * 1994-11-30 1996-10-01 International Business Machines Corporation Bridge for interfacing buses in computer system with a direct memory access controller having dynamically configurable direct memory access channels
US5781799A (en) * 1995-09-29 1998-07-14 Cirrus Logic, Inc. DMA controller arrangement having plurality of DMA controllers and buffer pool having plurality of buffers accessible to each of the channels of the controllers
US5774680A (en) * 1995-12-11 1998-06-30 Compaq Computer Corporation Interfacing direct memory access devices to a non-ISA bus
US6425021B1 (en) * 1998-11-16 2002-07-23 Lsi Logic Corporation System for transferring data packets of different context utilizing single interface and concurrently processing data packets of different contexts
JP2002175265A (ja) * 2000-09-27 2002-06-21 Texas Instruments Inc 直接メモリ・アクセス・コントローラを有するディジタル信号プロセッサにおける複数の構成素子間での信号***換装置および方法
US7062591B2 (en) * 2001-09-28 2006-06-13 Dot Hill Systems Corp. Controller data sharing using a modular DMA architecture

Also Published As

Publication number Publication date
US20070204073A1 (en) 2007-08-30
TWI326829B (en) 2010-07-01
CN100442258C (zh) 2008-12-10
US7689732B2 (en) 2010-03-30
CN1996272A (zh) 2007-07-11

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