TW200501301A - Wafer level package and fabrication process thereof - Google Patents

Wafer level package and fabrication process thereof

Info

Publication number
TW200501301A
TW200501301A TW092117889A TW92117889A TW200501301A TW 200501301 A TW200501301 A TW 200501301A TW 092117889 A TW092117889 A TW 092117889A TW 92117889 A TW92117889 A TW 92117889A TW 200501301 A TW200501301 A TW 200501301A
Authority
TW
Taiwan
Prior art keywords
wafer
layer
solder
solder bump
fabrication process
Prior art date
Application number
TW092117889A
Other languages
English (en)
Other versions
TWI231555B (en
Inventor
Yao-Shin Fang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW092117889A priority Critical patent/TWI231555B/zh
Priority to US10/874,238 priority patent/US7122459B2/en
Publication of TW200501301A publication Critical patent/TW200501301A/zh
Application granted granted Critical
Publication of TWI231555B publication Critical patent/TWI231555B/zh
Priority to US11/508,896 priority patent/US20060286791A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
TW092117889A 2003-06-30 2003-06-30 Wafer level package and fabrication process thereof TWI231555B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW092117889A TWI231555B (en) 2003-06-30 2003-06-30 Wafer level package and fabrication process thereof
US10/874,238 US7122459B2 (en) 2003-06-30 2004-06-24 Semiconductor wafer package and manufacturing method thereof
US11/508,896 US20060286791A1 (en) 2003-06-30 2006-08-24 Semiconductor wafer package and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW092117889A TWI231555B (en) 2003-06-30 2003-06-30 Wafer level package and fabrication process thereof

Publications (2)

Publication Number Publication Date
TW200501301A true TW200501301A (en) 2005-01-01
TWI231555B TWI231555B (en) 2005-04-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW092117889A TWI231555B (en) 2003-06-30 2003-06-30 Wafer level package and fabrication process thereof

Country Status (2)

Country Link
US (2) US7122459B2 (zh)
TW (1) TWI231555B (zh)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4379284B2 (ja) * 2004-09-29 2009-12-09 株式会社日立製作所 電子装置
FR2888986B1 (fr) * 2005-07-25 2007-09-21 St Microelectronics Sa Realisation de bossage conducteur pour circuit integre
CN100359679C (zh) * 2005-09-27 2008-01-02 天津工业大学 倒装焊接结构及制作方法
JP4980709B2 (ja) * 2006-12-25 2012-07-18 ローム株式会社 半導体装置
TWI419242B (zh) * 2007-02-05 2013-12-11 Chipmos Technologies Inc 具有加強物的凸塊結構及其製造方法
US20080308932A1 (en) * 2007-06-12 2008-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package structures
US20090096093A1 (en) * 2007-10-15 2009-04-16 Advanced Chip Engineering Technology Inc. Inter-connecting structure for semiconductor package and method of the same
US20090096098A1 (en) * 2007-10-15 2009-04-16 Advanced Chip Engineering Technology Inc. Inter-connecting structure for semiconductor package and method of the same
JP4865913B2 (ja) * 2009-02-04 2012-02-01 パナソニック株式会社 半導体基板構造及び半導体装置
US8169076B2 (en) * 2009-06-16 2012-05-01 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structures having lead-free solder bumps
KR20110124993A (ko) * 2010-05-12 2011-11-18 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지 및 반도체 칩의 제조 방법
US8338286B2 (en) * 2010-10-05 2012-12-25 International Business Machines Corporation Dimensionally decoupled ball limiting metalurgy
US9978656B2 (en) * 2011-11-22 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming fine-pitch copper bump structures
US10015888B2 (en) 2013-02-15 2018-07-03 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect joint protective layer apparatus and method
US9368398B2 (en) 2012-01-12 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of fabricating same
US9263839B2 (en) 2012-12-28 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an improved fine pitch joint
US9401308B2 (en) 2013-03-12 2016-07-26 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging devices, methods of manufacture thereof, and packaging methods
US9437564B2 (en) 2013-07-09 2016-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of fabricating same
US9257333B2 (en) 2013-03-11 2016-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming same
US9589862B2 (en) 2013-03-11 2017-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming same
US9607921B2 (en) 2012-01-12 2017-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package interconnect structure
US8969197B2 (en) * 2012-05-18 2015-03-03 International Business Machines Corporation Copper interconnect structure and its formation
US9082776B2 (en) 2012-08-24 2015-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package having protective layer with curved surface and method of manufacturing same
US10163828B2 (en) * 2013-11-18 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and fabricating method thereof
US9711474B2 (en) * 2014-09-24 2017-07-18 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor package structure with polymeric layer and manufacturing method thereof
US9892962B2 (en) 2015-11-30 2018-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer level chip scale package interconnects and methods of manufacture thereof
US10872850B2 (en) * 2017-03-30 2020-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method of forming thereof

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2861965B2 (ja) * 1996-09-20 1999-02-24 日本電気株式会社 突起電極の形成方法
KR100269540B1 (ko) * 1998-08-28 2000-10-16 윤종용 웨이퍼 상태에서의 칩 스케일 패키지 제조 방법
JP2000311921A (ja) * 1999-04-27 2000-11-07 Sony Corp 半導体装置およびその製造方法
US6118179A (en) * 1999-08-27 2000-09-12 Micron Technology, Inc. Semiconductor component with external contact polymer support member and method of fabrication
US6569753B1 (en) * 2000-06-08 2003-05-27 Micron Technology, Inc. Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same
US6506671B1 (en) * 2000-06-08 2003-01-14 Micron Technology, Inc. Ring positionable about a periphery of a contact pad, semiconductor device components including same, and methods for positioning the ring around a contact pad
US6578755B1 (en) * 2000-09-22 2003-06-17 Flip Chip Technologies, L.L.C. Polymer collar for solder bumps
US6854633B1 (en) * 2002-02-05 2005-02-15 Micron Technology, Inc. System with polymer masking flux for fabricating external contacts on semiconductor components
US6885101B2 (en) * 2002-08-29 2005-04-26 Micron Technology, Inc. Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
US20050082670A1 (en) * 2003-09-11 2005-04-21 Nordson Corporation Method for preapplying a viscous material to strengthen solder connections in microelectronic packaging and microelectronic packages formed thereby
TWI237370B (en) * 2004-07-30 2005-08-01 Advanced Semiconductor Eng Chip package structure and process for fabricating the same
KR100630698B1 (ko) * 2004-08-17 2006-10-02 삼성전자주식회사 솔더볼 접착 신뢰도를 높이는 반도체 패키지 및 그 제조방법

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US20040266162A1 (en) 2004-12-30
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US20060286791A1 (en) 2006-12-21

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