KR870004367A - 데이터 처리 시스템 - Google Patents
데이터 처리 시스템 Download PDFInfo
- Publication number
- KR870004367A KR870004367A KR1019860008772A KR860008772A KR870004367A KR 870004367 A KR870004367 A KR 870004367A KR 1019860008772 A KR1019860008772 A KR 1019860008772A KR 860008772 A KR860008772 A KR 860008772A KR 870004367 A KR870004367 A KR 870004367A
- Authority
- KR
- South Korea
- Prior art keywords
- register
- data processing
- register group
- registers
- instruction
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30138—Extension of register space, e.g. register cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/461—Saving or restoring of program or task context
- G06F9/462—Saving or restoring of program or task context with multiple register sets
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/461—Saving or restoring of program or task context
- G06F9/463—Program control block organisation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는, 제4도에 있어서의 레지스터 뱅크의 구성예를 도시한 설명도.
제6도는 본 발명에 관한 레지스터 셋트 절체명령을 실행 가능하게 하는 마이크로 프로셋서의 구성예를 도시한 블럭도.
제7도는 종래의 마이크로 프로셋서에 있어서의 레지스터 셋트 절체방식을 도시한 설명도.
Claims (5)
- 데이터 처리 시스템은,명령에 따라서 여러개의 레지스터군중의 어떠한 레지스터군을 지정하여, 소정의 데이터 처리를 행하는 데이터 처리 기능을 갖고 있으며,상기 명령은 1개의 레지스터군에서 다른 레지스터군으로의 절체를 지정하는 정보와, 상기 1개의 레지스터군내의 1 또는 2이상의 레지스터를 지정하는 정보를 포함한다.
- 특허 청구의 범위 제1항의 데이터 처리 시스템에 있어서,상기 명령은 또, 상기 1 또는 2이상의 레지스터의 내용을, 상기 다른 레지스터군내의 레지스터로 옮기는 것을 지시하는 정보를 포함한다.
- 특허 청구의 범위 제2항의 데이터 처리 시스템에 있어서,상기 명령은 또 상기 다른 레지스터군내의 바라는 레지스터를 지정하는 정보를 포함한다.
- 데이터 처리 시스템은,여러개의 레지스터군을 가지며 프로그램에 따라서 어떠한 1개의 레지스터군을 사용하여 1연의 처리를 실행하도록 되어 있으며,상기 레지스터군내의 레지스터를 지정 가능한 레지스터 지정 필드를 가지며, 1개의 레지스터군에서 다른 레지스터 군내의 절체를 지시하는 명령이 마련되어 있다.
- 특허 청구의 범위 제4항의 데이터 처리 시스템에 있어서,상기 레지스터 지정 필드는 상기 레지스터군내의 레지스터수와 같은 비트수를 가지며, 비트대응으로 레지스터를 지정할 수 있도록 되어 있다.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60-237358 | 1985-10-25 | ||
JP60237358A JPS6298434A (ja) | 1985-10-25 | 1985-10-25 | デ−タ処理システム |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870004367A true KR870004367A (ko) | 1987-05-09 |
KR940009095B1 KR940009095B1 (ko) | 1994-09-29 |
Family
ID=17014208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860008772A KR940009095B1 (ko) | 1985-10-25 | 1986-10-20 | 데이터 처리시스템 |
Country Status (7)
Country | Link |
---|---|
US (1) | US4833640A (ko) |
EP (1) | EP0220682B1 (ko) |
JP (1) | JPS6298434A (ko) |
KR (1) | KR940009095B1 (ko) |
DE (1) | DE3688232T2 (ko) |
HK (1) | HK28296A (ko) |
SG (1) | SG59875G (ko) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2545789B2 (ja) * | 1986-04-14 | 1996-10-23 | 株式会社日立製作所 | 情報処理装置 |
JPS6355636A (ja) * | 1986-08-27 | 1988-03-10 | Hitachi Ltd | デ−タ処理システム |
JPH0648461B2 (ja) * | 1987-07-09 | 1994-06-22 | 日本電気株式会社 | マイクロプログラムの転送レジスタ指定方式 |
US5142677A (en) * | 1989-05-04 | 1992-08-25 | Texas Instruments Incorporated | Context switching devices, systems and methods |
JP2633263B2 (ja) * | 1987-09-14 | 1997-07-23 | 株式会社ハドソン | データ転送制御装置 |
EP0314079B1 (de) * | 1987-10-27 | 1992-05-06 | Siemens Nixdorf Informationssysteme Aktiengesellschaft | Schaltungsanordnung für Verarbeitungseinheiten einer Zentraleinheit mit einer Reihe von Mehrzweckregistern |
JP3034873B2 (ja) * | 1988-07-01 | 2000-04-17 | 株式会社日立製作所 | 情報処理装置 |
US5083263A (en) * | 1988-07-28 | 1992-01-21 | Sun Microsystems, Inc. | BISC with interconnected register ring and selectively operating portion of the ring as a conventional computer |
JP2655191B2 (ja) * | 1989-07-05 | 1997-09-17 | 三菱電機株式会社 | 演算処理装置 |
JP2669158B2 (ja) * | 1991-01-22 | 1997-10-27 | 三菱電機株式会社 | データ処理装置 |
JPH0527970A (ja) * | 1991-07-18 | 1993-02-05 | Seikosha Co Ltd | 演算装置 |
US5438669A (en) * | 1991-11-20 | 1995-08-01 | Hitachi, Ltd. | Data processor with improved loop handling utilizing improved register allocation |
US5640582A (en) * | 1992-05-21 | 1997-06-17 | Intel Corporation | Register stacking in a computer system |
US5497493A (en) * | 1993-09-30 | 1996-03-05 | Intel Corporation | High byte right-shift apparatus with a register alias table |
GB2286265B (en) * | 1994-01-26 | 1998-02-18 | Advanced Risc Mach Ltd | selectable processing registers |
JPH1091432A (ja) * | 1996-09-13 | 1998-04-10 | Sanyo Electric Co Ltd | プログラム実行方法およびプログラム実行装置 |
US6012138A (en) * | 1997-12-19 | 2000-01-04 | Lsi Logic Corporation | Dynamically variable length CPU pipeline for efficiently executing two instruction sets |
DE19827914C1 (de) * | 1998-06-23 | 1999-10-28 | Siemens Ag | Anwendungsspezifischer integrierter Schaltkreis mit einem RISC-Prozessor zur Bearbeitung definierter Sequenzen von Assembler Befehlen |
EP1050799A1 (en) * | 1999-05-03 | 2000-11-08 | STMicroelectronics S.A. | Execution of a computer program |
US6633969B1 (en) | 2000-08-11 | 2003-10-14 | Lsi Logic Corporation | Instruction translation system and method achieving single-cycle translation of variable-length MIPS16 instructions |
US6826681B2 (en) * | 2001-06-18 | 2004-11-30 | Mips Technologies, Inc. | Instruction specified register value saving in allocated caller stack or not yet allocated callee stack |
US8793426B2 (en) * | 2009-02-11 | 2014-07-29 | Microchip Technology Incorporated | Microcontroller with linear memory access in a banked memory |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3373408A (en) * | 1965-04-16 | 1968-03-12 | Rca Corp | Computer capable of switching between programs without storage and retrieval of the contents of operation registers |
US4530047A (en) * | 1980-12-15 | 1985-07-16 | Texas Instruments Incorporated | Dual registry digital processor system with external memory interface |
US4532587A (en) * | 1981-08-26 | 1985-07-30 | Texas Instruments Incorporated | Single chip processor connected to an external memory chip |
JPS58137047A (ja) * | 1982-02-09 | 1983-08-15 | Toshiba Corp | コンピユ−タの省略命令制御装置 |
JPS58142464A (ja) * | 1982-02-19 | 1983-08-24 | Hitachi Ltd | マイクロプロセツサ |
US4589065A (en) * | 1983-06-30 | 1986-05-13 | International Business Machines Corporation | Mechanism for implementing one machine cycle executable trap instructions in a primitive instruction set computing system |
JPS6140650A (ja) * | 1984-08-02 | 1986-02-26 | Nec Corp | マイクロコンピユ−タ |
-
1985
- 1985-10-25 JP JP60237358A patent/JPS6298434A/ja active Pending
-
1986
- 1986-10-20 KR KR1019860008772A patent/KR940009095B1/ko not_active IP Right Cessation
- 1986-10-23 SG SG1995905428A patent/SG59875G/en unknown
- 1986-10-23 DE DE8686114722T patent/DE3688232T2/de not_active Expired - Fee Related
- 1986-10-23 EP EP86114722A patent/EP0220682B1/en not_active Expired - Lifetime
- 1986-10-24 US US06/922,672 patent/US4833640A/en not_active Expired - Fee Related
-
1996
- 1996-02-15 HK HK28296A patent/HK28296A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
DE3688232T2 (de) | 1993-09-09 |
DE3688232D1 (de) | 1993-05-13 |
US4833640A (en) | 1989-05-23 |
HK28296A (en) | 1996-02-23 |
JPS6298434A (ja) | 1987-05-07 |
EP0220682A3 (en) | 1988-04-20 |
KR940009095B1 (ko) | 1994-09-29 |
EP0220682B1 (en) | 1993-04-07 |
EP0220682A2 (en) | 1987-05-06 |
SG59875G (en) | 1995-09-01 |
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G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |