KR20000075883A - 집적 회로 칩과 코일을 동시 실장시킨 집적 회로 패키지 및 그 제조 방법 - Google Patents
집적 회로 칩과 코일을 동시 실장시킨 집적 회로 패키지 및 그 제조 방법 Download PDFInfo
- Publication number
- KR20000075883A KR20000075883A KR1019997007962A KR19997007962A KR20000075883A KR 20000075883 A KR20000075883 A KR 20000075883A KR 1019997007962 A KR1019997007962 A KR 1019997007962A KR 19997007962 A KR19997007962 A KR 19997007962A KR 20000075883 A KR20000075883 A KR 20000075883A
- Authority
- KR
- South Korea
- Prior art keywords
- package
- coil
- chip
- substrate layer
- lead
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 230000002093 peripheral effect Effects 0.000 claims abstract description 5
- 239000004020 conductor Substances 0.000 claims description 15
- 229920000742 Cotton Polymers 0.000 claims 1
- 239000010410 layer Substances 0.000 description 44
- ZGHQUYZPMWMLBM-UHFFFAOYSA-N 1,2-dichloro-4-phenylbenzene Chemical compound C1=C(Cl)C(Cl)=CC=C1C1=CC=CC=C1 ZGHQUYZPMWMLBM-UHFFFAOYSA-N 0.000 description 14
- 238000005538 encapsulation Methods 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000005670 electromagnetic radiation Effects 0.000 description 3
- 238000007373 indentation Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012552 review Methods 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000004870 electrical engineering Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US506098A | 1998-01-09 | 1998-01-09 | |
US9/005,060 | 1998-01-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20000075883A true KR20000075883A (ko) | 2000-12-26 |
Family
ID=21713950
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019997007962A KR20000075883A (ko) | 1998-01-09 | 1999-01-08 | 집적 회로 칩과 코일을 동시 실장시킨 집적 회로 패키지 및 그 제조 방법 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2001515661A (fr) |
KR (1) | KR20000075883A (fr) |
WO (1) | WO1999035691A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101038490B1 (ko) * | 2004-02-23 | 2011-06-01 | 삼성테크윈 주식회사 | Rfid용 안테나 내장형 반도체 패키지 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2796760B1 (fr) * | 1999-07-23 | 2002-02-01 | Gemplus Card Int | Etiquette electronique et procede pour sa fabrication |
JP4012733B2 (ja) | 1999-09-20 | 2007-11-21 | フラクトゥス・ソシエダッド・アノニマ | マルチレベルアンテナ |
US6424263B1 (en) * | 2000-12-01 | 2002-07-23 | Microchip Technology Incorporated | Radio frequency identification tag on a single layer substrate |
EP1563570A1 (fr) | 2002-11-07 | 2005-08-17 | Fractus, S.A. | Boitier de circuit integre incluant une antenne miniature |
EP1562272B1 (fr) * | 2004-01-14 | 2016-09-07 | Dehn + Söhne Gmbh + Co. Kg | Ensemble pour le contrôle et l'enregistrement de l'état d'un dispositif de protection contre les surtensions, en particulier pour installation dans des réseaux à basse tension ou systèmes d'information. |
EP1771919A1 (fr) | 2004-07-23 | 2007-04-11 | Fractus, S.A. | Antenne dans un boitier a interaction electromagnetique reduite avec des elements integres sur la puce |
WO2006059732A1 (fr) | 2004-12-03 | 2006-06-08 | Hallys Corporation | Dispositif de collage d’élément d’interposition |
EP1876877B1 (fr) | 2005-04-06 | 2010-08-25 | Hallys Corporation | Appareil de fabrication de composant electronique |
KR100746635B1 (ko) | 2006-03-21 | 2007-08-06 | 삼성전기주식회사 | Rfid 시스템의 태그 및 그 제조 방법 |
US9818694B2 (en) * | 2015-11-16 | 2017-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Active atomic reservoir for enhancing electromigration reliability in integrated circuits |
US10950540B2 (en) | 2015-11-16 | 2021-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Enhancing integrated circuit density with active atomic reservoir |
US9929087B2 (en) | 2015-11-16 | 2018-03-27 | Taiwan Semiconductor Manufacturing Co., Ltd | Enhancing integrated circuit density with active atomic reservoir |
CN110010509B (zh) * | 2018-01-05 | 2023-10-20 | 光宝新加坡有限公司 | 双引线架磁耦合封装结构及其制造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04325293A (ja) * | 1991-04-25 | 1992-11-13 | Mitsubishi Electric Corp | 非接触icカード |
JP3305843B2 (ja) * | 1993-12-20 | 2002-07-24 | 株式会社東芝 | 半導体装置 |
FR2721733B1 (fr) * | 1994-06-22 | 1996-08-23 | Gemplus Card Int | Procédé de fabrication d'une carte sans contact par surmoulage et carte sans contact obtenue par un tel procédé. |
KR100355209B1 (ko) * | 1994-09-22 | 2003-02-11 | 로무 가부시키가이샤 | 비접촉형ic카드및그제조방법 |
JPH091970A (ja) * | 1995-06-20 | 1997-01-07 | Hitachi Chem Co Ltd | Icカード及びその製造法 |
FR2743649B1 (fr) * | 1996-01-17 | 1998-04-03 | Gemplus Card Int | Module electronique sans contact, carte etiquette electronique l'incorporant, et leurs procedes de fabrication |
-
1999
- 1999-01-08 JP JP53642299A patent/JP2001515661A/ja active Pending
- 1999-01-08 KR KR1019997007962A patent/KR20000075883A/ko not_active Application Discontinuation
- 1999-01-08 WO PCT/US1999/000438 patent/WO1999035691A1/fr not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101038490B1 (ko) * | 2004-02-23 | 2011-06-01 | 삼성테크윈 주식회사 | Rfid용 안테나 내장형 반도체 패키지 |
Also Published As
Publication number | Publication date |
---|---|
WO1999035691A1 (fr) | 1999-07-15 |
JP2001515661A (ja) | 2001-09-18 |
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Legal Events
Date | Code | Title | Description |
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WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |