KR100769205B1 - 반도체 소자의 제조방법 - Google Patents
반도체 소자의 제조방법 Download PDFInfo
- Publication number
- KR100769205B1 KR100769205B1 KR1020010087095A KR20010087095A KR100769205B1 KR 100769205 B1 KR100769205 B1 KR 100769205B1 KR 1020010087095 A KR1020010087095 A KR 1020010087095A KR 20010087095 A KR20010087095 A KR 20010087095A KR 100769205 B1 KR100769205 B1 KR 100769205B1
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- Prior art keywords
- insulating film
- forming
- film
- void
- semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (3)
- 절연 기판상에 복수개의 금속 배선을 형성하는 단계;상기 금속 배선간 공간의 저부에서 진공의 제 1 보이드를 갖는 제 1 절연막을 형성하는 단계;상기 제 1 절연막상에 상기 금속 배선의 상면보다 낮은 위치의 금속 배선간 공간에 진공의 제 2 보이드를 갖는 제 2 절연막을 형성하는 단계;상기 제 2 절연막상에 캡핑막을 형성하는 단계를 포함하여 형성함을 특징으로 하는 반도체 소자의 제조방법.
- 제 1항에 있어서, 상기 제 1, 2 절연막은 FSG(Fluorinate Silica Glass)막으로, 수 mTorr에서 HDP CVD(High Density Plasma Chemical Vapor Deposition) 공정을 통해 형성함을 특징으로 하는 반도체 소자의 제조방법.
- 제 1항에 있어서, 상기 캡핑막은 상기 제 2 절연막과 동일 증착 장비를 이용한 인-시튜(In-situ) 공정으로 형성함을 특징으로 하는 반도체 소자의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010087095A KR100769205B1 (ko) | 2001-12-28 | 2001-12-28 | 반도체 소자의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010087095A KR100769205B1 (ko) | 2001-12-28 | 2001-12-28 | 반도체 소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR20030056796A KR20030056796A (ko) | 2003-07-04 |
KR100769205B1 true KR100769205B1 (ko) | 2007-10-23 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020010087095A KR100769205B1 (ko) | 2001-12-28 | 2001-12-28 | 반도체 소자의 제조방법 |
Country Status (1)
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KR (1) | KR100769205B1 (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100922551B1 (ko) * | 2007-12-26 | 2009-10-21 | 주식회사 동부하이텍 | 반도체 소자 및 그 제조방법 |
KR102092863B1 (ko) | 2013-12-30 | 2020-03-24 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990004683A (ko) * | 1997-06-28 | 1999-01-25 | 김영환 | 반도체 소자의 금속배선 층간 절연막 형성방법 |
KR19990062465A (ko) * | 1997-12-31 | 1999-07-26 | 구본준 | 반도체 소자의 배선 구조 및 형성 방법 |
KR19990061043A (ko) * | 1997-12-31 | 1999-07-26 | 김영환 | 반도체 소자의 금속배선 형성방법 |
US6080649A (en) * | 1996-01-08 | 2000-06-27 | Siemens Aktiengesellschaft | Fusible link in an integrated semiconductor circuit and process for producing the fusible link |
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2001
- 2001-12-28 KR KR1020010087095A patent/KR100769205B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6080649A (en) * | 1996-01-08 | 2000-06-27 | Siemens Aktiengesellschaft | Fusible link in an integrated semiconductor circuit and process for producing the fusible link |
KR19990004683A (ko) * | 1997-06-28 | 1999-01-25 | 김영환 | 반도체 소자의 금속배선 층간 절연막 형성방법 |
KR19990062465A (ko) * | 1997-12-31 | 1999-07-26 | 구본준 | 반도체 소자의 배선 구조 및 형성 방법 |
KR19990061043A (ko) * | 1997-12-31 | 1999-07-26 | 김영환 | 반도체 소자의 금속배선 형성방법 |
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KR20030056796A (ko) | 2003-07-04 |
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