JPWO2012124786A1 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JPWO2012124786A1 JPWO2012124786A1 JP2013504780A JP2013504780A JPWO2012124786A1 JP WO2012124786 A1 JPWO2012124786 A1 JP WO2012124786A1 JP 2013504780 A JP2013504780 A JP 2013504780A JP 2013504780 A JP2013504780 A JP 2013504780A JP WO2012124786 A1 JPWO2012124786 A1 JP WO2012124786A1
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- semiconductor device
- breakdown voltage
- vertical trench
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 239
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 230000015556 catabolic process Effects 0.000 claims abstract description 161
- 238000009792 diffusion process Methods 0.000 claims abstract description 112
- 239000000758 substrate Substances 0.000 claims description 67
- 239000012535 impurity Substances 0.000 claims description 48
- 238000000034 method Methods 0.000 claims description 21
- 238000002955 isolation Methods 0.000 claims description 15
- 239000010410 layer Substances 0.000 description 46
- 230000005684 electric field Effects 0.000 description 28
- 230000001681 protective effect Effects 0.000 description 22
- 230000004048 modification Effects 0.000 description 16
- 238000012986 modification Methods 0.000 description 16
- 239000002131 composite material Substances 0.000 description 14
- 239000011229 interlayer Substances 0.000 description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 14
- 229920005591 polysilicon Polymers 0.000 description 14
- 230000008569 process Effects 0.000 description 14
- 230000000694 effects Effects 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000009826 distribution Methods 0.000 description 6
- 238000005468 ion implantation Methods 0.000 description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 230000006872 improvement Effects 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000007480 spreading Effects 0.000 description 4
- 238000003892 spreading Methods 0.000 description 4
- 239000002344 surface layer Substances 0.000 description 4
- 230000009467 reduction Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 230000000779 depleting effect Effects 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000002040 relaxant effect Effects 0.000 description 2
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
図1は、本発明の半導体装置の実施の形態1にかかる縦型トレンチゲート型パワーICの要部断面図である。図1においては、本発明の複合半導体装置の実施の形態1として、縦型トレンチゲート型パワーIC100の要部断面図を示す。
図8は、本発明の半導体装置の実施の形態2にかかる縦型トレンチゲート型パワーICの変形例を示す要部断面図である。実施の形態2は、実施の形態1の変形例であり、実施の形態1との相違点は、外部からの電荷が耐圧に与える影響を抑える工夫として、図8に示すように、p型サステイン領域50とp-型拡散領域4bが重なる領域を増やしたことである。
図9は、本発明の半導体装置の実施の形態3にかかる縦型トレンチゲート型パワーICの変形例を示す要部断面図である。実施の形態3は実施例2の変形例であり、実施の形態2との相違点は、外部からの電荷が耐圧に与える影響を抑える工夫として、図9に示すように、p型サステイン領域50の表面に、p+型コンタクト領域10を追加で形成したことである。このようにすれば、活性領域の端部のトレンチからLOCOS酸化膜11cまでの区間におけるp型領域の表面濃度を、より一層増加させることができるので、耐圧に対する外部からの電荷の影響を防ぐことが可能となる。
図7は、本発明の半導体装置の実施の形態4にかかる縦型トレンチゲート型パワーICの変形例を示す平面図である。本発明の半導体装置の実施の形態4にかかる縦型トレンチゲート型パワーICは、縦型トレンチゲート型MOSFET素子部30を取り囲むように終端耐圧領域23が形成され、さらに半導体基板上に素子分離領域90としてのLOCOS酸化膜11aを介して、制御用の横型nチャネルMOSFET素子部22と併置されている。実施の形態1との相違点は、終端耐圧領域23は縦型トレンチゲート型MOSFET素子部30のみを取り囲むようにしていることである。制御用の横型nチャネルMOSFET素子部22の耐圧が、図2に示すような従来型の終端耐圧領域49で十分高い値を確保できる場合は、このように、縦型トレンチゲート型MOSFET素子部30のみ、終端耐圧領域23にて電界強度を緩和することも可能である。
図4に本発明の実施の形態5を示す。図4は前記図1の出力段半導体素子である縦型トレンチゲート型MOSFET素子部30のn+型基板2の裏面に、さらにp+型半導体層25(p+型コレクタ層)を追加することにより、出力段半導体素子を縦型トレンチゲート型IGBT24(絶縁ゲートバイポーラトランジスタ)としたものである。
2、32、52 n+型基板
3、33、53 n-型エピタキシャル層
4a、34 p-型ウェル拡散領域
4b、54 p-型拡散領域
5、35、55 p型ベース領域
50 p型サステイン領域
6a、6b、36、56 ゲート電極
7a、7b、37、57 ゲート酸化膜
8b、38b、58 n+型ソース領域
8a、38a n+型ドレイン領域
39 ベースコンタクト領域
9、10、60 p+型コンタクト領域
11a、11b、11c LOCOS酸化膜
41、61 LOCOS酸化膜
13、15、65 ソース電極
14 ベース電極
16、66 金属膜フィールドプレート
6c ポリシリコン膜フィールドプレート
17a、17b 層間絶縁膜
30 縦型トレンチゲート型MOSFET素子部
21、48、68 活性領域
22 制御用の横型nチャネルMOSFET素子部
23、49、69 終端耐圧領域
24 縦型トレンチゲート型IGBT
25 p+型半導体層
18、40 ウェル接合
19 主接合
70 p--型リサーフ領域
90 素子分離領域
100 縦型トレンチゲート型パワーIC
図1は、本発明の半導体装置の実施の形態1にかかる縦型トレンチゲート型パワーICの要部断面図である。図1においては、本発明の複合半導体装置の実施の形態1として、縦型トレンチゲート型パワーIC100の要部断面図を示す。
図8は、本発明の半導体装置の実施の形態2にかかる縦型トレンチゲート型パワーICの変形例を示す要部断面図である。実施の形態2は、実施の形態1の変形例であり、実施の形態1との相違点は、外部からの電荷が耐圧に与える影響を抑える工夫として、図8に示すように、p型サステイン領域50とp-型拡散領域4bが重なる領域を増やしたことである。
図9は、本発明の半導体装置の実施の形態3にかかる縦型トレンチゲート型パワーICの変形例を示す要部断面図である。実施の形態3は実施例2の変形例であり、実施の形態2との相違点は、外部からの電荷が耐圧に与える影響を抑える工夫として、図9に示すように、p型サステイン領域50の表面に、p+型コンタクト領域10を追加で形成したことである。このようにすれば、活性領域の端部のトレンチからLOCOS酸化膜11cまでの区間におけるp型領域の表面濃度を、より一層増加させることができるので、耐圧に対する外部からの電荷の影響を防ぐことが可能となる。
図7は、本発明の半導体装置の実施の形態4にかかる縦型トレンチゲート型パワーICの変形例を示す平面図である。本発明の半導体装置の実施の形態4にかかる縦型トレンチゲート型パワーICは、縦型トレンチゲート型MOSFET素子部30を取り囲むように終端耐圧領域23が形成され、さらに半導体基板上に素子分離領域90としてのLOCOS酸化膜11aを介して、制御用の横型nチャネルMOSFET素子部22と併置されている。実施の形態1との相違点は、終端耐圧領域23は縦型トレンチゲート型MOSFET素子部30のみを取り囲むようにしていることである。制御用の横型nチャネルMOSFET素子部22の耐圧が、図2に示すような従来型の終端耐圧領域49で十分高い値を確保できる場合は、このように、縦型トレンチゲート型MOSFET素子部30のみ、終端耐圧領域23にて電界強度を緩和することも可能である。
図4に本発明の実施の形態5を示す。図4は前記図1の出力段半導体素子である縦型トレンチゲート型MOSFET素子部30のn+型基板2の裏面に、さらにp+型半導体層25(p+型コレクタ層)を追加することにより、出力段半導体素子を縦型トレンチゲート型IGBT24(絶縁ゲートバイポーラトランジスタ)としたものである。
2、32、52 n+型基板
3、33、53 n-型エピタキシャル層
4a、34 p-型ウェル拡散領域
4b、54 p-型拡散領域
5、35、55 p型ベース領域
50 p型サステイン領域
6a、6b、36、56 ゲート電極
7a、7b、37、57 ゲート酸化膜
8b、38b、58 n+型ソース領域
8a、38a n+型ドレイン領域
39 ベースコンタクト領域
9、10、60 p+型コンタクト領域
11a、11b、11c LOCOS酸化膜
41、61 LOCOS酸化膜
13、15、65 ソース電極
14 ベース電極
16、66 金属膜フィールドプレート
6c ポリシリコン膜フィールドプレート
17a、17b 層間絶縁膜
30 縦型トレンチゲート型MOSFET素子部
21、48、68 活性領域
22 制御用の横型nチャネルMOSFET素子部
23、49、69 終端耐圧領域
24 縦型トレンチゲート型IGBT
25 p+型半導体層
18、40 ウェル接合
19 主接合
70 p--型リサーフ領域
90 素子分離領域
100 縦型トレンチゲート型パワーIC
Claims (5)
- 第1導電型の半導体基板の第一の主面側に形成された第1導電型の主ドレイン領域と、
前記半導体基板の第二の主面側の表面に選択的に形成された第2導電型のベース領域と、該ベース領域の表面に選択的に形成された第1導電型の主ソース領域と、前記ベース領域の表面から前記ベース領域と前記主ソース領域を貫通して前記半導体基板に到達するトレンチと、絶縁性の膜からなる第一絶縁膜を介して前記トレンチにゲート電極が埋め込まれたトレンチMOSゲートと、を有する縦型トレンチMOSゲート型半導体素子部と、
前記半導体基板の第二の主面側の表面に形成されて前記第一絶縁膜よりも厚い第二絶縁膜を備えた素子分離領域を介して前記縦型トレンチMOSゲート型半導体素子部に隣接し、前記半導体基板の第二の主面側の表面に前記半導体基板とpn接合を形成する第2導電型のウェル拡散領域を備え、該ウェル拡散領域の表面上に前記第二絶縁膜よりも厚さの薄い第三絶縁膜を介して形成された制御用ゲート電極を備え、前記ウェル拡散領域の表面にて前記制御用ゲート電極を挟むように第1導電型制御ドレイン領域と第1導電型制御ソース領域が設けられ、前記縦型トレンチMOSゲート型半導体素子部を制御する制御用半導体素子部と、
前記半導体基板の第二の主面側の表面に前記第二絶縁膜を備え、前記縦型トレンチMOSゲート型半導体素子部を取り巻くか、もしくは前記縦型トレンチMOSゲート型半導体素子部と前記制御用半導体素子部の両素子部を共通に取り巻く終端耐圧領域と、を備える半導体装置において、
前記終端耐圧領域が、前記第二絶縁膜と、前記縦型トレンチMOSゲート型半導体素子部の端部のトレンチに外接する第2導電型のサステイン領域と、該サステイン領域の外側に接して配置される第2導電型の第1領域と、を備え、
該第1領域は、前記ベース領域より接合深さが深くて低不純物濃度であり、
前記サステイン領域は、前記第1領域より接合深さが浅くて高不純物濃度であり、
前記ウェル拡散領域は、前記ベース領域および前記サステイン領域よりも接合深さが深くて低不純物濃度であり、
前記終端耐圧領域および前記ウェル拡散領域のアバランシェ耐圧が、前記縦型トレンチMOSゲート型半導体素子部のアバランシェ耐圧よりも高いことを特徴とする半導体装置。 - 前記終端耐圧領域が、前記第二の絶縁膜上に載置されるフィールドプレートを有することを特徴とする請求項1に記載の半導体装置。
- 前記縦型トレンチMOSゲート型半導体素子が、前記第一の主面側にて前記主ドレイン領域と接する第2導電型コレクタ層を備えたIGBTであることを特徴とする請求項1または2に記載の半導体装置。
- 請求項1に記載の半導体装置の製造方法であって、
前記半導体装置が備える第1領域を、当該半導体装置が備えるウェル拡散領域と同時に形成することを特徴とする半導体装置の製造方法。 - 前記半導体装置が備えるサステイン領域を、当該半導体装置が備えるベース領域と同時に形成することを特徴とする請求項4に記載の半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013504780A JP5641131B2 (ja) | 2011-03-17 | 2012-03-15 | 半導体装置およびその製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011058897 | 2011-03-17 | ||
JP2011058897 | 2011-03-17 | ||
JP2013504780A JP5641131B2 (ja) | 2011-03-17 | 2012-03-15 | 半導体装置およびその製造方法 |
PCT/JP2012/056777 WO2012124786A1 (ja) | 2011-03-17 | 2012-03-15 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2012124786A1 true JPWO2012124786A1 (ja) | 2014-07-24 |
JP5641131B2 JP5641131B2 (ja) | 2014-12-17 |
Family
ID=46830850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013504780A Active JP5641131B2 (ja) | 2011-03-17 | 2012-03-15 | 半導体装置およびその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US9209296B2 (ja) |
EP (1) | EP2688102A4 (ja) |
JP (1) | JP5641131B2 (ja) |
CN (1) | CN103329268B (ja) |
WO (1) | WO2012124786A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9799758B2 (en) * | 2014-07-31 | 2017-10-24 | Fuji Electric Co., Ltd. | Semiconductor device and semiconductor device manufacturing method |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103443927B (zh) * | 2011-03-18 | 2016-12-07 | 瑞萨电子株式会社 | 半导体装置及其制造方法 |
JP5510404B2 (ja) * | 2011-07-11 | 2014-06-04 | トヨタ自動車株式会社 | 半導体装置、及び、半導体装置の製造方法 |
JP6034150B2 (ja) * | 2012-11-16 | 2016-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP6164636B2 (ja) * | 2013-03-05 | 2017-07-19 | ローム株式会社 | 半導体装置 |
JP6164604B2 (ja) | 2013-03-05 | 2017-07-19 | ローム株式会社 | 半導体装置 |
US9461164B2 (en) * | 2013-09-16 | 2016-10-04 | Infineon Technologies Ag | Semiconductor device and method of manufacturing the same |
JP6245087B2 (ja) * | 2014-06-18 | 2017-12-13 | 富士電機株式会社 | 逆阻止igbtおよびその製造方法 |
US9972618B2 (en) * | 2014-12-17 | 2018-05-15 | Mitsubishi Electric Corporation | Semiconductor device |
JP6411929B2 (ja) * | 2015-03-24 | 2018-10-24 | トヨタ自動車株式会社 | Mosfet |
US20160303275A1 (en) * | 2015-04-14 | 2016-10-20 | The Procter & Gamble Company | Leuco dyes with hot melt binding matrix |
JP6560141B2 (ja) * | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP6560142B2 (ja) * | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP6726505B2 (ja) | 2016-03-31 | 2020-07-22 | ローム株式会社 | 半導体装置の製造方法 |
TWI636573B (zh) * | 2016-12-16 | 2018-09-21 | 通嘉科技股份有限公司 | 具有高壓啟動單元的垂直雙擴散金氧半功率元件 |
JP6809218B2 (ja) * | 2016-12-28 | 2021-01-06 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
CN108321188B (zh) * | 2017-01-18 | 2021-02-09 | 中芯国际集成电路制造(上海)有限公司 | 绝缘栅双极型晶体管及其形成方法 |
JP6972691B2 (ja) | 2017-06-19 | 2021-11-24 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
CN108538910B (zh) * | 2018-02-13 | 2020-08-14 | 株洲中车时代电气股份有限公司 | 具有复合栅的igbt芯片 |
JP7139683B2 (ja) | 2018-05-17 | 2022-09-21 | 富士電機株式会社 | 半導体集積回路及びその製造方法 |
US10741551B2 (en) * | 2018-12-28 | 2020-08-11 | General Electric Company | Integrated vertical and lateral semiconductor devices |
JP7279393B2 (ja) | 2019-02-15 | 2023-05-23 | 富士電機株式会社 | 半導体集積回路の製造方法 |
JP7118033B2 (ja) * | 2019-06-07 | 2022-08-15 | 三菱電機株式会社 | 半導体装置 |
CN112993034A (zh) * | 2019-12-18 | 2021-06-18 | 东南大学 | 横向双扩散金属氧化物半导体场效应管及其制造方法 |
JP7034214B2 (ja) * | 2020-06-29 | 2022-03-11 | ローム株式会社 | 半導体装置 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3216206B2 (ja) * | 1992-03-30 | 2001-10-09 | 株式会社デンソー | 半導体装置及びその製造方法 |
JP3161091B2 (ja) | 1992-10-30 | 2001-04-25 | 日本電気株式会社 | 半導体集積回路装置 |
JP3410286B2 (ja) | 1996-04-01 | 2003-05-26 | 三菱電機株式会社 | 絶縁ゲート型半導体装置 |
JP3525637B2 (ja) | 1996-08-09 | 2004-05-10 | 株式会社デンソー | 半導体装置 |
JP2000022140A (ja) | 1998-06-26 | 2000-01-21 | Nissan Motor Co Ltd | 半導体装置及びその製造方法 |
JP3413569B2 (ja) * | 1998-09-16 | 2003-06-03 | 株式会社日立製作所 | 絶縁ゲート型半導体装置およびその製造方法 |
JP4357753B2 (ja) | 2001-01-26 | 2009-11-04 | 株式会社東芝 | 高耐圧半導体装置 |
JP4097417B2 (ja) | 2001-10-26 | 2008-06-11 | 株式会社ルネサステクノロジ | 半導体装置 |
US6784505B2 (en) | 2002-05-03 | 2004-08-31 | Fairchild Semiconductor Corporation | Low voltage high density trench-gated power device with uniformly doped channel and its edge termination technique |
JP4740523B2 (ja) | 2003-01-27 | 2011-08-03 | ルネサスエレクトロニクス株式会社 | 絶縁ゲート型半導体装置 |
WO2006082617A1 (ja) | 2005-01-31 | 2006-08-10 | Shindengen Electric Manufacturing Co., Ltd. | 半導体装置 |
JP2008103529A (ja) | 2006-10-19 | 2008-05-01 | Toyota Central R&D Labs Inc | 半導体装置 |
JP2008130983A (ja) * | 2006-11-24 | 2008-06-05 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP2008227239A (ja) | 2007-03-14 | 2008-09-25 | Toyota Central R&D Labs Inc | 半導体装置 |
JP5223291B2 (ja) | 2007-10-24 | 2013-06-26 | 富士電機株式会社 | 半導体装置の製造方法 |
JP4964797B2 (ja) | 2008-02-12 | 2012-07-04 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN101931003A (zh) | 2009-11-27 | 2010-12-29 | 西安电力电子技术研究所 | 正反向对称p型径向变掺杂、类台面负角造型结终端晶闸管 |
US9293460B2 (en) * | 2012-08-24 | 2016-03-22 | Texas Instruments Incorporated | ESD protection device with improved bipolar gain using cutout in the body well |
-
2012
- 2012-03-15 US US13/980,046 patent/US9209296B2/en active Active
- 2012-03-15 CN CN201280005804.XA patent/CN103329268B/zh not_active Expired - Fee Related
- 2012-03-15 WO PCT/JP2012/056777 patent/WO2012124786A1/ja active Application Filing
- 2012-03-15 JP JP2013504780A patent/JP5641131B2/ja active Active
- 2012-03-15 EP EP12757869.8A patent/EP2688102A4/en not_active Ceased
-
2015
- 2015-10-21 US US14/919,084 patent/US9502496B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9799758B2 (en) * | 2014-07-31 | 2017-10-24 | Fuji Electric Co., Ltd. | Semiconductor device and semiconductor device manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
CN103329268B (zh) | 2016-06-29 |
EP2688102A4 (en) | 2014-09-03 |
JP5641131B2 (ja) | 2014-12-17 |
CN103329268A (zh) | 2013-09-25 |
US20140008718A1 (en) | 2014-01-09 |
US9209296B2 (en) | 2015-12-08 |
EP2688102A1 (en) | 2014-01-22 |
WO2012124786A1 (ja) | 2012-09-20 |
US9502496B2 (en) | 2016-11-22 |
US20160043166A1 (en) | 2016-02-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5641131B2 (ja) | 半導体装置およびその製造方法 | |
US8450800B2 (en) | Semiconductor device | |
JP6415749B2 (ja) | 炭化珪素半導体装置 | |
US8847309B2 (en) | Semiconductor device | |
EP2860762B1 (en) | High voltage junction field effect transistor | |
US9293548B2 (en) | Semiconductor device | |
JP2010056510A (ja) | 半導体装置 | |
JP5795452B1 (ja) | 炭化ケイ素半導体装置、炭化ケイ素半導体装置の製造方法及び炭化ケイ素半導体装置の設計方法 | |
JP2017152559A (ja) | 半導体装置および半導体装置の製造方法 | |
US8482066B2 (en) | Semiconductor device | |
JP2009164460A (ja) | 半導体装置 | |
JP2010258355A (ja) | 半導体装置及びその製造方法 | |
JP7090073B2 (ja) | 半導体装置 | |
KR20110078621A (ko) | 반도체 소자 및 그 제조 방법 | |
JP4952042B2 (ja) | 半導体装置 | |
JP2005136092A (ja) | 半導体装置とその製造方法 | |
CN103872052A (zh) | 半导体器件 | |
US10644145B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JP5309427B2 (ja) | 半導体装置 | |
TWI546961B (zh) | 高壓金氧半導體電晶體元件 | |
JP5309428B2 (ja) | 半導体装置 | |
JP2009277956A (ja) | 半導体装置 | |
KR101130019B1 (ko) | 전력용 반도체 디바이스 | |
JP2012134522A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140624 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140825 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140930 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20141013 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5641131 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |