JPS6392996A - Gas discharge panel driving circuit - Google Patents
Gas discharge panel driving circuitInfo
- Publication number
- JPS6392996A JPS6392996A JP61238728A JP23872886A JPS6392996A JP S6392996 A JPS6392996 A JP S6392996A JP 61238728 A JP61238728 A JP 61238728A JP 23872886 A JP23872886 A JP 23872886A JP S6392996 A JPS6392996 A JP S6392996A
- Authority
- JP
- Japan
- Prior art keywords
- electrode terminal
- output electrode
- terminal
- discharge
- gas discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 11
- 238000007599 discharging Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000008034 disappearance Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[(既要コ
プラズマ表示板に使用されるようなガス放電パネルを駆
動するとき、使用する駆動素子の制御電極に、出力電極
端子を接地するための信号を加えた次のサイクルにおい
て、短い放電パルスを制御電極に印加し、出力電極電位
変化のなまりを防止できるガス放電パネルの駆動回路で
ある。[Detailed Description of the Invention] [(When driving a gas discharge panel such as that used in an existing coplasma display panel, the following signal is applied to the control electrode of the drive element used to ground the output electrode terminal. This is a gas discharge panel drive circuit that applies short discharge pulses to the control electrode during the cycle to prevent rounding of output electrode potential changes.
[産業上の利用分野]
本発明はプラズマ表示板に使用されるようなガス放電パ
ネルを駆動する回路に関する。[Industrial Field of Application] The present invention relates to circuits for driving gas discharge panels such as those used in plasma display panels.
従来のこの種回路では、放電パネルに対する放電ととそ
の消失とを相次いで制御するため、放電消失の次に放電
させるように駆動用制御信号を印加するとき、波形変化
になまりを生じることがあったので、゛それを防止する
手段の研究がなされている。In conventional circuits of this kind, since the discharge to the discharge panel and its dissipation are controlled one after another, when a drive control signal is applied to cause the discharge to occur after the discharge dissipates, the waveform change may be distorted. Therefore, research is being conducted on ways to prevent this.
[従来の技術]
ガス放電パネルは放電ガスをガラス基板間に封入したも
ので、ガラス基板の各内側に直交して設けた電極に選択
的に電圧を印加して、所定の場所で放電を起こさせる。[Prior Art] A gas discharge panel is a device in which a discharge gas is sealed between glass substrates, and a voltage is selectively applied to electrodes provided perpendicularly on the inside of each glass substrate to cause a discharge at a predetermined location. let
このとき放電を起こさせる電圧、放電を維持させる電圧
を得るための所定の電圧波形を、半導体素子を使用する
駆動回路を介して駆動していた。第5図はその駆動回路
を示す。At this time, a predetermined voltage waveform for obtaining a voltage that causes discharge and a voltage that maintains discharge is driven via a drive circuit using a semiconductor element. FIG. 5 shows the drive circuit.
第5図において、1.2はトランジスタ、3はトランジ
スタ2の出力電極端子(トランジスタ1の共通電極端子
)、4は接地端子、5はトランジスタ2の制御電極端子
、61.62はダイオード、7は抵抗素子、8は動作電
圧印加端子、9は浮遊容量でトランジスタ2のコレクタ
・エミッタ間に生じるものを示す。In Fig. 5, 1.2 is a transistor, 3 is an output electrode terminal of transistor 2 (common electrode terminal of transistor 1), 4 is a ground terminal, 5 is a control electrode terminal of transistor 2, 61.62 is a diode, and 7 is a A resistance element, 8 a terminal for applying an operating voltage, and 9 a stray capacitance generated between the collector and emitter of the transistor 2 are shown.
また第6図は第5図中の出力電極端子3の電圧波形を示
す。Moreover, FIG. 6 shows the voltage waveform of the output electrode terminal 3 in FIG.
第5図において制御電極端子5に印加する電位を“L”
とすれば、トランジスタ2がオフとなり、動作電圧印加
端子8の電圧vppを140Vのように高い電圧とする
。そのとき抵抗7を通って電流がトランジスタ1のベー
ス・エミッタ間を流れ、トランジスタ1をオンとする。In FIG. 5, the potential applied to the control electrode terminal 5 is set to "L".
If so, the transistor 2 is turned off, and the voltage vpp of the operating voltage application terminal 8 is set to a high voltage such as 140V. At this time, current flows between the base and emitter of transistor 1 through resistor 7, turning transistor 1 on.
出力電極端子3の電位はvppと等しくなる。若しVl
)I)が出力電極端子3の電位より低い値となれば、出
力電極端子3からダイオード61を通り、トランジスタ
1のベース・コレクタ間を流れ、出力電極端子3の電位
が再びvppと同じになる。そのためトランジスタ2を
オフ、トランジスタlをオンとしてVl)I)に放電パ
ネルの駆動電圧を印加すると、出力電極端子3の電位は
同じ変化をした波形が得られる(第6図の時間Tの間)
。放電のため電極を選択するときは、制御電極端子5の
電位を“H”としトランジスタ2をオンにする(第6図
の時刻jz)動作電圧印加端子8の電圧vppが正で大
きいとき、トランジスタ2のコレクタ電極への電位が接
地電位まで落ちる。このとき端子8からvppによる抵
抗7を介しての電流があるが、抵抗素子7の値を十分大
きくとれば僅かで済む。時刻t2においてトランジスタ
2をオンにしたとき、出力電極端子3の電位vppは接
地レベルとなる。その後時刻t、においてVl)I)を
大きな値とし出力電極端子3の電位も太き(しようとす
るとき、トランジスタ2の蓄積容量或いはコレクタ・エ
ミッタ間の浮遊容量9のために出力電極端子3の電位が
直ぐ変化できない。即ち浮遊容量9と抵抗素子7との積
の時定数で電位変化がなまってしまう(第6図の時間T
3の範囲)。The potential of the output electrode terminal 3 becomes equal to vpp. Waka Vl
) When I) becomes a value lower than the potential of the output electrode terminal 3, it flows from the output electrode terminal 3 through the diode 61 and between the base and collector of the transistor 1, and the potential of the output electrode terminal 3 becomes the same as vpp again. . Therefore, when transistor 2 is turned off, transistor 1 is turned on, and the drive voltage of the discharge panel is applied to Vl)I), a waveform with the same change in the potential of output electrode terminal 3 is obtained (during time T in Fig. 6).
. When selecting an electrode for discharging, the potential of the control electrode terminal 5 is set to "H" and the transistor 2 is turned on (time jz in FIG. 6). When the voltage vpp of the operating voltage application terminal 8 is positive and large, the transistor 2 is turned on. The potential to the collector electrode of No. 2 drops to ground potential. At this time, there is a current flowing from the terminal 8 through the resistor 7 due to vpp, but if the value of the resistor element 7 is set to be sufficiently large, the current will be small. When the transistor 2 is turned on at time t2, the potential vpp of the output electrode terminal 3 becomes the ground level. Thereafter, at time t, when Vl)I) is set to a large value and the potential of the output electrode terminal 3 is also increased, the potential of the output electrode terminal 3 increases due to the storage capacitance of the transistor 2 or the stray capacitance 9 between the collector and emitter. The potential cannot change immediately.In other words, the potential change becomes dull due to the time constant of the product of the stray capacitance 9 and the resistance element 7 (time T in Figure 6).
3 range).
[発明が解決しようとする問題点〕
ガス放電パネルを放電後消失させてから、直ぐ放電を再
開させるとき、電位変化がなまると放電現象が中途半端
に起きるため、その位置で放電しているかどうかはっき
りしない事がある。また放電についてメモリ作用が消え
てしまう欠点が生じた。[Problem to be solved by the invention] When restarting the discharge immediately after discharging the gas discharge panel after discharging, if the potential change becomes blunted, the discharge phenomenon occurs halfway, so it is difficult to determine whether the discharge is occurring at that position. There's something I'm not clear about. Furthermore, there is a drawback that the memory effect disappears with respect to discharge.
本発明の目的は前述の欠点を改善し、放電消失の次のサ
イクルにおいてダミーの放電波形を加えることにより、
放電用電圧波形の変化になまりを生じないようにしたガ
ス放電パネルの駆動回路を提供することにある。The purpose of the present invention is to improve the above-mentioned drawbacks by adding a dummy discharge waveform in the next cycle after the discharge disappears.
It is an object of the present invention to provide a drive circuit for a gas discharge panel in which a change in discharge voltage waveform does not become rounded.
[問題点を解決するための手段]
第1図は本発明の原理構成を示す図である。第1図にお
いて、10はガス放電パネルを駆動する駆動回路を全体
的に示し、1.2は駆動素子としてのトランジスタ、3
はトランジスタ2の出力電極端子、4は接地端子、5は
制御信号印加端子、8は動作電圧端子、11は放電パル
ス発生器を示す。[Means for Solving the Problems] FIG. 1 is a diagram showing the basic configuration of the present invention. In FIG. 1, 10 generally indicates a drive circuit for driving the gas discharge panel, 1.2 is a transistor as a drive element, and 3
1 is an output electrode terminal of the transistor 2, 4 is a ground terminal, 5 is a control signal application terminal, 8 is an operating voltage terminal, and 11 is a discharge pulse generator.
動作電圧印加端子8から高電圧が印加される駆動素子(
トランジスタ2)の出力電極端子3は図示しない放電パ
ネルと接続゛され、制御信号印加端子5に与えられる信
号で出力電極端子3の電位を接地(接地端子4の接地電
位)するガス放電パネルの駆動回路において、本発明は
下記の構成としている。A drive element (to which a high voltage is applied from the operating voltage application terminal 8)
The output electrode terminal 3 of the transistor 2) is connected to a discharge panel (not shown), and the signal applied to the control signal application terminal 5 is used to ground the potential of the output electrode terminal 3 (ground potential of the ground terminal 4) to drive the gas discharge panel. The circuit of the present invention has the following configuration.
即ちパルス発生器11を具備することで、制御信号を印
加する端子5から出力電極端子3の電位を接地4に落と
すための信号を加えた次のサイクルにおいて、スイッチ
ング電圧印加時間と比較して短い放電パルスを出力電極
端子3に印加するものである。That is, by providing the pulse generator 11, the switching voltage application time is shorter than the switching voltage application time in the next cycle in which a signal for dropping the potential of the output electrode terminal 3 to the ground 4 is applied from the terminal 5 to which the control signal is applied. A discharge pulse is applied to the output electrode terminal 3.
[作用]
ガス放電パネルと接続された駆動回路10の出力電極端
子3の電位を接地4レベルとし、次の放電開始サイクル
において疑似的な放電パルスを発生器11から取り出し
、出力電極端子3に印加する。第2図は出力電極端子3
の電位変化を示すもので、時刻t4において放電パルス
が印加され、t、において消失させる。そのパルスの持
続時間(t4〜ts)はスイッチング電圧印加時間tp
と比較して短いものであるから、駆動素子2の浮遊容量
などを充電できる程度に過ぎない、しかし更に次のサイ
クルの時刻t6において放電パルスを印加すれば、その
ときは波形変化になまり無く急速に電位を変化すること
ができる。[Operation] The potential of the output electrode terminal 3 of the drive circuit 10 connected to the gas discharge panel is set to the ground 4 level, and in the next discharge start cycle, a pseudo discharge pulse is taken out from the generator 11 and applied to the output electrode terminal 3. do. Figure 2 shows the output electrode terminal 3.
A discharge pulse is applied at time t4 and disappears at time t. The duration of the pulse (t4 to ts) is the switching voltage application time tp
Since it is short compared to , it is only enough to charge the stray capacitance of the drive element 2. However, if a discharge pulse is further applied at time t6 of the next cycle, the waveform change will be rapid without any rounding. The potential can be changed to
[実施例]
第3図は本発明の実施例の構成を示すものである。第3
図において、10−1は駆動回路、11は放電パルス発
生器で放電パネルの一方の電極と接続するもの、10−
2は放電パネルと対向する他方の電極と接続する駆動回
路を示す。12は打消パルス発生器で、他方の電極側に
のみ接続する。[Embodiment] FIG. 3 shows the configuration of an embodiment of the present invention. Third
In the figure, 10-1 is a drive circuit, 11 is a discharge pulse generator connected to one electrode of the discharge panel, and 10-
2 indicates a drive circuit connected to the other electrode facing the discharge panel. 12 is a cancellation pulse generator, which is connected only to the other electrode side.
第4図は第3図の動作波形図を示す、第4図上方は駆動
回路10−1による波形図、同下方は駆動回路10−2
による波形図である。正常の放電現象を起こしていると
き、互いの電極の内側に壁電荷と称する電荷の蓄積が起
こり、この電荷は次の放電発生に役立っている。第1図
に示す本発明により疑似放電パルスを加えると、対向電
極側の壁電荷を打消す動作を起こすことがある。そのた
め打消パルス発生器12からの打消パルスを、疑似放電
パルスと同時期に対向電極に印加すれば、その打消動作
を防止でき、次の放電を確実に開始できる。FIG. 4 shows an operating waveform diagram of FIG. 3. The upper part of the figure is a waveform diagram of the drive circuit 10-1, and the lower part of the diagram is a waveform diagram of the drive circuit 10-2.
FIG. When a normal discharge phenomenon occurs, charge called wall charge accumulates inside each electrode, and this charge helps in the generation of the next discharge. When a pseudo discharge pulse is applied according to the present invention shown in FIG. 1, the wall charge on the opposing electrode side may be canceled out. Therefore, by applying the cancellation pulse from the cancellation pulse generator 12 to the counter electrode at the same time as the pseudo discharge pulse, the cancellation operation can be prevented and the next discharge can be reliably started.
[発明の効果]
このようにして本発明によると、ガス放電パネルを駆動
するため放電の発生消滅を繰り返したとき、発生し易い
中途半端な放電の発生を防止できるから、表示を常に正
確に動作させることが可能である。[Effects of the Invention] In this way, according to the present invention, it is possible to prevent the occurrence of half-finished discharges that tend to occur when the generation and disappearance of discharges are repeated to drive a gas discharge panel, so that the display can always operate accurately. It is possible to do so.
第1図は本発明の原理構成を示す図、
第2図は第1図の動作波形図、
第3図は本発明の実施例の構成を示す図、第4図は第3
図の動作波形図、
第5図は従来の駆動回路の回路図、
第6図は第5図の動作波形図である。
10〜・−駆動回路
■、2−・・トランジスタ
3−・−トランジスタ2の出力電極端子4・・・接地端
子とその電位
5−・・制御信号印加端子
8・・・動作電圧印加端子
11・−・放電パルス発生器
12−・打消パルス発生器
特許出願人 富士通株式会社
代 理 人 弁理士 鈴木栄祐
111功回路
A裳勇4日月の刀萎デ見j彎〃!びコ
第1図
第1図の勧イ乍波、形図
第2図
−7の放電パネルへ
りで2πiイタリ
第3図
第3図のt作汲形図
第4図
第5図
出力電逓増÷3のう良形図
第6図Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is an operation waveform diagram of Fig. 1, Fig. 3 is a diagram showing the configuration of an embodiment of the invention, and Fig. 4 is a diagram showing the third
FIG. 5 is a circuit diagram of a conventional drive circuit, and FIG. 6 is an operation waveform diagram of FIG. 10--Drive circuit ■, 2--Transistor 3--Output electrode terminal 4 of transistor 2--Ground terminal and its potential 5--Control signal application terminal 8--Operating voltage application terminal 11-- -・Discharge pulse generator 12-・Cancellation pulse generator Patent applicant Fujitsu Ltd. Representative Patent attorney Eisuke Suzuki 111 Successful circuit A Ishiyuki 4 Kazuki no Sword withered view! Figure 1 The waveform shown in Figure 1 is 2πi at the edge of the discharge panel in Figure 2-7. Figure 6
Claims (1)
3)とガス放電パネルを接続し、制御信号印加端子(5
)の信号で出力電極端子(3)の電位を接地(4)に落
とすガス放電パネルの駆動回路において、 制御信号を印加する端子(5)から出力電極端子(3)
の電位を接地(4)に落とすための信号を加えた次のサ
イクルにおいて、スイッチング電圧印加時間と比較して
短い放電パルスを、出力電極端子(3)に印加するパル
ス発生器(11)を具備することを特徴とするガス放電
パネルの駆動回路。[Claims] The output electrode terminal of the drive element (2) to which a high voltage is applied (
3) and the gas discharge panel, and connect the control signal application terminal (5) to the gas discharge panel.
) In a gas discharge panel drive circuit that lowers the potential of the output electrode terminal (3) to ground (4) using a signal from the output electrode terminal (3), the control signal is applied from the terminal (5) to the output electrode terminal (3).
A pulse generator (11) is provided for applying a discharge pulse shorter than the switching voltage application time to the output electrode terminal (3) in the next cycle after applying a signal for dropping the potential of the terminal to the ground (4). A drive circuit for a gas discharge panel characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61238728A JPS6392996A (en) | 1986-10-07 | 1986-10-07 | Gas discharge panel driving circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61238728A JPS6392996A (en) | 1986-10-07 | 1986-10-07 | Gas discharge panel driving circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6392996A true JPS6392996A (en) | 1988-04-23 |
Family
ID=17034373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61238728A Pending JPS6392996A (en) | 1986-10-07 | 1986-10-07 | Gas discharge panel driving circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6392996A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5944637A (en) * | 1982-09-06 | 1984-03-13 | Kishimoto Akira | Method and device for inspecting tight sealing failure of sealed vessel |
-
1986
- 1986-10-07 JP JP61238728A patent/JPS6392996A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5944637A (en) * | 1982-09-06 | 1984-03-13 | Kishimoto Akira | Method and device for inspecting tight sealing failure of sealed vessel |
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